CN101192588A - 引线接合及其形成方法 - Google Patents
引线接合及其形成方法 Download PDFInfo
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- CN101192588A CN101192588A CNA2006101492367A CN200610149236A CN101192588A CN 101192588 A CN101192588 A CN 101192588A CN A2006101492367 A CNA2006101492367 A CN A2006101492367A CN 200610149236 A CN200610149236 A CN 200610149236A CN 101192588 A CN101192588 A CN 101192588A
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- wire
- bonded
- lead
- skip welding
- joint
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
- B23K20/002—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating specially adapted for particular articles or work
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Abstract
根据本发明,在半导体芯片和芯片载体之间具有多个引线接合互联的半导体封装中的引线接合(20)包括在接合地点(26)上的第一位置(24)形成的第一接合(22)、和在接合地点(26)上的第二位置(42)形成的第二接合(40),使得第二接合(40)至少部分地与第一接合(22)重叠。
Description
技术领域
本发明涉及引线接合(wire bond),更具体地涉及引线接合及形成引线接合的方法。
背景技术
引线接合是用于在半导体芯片和芯片载体之间提供电连接的一种广泛使用的技术。引线接合典型地涉及在半导体芯片的接合衬垫上形成的第一引线接合与在引线框的引线针或基片的衬垫表面上形成的第二引线接合。现在参考图1,示出了包括接合至引线针14的引线12的传统的第二引线接合10的放大的顶部俯视图。第二接合10包括新月形的接合区域16,其由用以形成第二接合10的毛细管焊接工具(未示出)的外部几何形状的烙印形成。
可以视觉地和/或由机械的测试方法评估在半导体芯片和芯片载体之间形成的引线接合互联。剥落强度测试是一种这样的机械测试方法。引线接合的剥落强度提供接合失败的可能性的指示。通过在引线下最接近引线接合处放置吊钩并且施加升力以测试引线接合到接合点的粘附强度,执行剥落强度测试。典型地,当第二引线接合被标识为具有低的剥落强度时,改变第二引线接合的一个或多个接合参数,例如接合力、接合时间、以及超声波频率和功率,以增加第二接合的剥落强度。然而,这经常导致第二接合的接合区域的厚度减少,使得第二接合更易受跟部断裂的影响。跟部断裂显著地降低第二接合的拉拔强度并且也已知导致不成熟的循环故障。因而,存在对具有增加的剥落强度和接合区域厚度的引线接合、以及形成这种引线接合的方法的需求。
发明内容
本发明提供一种在具有位于半导体芯片和芯片载体之间的多个引线接合互联的半导体封装中的引线接合,包括:在接合地点上的第一位置处用引线形成的第一接合;和在该接合地点上的第二位置处形成的第二接合,使得第二接合至少部分地与第一接合重叠。
本发明还提供一种半导体封装器件,其包括具有多个引线针的引线框、和附加到引线框的芯片。该芯片包括多个接合衬垫。接合衬垫中的一些各自与引线针中的一些通过多个引线电连接,使得连接引线中的一个到相应引线针的接合是前向折叠类型的跳焊。
本发明进一步提供一种形成引线接合的方法,其包括以下步骤:通过在接合地点上的第一位置处以焊接工具接合引线的第一部分形成第一接合;和通过在该接合地点上的第二位置处以焊接工具接合引线的第二部分形成第二接合,使得第二接合至少部分地与第一接合重叠。
附图说明
当结合附图阅读时将更好地理解以下本发明的优选实施例的具体描述。以实例的方式说明本发明并且本发明不受附图的限制,附图中相似的附图标记指示类似的元件。应理解,附图不是按比例的并且为了轻松理解本发明而简化了。
图1是传统的引线接合的放大的顶部俯视图;
图2是根据本发明的实施例,说明接合地点上的第一位置处的第一接合的形成中的步骤的放大的截面图;
图3是根据本发明的实施例,说明焊接工具的向上运动的放大的截面图;
图4是说明图3的焊接工具的相反运动的放大的截面图;
图5是说明图2的接合地点上的第二位置处的第二接合的形成的放大的截面图;
图6是根据本发明的实施例,说明第二接合形成之后破坏引线的步骤的放大的截面图;
图7是根据本发明的实施例的引线接合的放大的顶部俯视图;和
图8是根据本发明的实施例的引线接合的放大的侧视图。
具体实施方式
以下结合附图阐述的具体描述意在作为本发明的当前优选实施例的描述,并不意在表示本发明可实践的唯一形式。应理解可以通过意在由本发明的精神和范围内所包含的不同的实施例来实现相同或等价的功能。在附图中,始终使用相似的数字指示相似的元件。
现在参考图2到图6描述形成前向折叠类型的跳焊(stitch bond)20的方法。以下描述的引线接合过程可以使用比如,来自Kulicke&Soffaof Willow Grove,PA,USA and ASM International,Materials Park,Ohio,USA的当前可用的引线接合器实现。
现在参考图2,如所示,在接合地点26上的第一位置24处形成第一接合22。更具体地,在接合地点26上的第一位置24处形成第一跳焊22。通过以焊接工具(bonding tool)32在接合地点26上的第一位置24处接合引线30的第一部分28,形成第一跳焊22。
在所示的实施例中,在半导体芯片(未示出)的接合衬垫(未示出)上形成引线30的第一末端的第一引线接合(未示出)之后,形成第一跳焊22。在目前的优选实施例中,第一引线接合是球形接合。本领域的技术人员已熟知球形接合,由此其具体描述对充分理解本发明来说是不必要的。在接合衬垫上形成第一引线接合之后,仍持有引线30的焊接工具32上升并且朝接合地点26运动,产生环回的形状。通过焊接工具32使引线30的第一部分28与接合地点26的第一位置24密切接触,并且通过应用热、压力和/或超声波能量的组合,在接合地点26上形成第一跳焊22。可以使用加热的焊接工具32、其上放置了芯片载体的加热的基架(未示出)、或者两者一起,施加热。在本领域中熟知第一跳焊22的这种形成。用于第一跳焊22的形成的实例引线接合参数是,超声波能量:12mA,时间:12ms,力:300g,和接合温度:150℃。本发明不限于接合参数的特殊设置,因为最适宜的接合参数依赖于引线类型、衬垫镀金属方法和设备配置。
在一个实施例中,接合地点26包括引线框针。虽然如此,本领域的技术人员将理解,本发明不限于引线框封装。在备选的实施例中,接合地点26可以是基片的衬垫表面。引线框、基片和它们各自的接合地点是本领域的普通技术人员已知的,并且因而,它们的具体描述对充分理解本发明来说是不必要的。
金(Au)和铝(Al)引线是接合中最普遍使用的。金和铝都坚固且柔软并且在大多数环境中具有相似的电阻。有时以搀杂剂,比如铍(Be)或钙(Ca)搀杂金线以稳定它。小直径的铝线经常被搀杂硅(Si)或有时候搀杂镁(Mg)以改进它的断裂负载和延长参数。除了金和铝之外,铜(Cu)、钯(Pd)合金、铂(Pt)和银(Ag)接合引线也是公知的。在一个实施例中,引线30具有大约20.3微米(μm)到大约50.8μm之间的直径Dw,尽管也可使用其他直径的引线,并且本发明不应限于特殊的引线直径。如本领域的那些技术人员所已知的,各种尺寸的引线可用于连接半导体芯片到芯片载体,除了其他因素外,引线具有根据接合地点之间的空间而选择的引线尺寸。
引线30穿过焊接工具32中的洞34。在所示的实施例中,焊接工具32是毛细管,其具有由曲面所限定的大约0.01毫米(mm)和大约0.076mm之间的外直径R、在毛细管的底面36和典型地是水平的接合地点26之间的大约6°到大约11°之间的角度θ、和大约24μm和大约65μm之间的洞直径Dh。毛细管焊接工具32可以由陶瓷、钨或红宝石材料制成,如典型使用的。这种焊接工具在本领域中是已知,由此对于完整理解本发明不需要进一步描述毛细管。
一旦形成第一跳焊22,将焊接工具32在向上的运动中提升,如图3中的箭头所指示的,以付出引线30的长度。在一个实施例中,将焊接工具32在接合地点26上提升到大约两至三倍于引线直径的高度。
焊接工具32然后在如图4中的箭头所指示,在相反的运动方向中移动回第一跳焊22和第一位置24上方。更具体地,焊接工具32以直线朝半导体芯片上的接合运动。当焊接工具32移动到第一跳焊22上方时,在引线30中形成折叠38。
现在参考图5,在接合地点26上的第二位置42处形成第二接合40。该第二接合40至少部分地与第一跳焊22重叠。在一个实施例中,第二接合40是在接合地点26上的第二位置42处、在第一跳焊22上方形成的第二跳焊。通过在第一跳焊22上方降低焊接工具32,并且在接合地点26上的第二位置42处以焊接工具32接合引线30的第二部分44,形成第二跳焊。在一个实施例中,第二接合40与第一接合22部分地重叠,而在另一实施例中,第二接合40完全与第一接合22重叠。
通过应用热量、压力和/或超声波能量的组合,在接合地点26上形成第二跳焊40。在一个实施例中,对于QFN(方形扁平无引脚)类型的封装,使用:超声波能量:12mA,时间:12ms,力:300g,和接合温度:150℃形成第二跳焊40。然而,如先前所述的,本领域的那些技术人员将理解,本发明不受限于接合参数的特殊设置。而是,最适合的接合参数依赖于引线类型、衬垫镀金属法和设备配置。
在第一跳焊22上方第二接合40的形成增加了引线接合20和接合地点26之间的接触面积,以及引线接合20的厚度。接触面积和引线接合厚度的增加提高了引线接合20到接合地点26的粘着,这依次改进了引线接合的性能和可靠性。
现在参考图6,在第二接合40形成之后,通过在箭头的方向中提升焊接工具32,在焊接工具32和第二接合40之间的点46处破坏引线30。由于在第一接合22的形成之后,提升焊接工具并且然后移动回到接合地点26上方,导致引线30中的折叠,所以将接合20称为前向折叠接合。
现在参考图7,示出了图6的前向折叠类型的跳焊20的放大的顶部俯视图。如从图7中可见的,第二接合40包括第一和第二新月形区域48和50。前向折叠类型的跳焊20的第一和第二新月形区域48和50可由毛细管焊接工具32的外部几何形状的烙印形成。
现在参考图8,示出了图7的前向折叠类型跳焊20的放大的侧视图。如从图8中可见的,第一新月形区域48与第一跳焊22重叠。更具体地,如图8中所示,第二接合40与第一跳焊22完全重叠,使得第二接合40基本上完全覆盖第一跳焊22。虽然如此,应理解本发明不受第一和第二跳焊22和40之间的重叠程度的限制。而是,重叠的程度依赖于引线接合过程的参数,比如,例如由焊接工具32付出的引线30的长度,和/或在第二跳焊40形成之前焊接工具32移动过的相反距离。
第一新月形区域48具有大约两倍或更多倍于第一跳焊22的厚度的厚度T。在优选实施例中,第一新月形区域48具有至少大约4μm(例如对于1.0mil的引线)的厚度T;更粗的引线将具有更厚的新月形区域。
通过在一百(100)个前向折叠类型的跳焊上进行剥落强度测试并且在一百(100)个传统跳焊上重复该测试,作出了前向折叠类型的跳焊和传统跳焊的剥落强度的比较。比较结果在下面的表1中示出。
表1
前向折叠类型的跳焊 | 传统跳焊 | |
最小剥落力 | 4.909g | 2.517g |
最大剥落力 | 8.384g | 7.459g |
平均剥落力 | 5.822g | 4.739g |
如从表1中可见的,当采取例如1.0mil的引线时,前向折叠类型的跳焊的平均剥落力大约比传统跳焊的剥落力高1.1克(g)。因此,可以说前向折叠类型的跳焊具有提高的剥落强度。在优选实施例中,前向折叠类型的跳焊具有至少大约4.9克(例如1.0mil的引线)的剥落强度;更粗的引线将具有甚至更大的剥落强度的改进。
如从前述讨论中显见的,本发明提供具有增加的剥落强度和接合区域厚度的引线接合,以及形成这种引线接合的方法。有利地,在第一跳焊上方的第二跳焊的形成增加了引线接合与引线地点之间的接触面积、以及引线接合的厚度。接触面积和引线接合的厚度的增加增强了引线接合到接合地点的粘着,其依次改进了引线接合的性能和可靠性。除了增加剥落强度之外,引线接合厚度的增加也降低了跟部断裂的风险。更有利地,因为可以使用当前可用的引线接合器实现本发明,所以不需要额外的投资。
出于说明和描述的目的给出了本发明的优选实施例的描述,但是不意图将其作为详尽无遗漏的描述或者将本发明限制于所公开的形式。本领域的那些技术人员应理解,可以在不脱离其宽泛的发明概念的情况下对上述实施例作出变更。因此,应理解本发明不限于所公开的特殊的实施例,而是覆盖如所附的权利要求限定的本发明的精神和范围内的修改。
Claims (20)
1.一种在半导体芯片和芯片载体之间具有多个引线接合互联的半导体封装中的引线接合,包括:
第一接合,其用引线形成在接合地点上的第一位置;和
第二接合,其形成在接合地点上的第二位置,该第二接合至少部分地与该第一接合重叠。
2.按照权利要求1所述的引线接合,其中,该第一和第二接合包括跳焊。
3.按照权利要求2所述的引线接合,其中,该第二接合完全与第一接合重叠。
4.按照权利要求3所述的引线接合,其中,该第二跳焊包括第一和第二新月形区域,其中的第一新月形区域与第一跳焊重叠。
5.按照权利要求4所述的引线接合,其中,第一新月形区域具有至少大约两倍或更多倍于第一跳焊厚度的厚度。
6.按照权利要求5所述的引线接合,其中,引线具有大约1.0mil的直径,第一新月形区域具有至少大约4μm的厚度。
7.按照权利要求1所述的引线接合,其中,该接合地点包括引线框的引线针。
8.按照权利要求1所述的引线接合,其中,该引线具有大约1.0mil的直径,并且该引线接合具有至少大约4.9g的剥落强度。
9.按照权利要求1所述的引线接合,其中,以具有大约0.8μm到大约2.0μm之间的直径的引线形成该引线接合。
10.按照权利要求1所述的引线接合,其中,该引线由金、铝、铜、银、铂、钯及其合金之一制成。
11.一种半导体封装器件,其包括:
引线框,其具有多个引线针;
附加于引线框的芯片,该芯片具有多个接合衬垫;和
多个引线,其电连接接合衬垫中的若干个与各自的引线针中的若干个,其中,将引线之一连接到相应的引线针的接合是前向折叠类型的跳焊。
12.按照权利要求11所述的半导体封装器件,其中,该前向折叠类型的跳焊包括在相应的引线针上的第一位置形成的第一跳焊、和在相应的引线针上的第二位置形成的第二跳焊,该第二接合至少部分地与第一接合重叠。
13.按照权利要求12所述的半导体封装器件,其中,该第二跳焊包括第一和第二新月形区域,该第一新月形区域基本上完全与第一跳焊重叠。
14.按照权利要求11所述的半导体封装器件,其中,该前向折叠类型的跳焊具有至少大约4.9g的剥落强度。
15.一种形成引线接合的方法,包括以下步骤:
通过以焊接工具在接合地点上的第一位置接合引线的第一部分,形成第一接合;
通过以焊接工具在接合地点上的第二位置接合引线的第二部分,形成第二接合,其中,该第二接合至少部分地与第一接合重叠。
16.按照权利要求15所述的形成引线接合的方法,其中,形成第一接合的步骤包括在接合地点上的第一位置形成第一跳焊。
17.按照权利要求16所述的形成引线接合的方法,其中,形成第二接合的步骤包括以下步骤:
提升焊接工具,从而付出引线的长度;
将焊接工具移动回到第一接合和第一位置的上方;
在第一接合上方降低焊接工具并且在第二位置处在第一接合上方形成第二跳焊;和
提升焊接工具并且在焊接工具和第二跳焊之间的点处破坏引线。
18.按照权利要求17所述的形成引线接合的方法,其中,该第二跳焊基本上完全覆盖第一接合。
19.按照权利要求17所述的形成引线接合的方法,其中,在第一接合上方移动焊接工具形成引线中的折叠。
20.按照权利要求18所述的形成引线接合的方法,其中,该接合地点包括引线框针。
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US11/863,259 US20080116548A1 (en) | 2006-11-17 | 2007-09-28 | Wire bond and method of forming same |
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US20100155455A1 (en) * | 2005-02-24 | 2010-06-24 | Kabushiki Kaisha Shinkawa | Wire bonding method |
US8357998B2 (en) * | 2009-02-09 | 2013-01-22 | Advanced Semiconductor Engineering, Inc. | Wirebonded semiconductor package |
TWI506710B (zh) * | 2009-09-09 | 2015-11-01 | Renesas Electronics Corp | 半導體裝置之製造方法 |
JP4787374B2 (ja) | 2010-01-27 | 2011-10-05 | 株式会社新川 | 半導体装置の製造方法並びにワイヤボンディング装置 |
CN102412167B (zh) | 2010-09-25 | 2016-02-03 | 飞思卡尔半导体公司 | 用于线接合的固定 |
CN102487025B (zh) | 2010-12-08 | 2016-07-06 | 飞思卡尔半导体公司 | 用于长结合导线的支撑体 |
KR102443487B1 (ko) | 2015-12-17 | 2022-09-16 | 삼성전자주식회사 | 반도체 장치의 강화된 강성을 갖는 전기적 연결부 및 그 형성방법 |
GB2604433B (en) * | 2020-12-23 | 2023-05-03 | Skyworks Solutions Inc | Apparatus and methods for tool mark free stitch bonding |
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US5328079A (en) * | 1993-03-19 | 1994-07-12 | National Semiconductor Corporation | Method of and arrangement for bond wire connecting together certain integrated circuit components |
US5960262A (en) * | 1997-09-26 | 1999-09-28 | Texas Instruments Incorporated | Stitch bond enhancement for hard-to-bond materials |
JP2002280414A (ja) * | 2001-03-22 | 2002-09-27 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US20030230796A1 (en) * | 2002-06-12 | 2003-12-18 | Aminuddin Ismail | Stacked die semiconductor device |
US7227095B2 (en) * | 2003-08-06 | 2007-06-05 | Micron Technology, Inc. | Wire bonders and methods of wire-bonding |
US7261230B2 (en) * | 2003-08-29 | 2007-08-28 | Freescale Semiconductor, Inc. | Wirebonding insulated wire and capillary therefor |
US6992377B2 (en) * | 2004-02-26 | 2006-01-31 | Freescale Semiconductor, Inc. | Semiconductor package with crossing conductor assembly and method of manufacture |
US7214606B2 (en) * | 2004-03-11 | 2007-05-08 | Asm Technology Singapore Pte Ltd. | Method of fabricating a wire bond with multiple stitch bonds |
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