CN101188221A - 布线基板和采用该布线基板的半导体器件 - Google Patents

布线基板和采用该布线基板的半导体器件 Download PDF

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Publication number
CN101188221A
CN101188221A CNA2007101866980A CN200710186698A CN101188221A CN 101188221 A CN101188221 A CN 101188221A CN A2007101866980 A CNA2007101866980 A CN A2007101866980A CN 200710186698 A CN200710186698 A CN 200710186698A CN 101188221 A CN101188221 A CN 101188221A
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semiconductor
semiconductor chip
circuit board
subassembly substrate
semiconductor device
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藤本博昭
今津健一
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Publication of CN101188221A publication Critical patent/CN101188221A/zh
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
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Abstract

本发明通过在构成BAG组件用的布线基板(8)的各半导体组件基板(1)的周围形成凹部(10),向包括该凹部(10)的布线基板(8)上填充密封树脂(15),在进行树脂密封的状态下,用分割线(9)切断布线基板(8)与密封树脂(15),从而在半导体组件基板(1)上利用密封树脂(15)密封半导体芯片(13),这样制造多个半导体器件。

Description

布线基板和采用该布线基板的半导体器件
技术领域
本发明涉及一种例如用于BAG组件等中、由安装了半导体芯片的多个半导体组件基板构成的布线基板及采用该布线基板的半导体器件。
背景技术
近些年,为了适应移动通信设备等电子设备的小型化,即使对半导体器件也要求小型化和高密度化。另外,随着电子设备的高性能和多功能化的发展,在半导体器件中,外部端子趋向多引脚化,且大多采用在半导体组件的底面上面阵列配置的BAG组件、LAG组件。
在利用密封树脂将半导体芯片密封在构成例如BAG组件用的布线基板的各半导体组件基板上的状态下,通过对每个半导体组件基板切断布线基板和密封树脂,而得到这样的半导体器件。
下面,举出BAG组件为例作为过去的半导体器件(例如,参照日本国的专利公开公报即特开2001-274283号公报),来说明其制造方法。
图7表示在过去的BAG组件用的布线基板中形成的布线图形的状态的俯视图,图8A~图8D是表示过去的半导体器件的制造方法中的制造工序,图9是利用过去的半导体器件的制造方法中的制造工序所制造的半导体器件的外形的侧视图。
首先,如图7及图8A所示,准备具有用分割线9区分的多个半导体组件基板1的布线基板8。另外,这里作为布线基板8,图示的是用分割线9将半导体组件基板1形成为上下左右共6个的情况。构成布线基板8的多个半导体组件基板1由玻璃环氧等绝缘性基板构成,在各自的表面上形成半导体芯片安装区域2、内部电极3、导体布线4、电镀用布线5,在背面形成外部连接用的外部电极16,虽然没有图示,但是导体布线4与外部电极16通过形成在布线基板8的内部的通路孔等进行电连接。
接着,如图8B所示,对全部形成于布线基板8的表面的多个半导体芯片安装区域2,分别用导电性树脂固定半导体芯片13。然后,用Au等的焊丝14将各半导体芯片13的电极与内部电极3进行电连接。
接着,如图8C所示,用由环氧等树脂构成的密封树脂15对布线基板8的表面的全部区域进行树脂密封。
接着,如图8D所示,在图8C的状态下,通过利用切片机等沿着分割线9对布线基板8及密封树脂15进行切削,从而用分割线9来分割布线基板8和密封树脂15,得到在半导体组件基板1上利用密封树脂15密封了半导体芯片13的多个半导体器件。
但是,在上述那样过去的半导体器件及半导体器件的制造方法中,当对多个半导体器件分割布线基板8及密封树脂15时,也同时分割电镀用布线5,如图9所示,形成在半导体器件的侧面露出电镀用布线5的断面的状态。
这样,如果电镀用布线5从半导体器件的侧面露出,则当在后面的检查工序或安装在电子设备的印刷基板上时,有时检查用插口或印刷基板安装时的吸取工具等会接触到电镀用布线5,这时往往电镀用布线5发生变形且会在相邻的电镀用布线5之间产生电短路。另外,由于附着杂质离子、以及半导体器件的吸湿而使电镀用布线5在侧面引起迁移。由于上述原因,存在着作为半导体器件的可靠性下降的问题。
另外,因为在用分割线9切削布线基板8及密封树脂15来分割成每个半导体器件之前,处于几乎所有的内部布线3利用电镀用布线5进行电连接(短路)的状态,所以在布线基板8的状态下对每个半导体组件基板1进行电检查是比较困难的,也可能在不合格的半导体组件基板1上安装半导体芯片13,结果还存在着作为半导体器件的生产率下降的问题。
发明内容
本发明是为了解决上述过去的问题而设计的,目的在于提供一种更加能够提高作为半导体器件的可靠性、同时更加能够提高生产率的布线基板以及利用该布线基板的半导体器件。
为了解决上述问题,本发明的布线基板,其特征在于,具有多个在表面上形成电连接的内部电极、导体布线以及安装半导体芯片的半导体芯片安装区域的半导体组件基板,并在各半导体组件基板的外周上形成凹部,上述内部电极与上述导体布线在各个上述半导体组件基板之间电绝缘,且在所述半导体组件基板的外周上除去角落部分以外的地方将上述凹部形成为槽状。
另外,本发明的半导体器件,其特征在于,布线基板具有多个在表面上形成电连接的内部电极、导体布线以及安装半导体芯片的半导体芯片安装区域的半导体组件基板,在上述布线基板的上述半导体芯片安装区域上,安装上述半导体芯片,上述半导体芯片的电极与上述内部电极电连接,且在各半导体组件基板的外周具有厚度较薄的部分,用密封树脂覆盖上述半导体组件基板的至少上述半导体芯片安装区域以外的包括上述厚度较薄部分的全部区域,在所述半导体组件基板的外周上除去角落部分以外的地方将上述厚度较薄部分形成为槽状。
如果采用上述那样的本发明,则因为在布线基板的各半导体组件基板的外周部分形成凹部,且利用该凹部来缓和各半导体组件基板的弯度,能够减小整个布线基板的弯曲量,所以在布线基板形成的后工序中,更加能够提高在半导体组件基板上安装了半导体芯片时的安装质量。
另外,因为在向各半导体组件基板上安装半导体芯片之后进行树脂密封而形成的半导体器件的侧面上,没有像过去那样内部的导体部露出,所以在导体之间的短路与迁移不会发生,同时因为半导体器件的侧面只成为密封性强的密封树脂与半导体基板的基材之间的界面,所以还能够减少水分从外部进入到半导体器件。
通过这样,能够更提高作为半导体器件的可靠性,同时能够扩大在严酷的环境中所使用的车载用途等适用范围。
另外,因为利用形成在各半导体组件基板的外周部分的凹部使所有内部布线互相绝缘,即使在布线基板的状态下,也能够对各个半导体组件基板上的布线图形进行电检查,所以能够只正确地选择合格的半导体组件基板来安装半导体芯片。
结果,能够更提高作为半导体器件的可靠性,并且能够更提高生产率。
附图说明
图1是表示在本发明实施形态的布线基板上形成布线图形的状态的俯视图,
图2是表示在同一实施形态的布线基板上、在各半导体组件基板的外周部分上形成槽状凹部的状态的俯视图,
图3是表示在同一实施形态的布线基板上、在各半导体组件基板的外周部分形成环状凹部的状态的俯视图,
图4是表示在同一实施形态的布线基板上、在各半导体组件基板的外周部分上形成独立的凹部的状态的俯视图,
图5A是表示同一实施形态的半导体器件的制造方法中的制造工序1的剖面图,
图5B是表示同一实施形态的半导体器件的制造方法中的制造工序2的剖面图,
图5C是表示同一实施形态的半导体器件的制造方法中的制造工序3的剖面图,
图5D是表示同一实施形态的半导体器件的制造方法中的制造工序4的剖面图,
图6是表示利用同一实施形态的半导体器件的制造方法中的制造工序所制造的半导体器件的外形的侧视图,
图7是表示在过去的BAG组件用的布线基板上形成布线图形的状态的俯视图,
图8A是表示同一过去例子的半导体器件的制造方法中的制造工序1的剖面图,
图8B是表示同一过去例子的半导体器件的制造方法中的制造工序2的剖面图,
图8C是表示同一过去例子的半导体器件的制造方法中的制造工序3的剖面图,
图8D是表示同一过去例子的半导体器件的制造方法中的制造工序4的剖面图,
图9是表示利用同一过去例子的半导体器件的制造方法中的制造工序所制造的半导体器件的外形的侧视图。
具体实施方式
下面,参照附图来具体地说明表示本发明实施形态的布线基板以及采用该布线基板的半导体器件。
说明本发明的实施形态的布线基板。
图1是表示在本实施形态的布线基板上形成布线图形的状态的俯视图,图2是表示在本实施形态的布线基板上、只对各半导体组件基板外周的电镀用布线部分形成槽状凹部的状态的俯视图,图3是表示在本实施形态的布线基板上、形成遍及各半导体组件基板外周的全部区域的环状凹部的状态的俯视图,图4是表示在本实施形态的布线基板上、对各半导体组件基板外周的每个电镀用布线形成独立的凹部的状态的俯视图。
首先,在图1中,例如BAG组件、LAG组件用的布线基板8的基材由玻璃环氧、BT树脂、聚酰亚胺等构成,其厚度在0.1mm~0.8mm左右。布线基板8由多个半导体组件基板1构成,各个半导体组件基板1用分割线9区分开。在各个半导体组件基板1上,在表面上具有内部电极3、导体布线4以及电镀用布线5。虽然没有图示,但是在半导体组件基板1的背面具有外部电极,并通过形成在布线基板8的内部的通路孔与内部电极3电连接。
内部电极3、导体布线4、电镀用布线5的主导体材质通常是Cu,通过刻蚀法或电镀法等来形成。主导体的厚度为5~35μm左右。内部电极3是在后面用Au焊丝与半导体芯片的电极电连接的区域,为了提高其接合性,而通常用电解法实施镀Ni/Au。电镀用布线5是与这时的电镀用电极连接的部分。
接着,如图2所示,只对各半导体组件基板1外周的电镀用布线部分形成槽状凹部10。槽状凹部10的形成采用由刻槽机等进行机械切削的方法、以及利用激光等形成的方法。这时也同时切断电镀用布线5,各个导体布线4相互电分离。
凹部10的深度是布线基板8(或者半导体组件基板1)的厚度的10%~90%左右,是由布线基板8(或者半导体组件基板1)的厚度所决定的。另外,凹部10的宽度为50μm~500μm左右。另外,也可以代替凹部10,如图3所示,形成遍及布线基板8中的各半导体组件基板1的外周的全部区域的环状凹部11,另外,也可以如图4所示,在布线基板8中的各半导体组件基板1的外周上对每个电镀用布线5形成独立的凹部12。
说明本发明实施形态的半导体器件以及半导体器件的制造方法。
图5A~图5D是表示本发明实施形态的半导体器件制造方法中的制造工序的剖面图,图6是表示利用本实施形态的半导体器件制造方法中的制造工序所制造的半导体器件的外形的侧视图。
首先,图5A是图2所示的布线基板8的A-A′剖面图,如图5A所示,布线基板8由多个半导体组件基板1构成,每个半导体组件基板1在表面具有半导体芯片安装区域2、内部电极3以及导体布线4,在背面具有与外部布线连接的外部电极16。该布线基板8只在各半导体组件基板1的外周的包括分割线9的电镀用布线5部分上具有槽状凹部10。
然后,如图5B所示,用环氧、聚酰亚胺等导电性树脂或者绝缘性树脂将半导体芯片13固定在半导体组件基板1上的半导体芯片安装区域2中。另外,在所有形成于布线基板8内的半导体组件基板1上固定半导体芯片13。
于是,如图5B所示,采用由Au、Cu、Al等构成的焊丝14,并利用丝焊法,将半导体芯片13的电极与形成在半导体组件基板1上的内部电极3进行电连接。焊丝14的直径为10~30μm左右。这时,因为在内部电极3的表面实施镀Au,所以能够得到良好的接合性。
然后,如图5C所示,用密封树脂15进行树脂密封,使其包含整个半导体组件基板1。密封树脂15的厚度为半导体芯片13上的0.1mm~0.8mm左右。这时,在形成于半导体组件基板1上的槽上的凹部10中也填充密封树脂15。
接着,如图5D所示,在图5C的状态下,采用切片机等,沿着分割线9进行切削,通过这样用分割线9分割布线基板8与密封树脂15,从而得到在半导体组件基板1上利用密封树脂15将半导体芯片13密封的多个半导体器件。
这时,因为由半导体组件基板1的外周部的凹部10构成的厚度较薄的区域比外周要短0.1mm以下左右的尺寸,所以能够得到机械强度较强的半导体器件。
在如上所述制造的半导体器件中,如图6所示,在半导体器件的侧面没有像过去那样露出电镀用布线等的导体部。因此,由于没有导体部间的短路、由于导体部而引起的迁移不良以及检查中的操作时与导体部接触的情况,所以也没有因导体部的变形而引起的相邻的导体布线之间的接触,能够得到可靠性高的半导体器件。
另外,在上述实施形态中,半导体芯片13的电连接是采用丝焊法,但是在采用通过倒装式接合来连接的情况下,同样也能够适用。

Claims (13)

1.一种布线基板,其特征在于,
具有多个在表面上形成电连接的内部电极(3)、导体布线(4)以及安装半导体芯片(13)的半导体芯片安装区域(2)的半导体组件基板(1),在各半导体组件基板(1)的外周上形成凹部(10),在各个所述半导体组件基板(1)之间使所述内部电极(3)与所述导体布线(4)电绝缘,
在所述半导体组件基板(1)的外周上除去角落部分以外的地方将上述凹部(10)形成为槽状。
2.一种布线基板,其特征在于,
具有多个在表面上形成电连接的内部电极(3)、导体布线(4)以及安装半导体芯片(13)的半导体芯片安装区域(2)的半导体组件基板(1),在各半导体组件基板(1)的外周上形成凹部(12),在各个所述半导体组件基板(1)之间使所述内部电极(3)与所述导体布线(4)电绝缘,
对所述半导体组件基板(1)的外周的每个所述导体布线(4)独立形成所述凹部(12)。
3.如权利要求1中所述的布线基板,其特征在于,
至少一根以上的所述导体布线(4)的端部到达所述凹部(10)的侧面。
4.如权利要求1中所述的布线基板,其特征在于,
所述凹部(10)的深度在所述半导体组件基板(1)的厚度的1/2以下。
5.如权利要求1中所述的布线基板,其特征在于,
所述凹部(10)的宽度在300μm以下。
6.一种半导体器件,其特征在于,
布线基板(8)具有多个在表面上形成电连接的内部电极(3)、导体布线(4)以及安装半导体芯片(13)的半导体芯片区域(2)的半导体组件基板(1),在所述布线基板(8)的所述半导体芯片安装区域(2)上,安装所述半导体芯片(13),所述半导体芯片(13)的电极与所述内部电极(3)电连接,且在各半导体组件基板(1)的外周具有厚度较薄的部分,用密封树脂(15)覆盖所述半导体组件基板(1)的至少所述半导体芯片安装区域(2)以外的包括所述厚度较薄部分的全部区域,
在所述半导体组件基板(1)的外周上除去角落部分以外的地方将所述厚度较薄部分形成为槽状。
7.一种半导体器件,其特征在于,
布线基板(8)具有多个在表面上形成电连接的内部电极(3)、导体布线(4)以及安装半导体芯片(13)的半导体芯片区域(2)的半导体组件基板(1),在所述布线基板(8)的所述半导体芯片安装区域(2)上,安装所述半导体芯片(13),所述半导体芯片(13)的电极与所述内部电极(3)电连接,且在各半导体组件基板(1)的外周具有厚度较薄的部分,用密封树脂(15)覆盖所述半导体组件基板(1)的至少所述半导体芯片安装区域(2)以外的包括所述厚度较薄部分的全部区域,
对所述半导体组件基板(1)的外周的每个所述导体布线(4)独立形成所述厚度较薄部分。
8.如权利要求6中所述的半导体器件,其特征在于,
至少一根以上的所述导体布线(4)的端部到达所述厚度较薄部分的侧面。
9.如权利要求6中所述的半导体器件,其特征在于,
所述厚度较薄部分的深度在所述半导体组件基板(1)的厚度的1/2以下。
10.如权利要求6中所述的半导体器件,其特征在于,
所述厚度较薄部分的从所述外周部开始算起的长度为100μm以下。
11.如权利要求6中所述的半导体器件,其特征在于,
所述半导体芯片(13)的电极与所述内部电极(3)用金属细线(14)连接,所述半导体芯片(13)及所述金属细线(14)用所述密封树脂(15)覆盖。
12.如权利要求6中所述的半导体器件,其特征在于,
所述半导体芯片(13)的电极与所述内部电极(3)采用倒装式接合连接。
13.如权利要求6中所述的半导体器件,其特征在于,
所述半导体芯片(13)的电极与所述内部电极(3)采用倒装式接合连接,而且所述半导体芯片(13)用所述密封树脂(15)覆盖。
CNA2007101866980A 2006-11-20 2007-11-20 布线基板和采用该布线基板的半导体器件 Pending CN101188221A (zh)

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