CN101151730B - 用于图像传感器的3d结构分离式单位像素及其制造方法 - Google Patents

用于图像传感器的3d结构分离式单位像素及其制造方法 Download PDF

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CN101151730B
CN101151730B CN2006800098465A CN200680009846A CN101151730B CN 101151730 B CN101151730 B CN 101151730B CN 2006800098465 A CN2006800098465 A CN 2006800098465A CN 200680009846 A CN200680009846 A CN 200680009846A CN 101151730 B CN101151730 B CN 101151730B
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李道永
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SK Hynix Inc
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Abstract

本发明提供了一种图像传感器的分离式单位像素及其制造方法，其可处理光电二极管上不同角度的入射光线并通过确保入射角裕度而在迷你摄像模块中提供缩放功能。所述包含多个晶体管的、用于图像传感器的、具有3D结构的分离式单位像素包括：第一晶片，其包括光电二极管、传输晶体管、起到将电荷转换为电压的静电作用的浮动扩散区域的结点、以及分别将浮动扩散区域和传输晶体管连接至外电路的衬垫；第二晶片，其包括组成像素的其余电路元件(即，复位晶体管、源极跟随晶体管和阻断开关晶体管)、读出电路、垂直/水平解码器、影响传感器工作和图像质量的相关双采样(CDS)电路、模拟电路、模拟数字转换器(ADC)、数字电路、以及连接每个像素的衬垫；以及连接装置，其连接第一晶片的衬垫和第二晶片的衬垫。因此，通过形成几乎相同的用于光电二极管的区域和用于像素的区域，图像传感器可被制造为具有较好的灵敏性，且无需使用微透镜。此外，通过在顶层设置光电二极管，可确保入射光的入射角裕度，传感器必须基本上提供该入射光的入射角裕度，以实现其自动聚焦功能或缩放功能。

Description

用于图像传感器的3D结构分离式单位像素及其制造方法 
技术领域
本发明涉及图像传感器的单位像素，特别涉及具有一个晶体管和一个光电二极管的图像传感器的单位像素。 
背景技术
根据其内所包含的晶体管的数量，用于传统图像传感器的像素被粗略地分为3晶体管像素、4晶体管像素和5晶体管像素。 
根据晶体管的数量，图1至图3示出了用于图像传感器的典型像素结构。 
图1示出了3晶体管像素的结构。图2和图3示出了4晶体管像素的结构。 
如图1至图3所示，由于像素电路中晶体管的存在，光电二极管的填充因数自然地减小，该填充因数为用于关系到像素尺寸的光电二极管的区域。通常，考虑到每种半导体制造工艺的生产率，填充因数的范围是20％至45％。因此，损失了在该像素其余的55％至80％区域上入射的光线。为了使光学数据的损失降到最小，在图像传感器的制造工艺中，微型透镜被用于每个单位像素，从而使光学数据可被聚集在每个像素的光电二极管上。微透镜的增益被定义为使用了微透镜的传感器的灵敏度相对于未使用微透镜的图像传感器的灵敏度的增量。 
假定普通二极管的填充因数约为30％，微透镜增益约为2.5至2.8倍。然而，后来，像素尺寸已减小至4μm×4μm，甚至减小至3μm×3μm。更进一步地，随着2.8μm×2.8μm或2.5μm×2.5μm的小尺寸像素的出现，从像素尺寸为3.4μm×3.4μm时开始，微透镜增益显著地由2.8倍下降至1.2倍。这是由微透镜的衍射现象所引起的。衍射现象的水平是由像素尺寸的作用和微透镜的位置决定的。 
然而，当像素尺寸逐渐地减小时，微透镜的衍射现象变得更加严重，因此使微透镜增益降低至小于1.2倍，这将导致以下现象，光线聚集看起来没有任何作用。这是最近公认的灵敏度退化的原因。
通常，用于图像传感器的像素尺寸的减小将导致用于光电二极管的区域的减小。用于光电二极管的区域通常与可用电荷的数量密切相关。因此，当光电二极管的尺寸减小时，可用电荷的数量减少。光电二极管的可用电荷的数量是决定图像传感器动态范围的基本特征，并且可用电荷数量的减少直接影响了传感器的图像质量。当制造像素尺寸小于3.2μm×3.2μm的图像传感器时，其灵敏度下降，并且传感器相对于光线的动态范围也下降，从而使图像质量退化。 
在采用了图像传感器的摄像模块的制造工艺中使用外部透镜。在这种情况下，光线基本垂直地入射在像素阵列的中心部分上。然而，光线较少地垂直入射在像素阵列的边缘部分上。当角度由垂直角度偏离预定的度数时，光线被聚集在处于光电二极管所用区域之外的微透镜上，该区域是为了聚集而预设置的。这将造成昏暗的图像，更严重的是，当光线被聚集在邻近像素的光电二极管上时，色度将改变。 
最近，随着具有从0.3兆像素和1.3兆像素至2兆像素和3兆像素的图像传感器的发展，动态放大/缩小功能以及自动聚焦功能被期望包含在迷你摄像模块中。 
各功能的特性在于，当完成每个功能时，光线的入射角在边缘部分显著地变化。传感器的色度或亮度需独立于入射角的变化。然而，随着像素尺寸的减小，传感器无法应付入射角的变化。目前，传感器可实现自动聚焦功能，但动态放大/缩小功能还无法实现。因此，难以使提供缩放功能的迷你摄像模块得到发展。 
发明详述 
发明目的 
为了解决上述问题，本发明的目的是提供一种图像传感器的分离式单位像素及其制造方法，该图像传感器的灵敏度下降远小于在微型像素制造中的传统情况，并能够处理光电二极管上的不同角度的入射光线以及通过确保入射角裕度来提供迷你摄像模块中的缩放功能。 
发明内容
根据本发明的一个方面，提供了一种用于图像传感器的、具有3D结构的分离式单位像素，包括：光电二极管，其包含与半导体材料相反类型的掺杂；浮动扩散区域，其传输包含在所述光电二极管内的光电荷；传输晶体管，其传输在所述光电二极管内产生的所述光电荷并被连接至外电路；以及衬垫，其分别将所述浮动扩散区域的结点和所述传输晶体管连接至所述外电路。 
根据本发明的另一个方面，提供了一种包含多个晶体管的、用于图像传感器的、具有3D结构的分离式单位像素，所述分离式单位像素包括：第一晶片，其包括光电二极管、传输晶体管、起到将电荷转换为电压的静电作用的浮动扩散区域的结点、以及分别将所述浮动扩散区域和所述传输晶体管连接至外电路的衬垫；第二晶片，其包括组成像素的其余电路元件(即，复位晶体管、源极跟随晶体管和阻断开关晶体管)、读出电路、垂直/水平解码器、影响传感器工作和图像质量的相关双采样(CDS)电路、模拟电路、模拟数字转换器(ADC)、数字电路、以及连接每个所述像素的衬垫；以及连接装置，其连接所述第一晶片的所述衬垫和所述第二晶片的所述衬垫。 
根据本发明的另一个方面，提供了一种包含多个晶体管的、用于图像传感器的、具有3D结构的分离式单位像素的制造方法，所述方法包括：(a)构造第一晶片，其包括光电二极管、传输晶体管、以及起到将电荷转换为电压的静电作用的浮动扩散区域；(b)构造第二晶片，其包括组成像素的其余电路元件(即，复位晶体管、源极跟随晶体管和阻断开关晶体管)、读出电路、垂直/水平解码器、影响传感器工作和图像质量的CDS电路、模拟电路、ADC、以及数字电路；(c)将所述第一晶片和所述第二晶片上下排列以用于像素阵列排列；(d)将单位像素的衬垫贴附在上下排列的所述第一晶片和所述第二晶片上；(e)进行表面处理，以减小所述第一晶片的背面的厚度，从而减小所述第一晶片的厚度；并且(f)在所述第一晶片上形成滤色器。 
附图说明
图1至图3示出了图像传感器的传统像素结构的电路图； 
图4至图7示出了根据本发明一个实施方案的图像传感器的分离式单位像素的电路图； 
图8示出了根据本发明一个实施方案的图像传感器的分离式单位像素的物理结构，示出了光电二极管与传输晶体管(transfer transistor)连接部分的物理结构； 
图9示出了图8所示图像传感器的分离式单位像素的电路图； 
图10示出了根据本发明一个实施方案用于图像传感器的、具有3D结构的分离式单位像素的物理结构； 
图11示出了根据本发明的另一个实施方案用于图像传感器的、具有3D结构的分离式单位像素的物理结构； 
图12为根据本发明一个实施方案用于图像传感器的、具有3D结构的分离式单位像素的制造方法的流程图； 
图13示出了根据本发明一个实施方案，当制造用于图像传感器的、具有3D结构的分离式单位像素时，第一晶片和第二晶片是如何排列的；以及 
图14示出了根据本发明一个实施方案，当制造用于图像传感器的、具有3D结构的分离式单位像素时减小第一晶片背面的表面厚度的工艺。 
具体实施方式
以下将结合附图对本发明进行详细描述。 
图4至图7为根据本发明一个实施方案的图像传感器的单位像素结构的电路图。 
光电二极管与传输晶体管连接的部分和复位晶体管、源极跟随晶体管与选择晶体管连接的部分是分开的。这些晶体管可为N型或P型晶体管。 
图8示出了根据本发明一个实施方案的图像传感器的分离式单位像素的物理结构。所示的物理结构是光电二极管与传输晶体管连接的部分。 
光电二极管4具有P型半导体结构。浮动扩散区域5传输包含在光电二极管4内的电荷，并且包含与光电二极管4同类型的掺杂。传输晶体管6连接浮动扩散区域5和光电二极管4并将它们分隔开。衬垫7将浮动扩散区域5连接至外电路。 
图9示出了图8所示图像传感器的分离式单位像素的电路图。 
如图9所示，外部连接衬垫PAD被设置为连接图像传感器的多个分离式单位像素。 
外部连接衬垫PAD被设置于浮动扩散结点FD和传输晶体管6的源极。 
图10示出了根据本发明的实施方案用于图像传感器的、具有3D结构的分离式单位像素。分离式单位像素包括第一晶片10和第二晶片20。 
第一晶片10包括滤色器、光电二极管、晶体管、起到将电荷变换为电压的静电作用的浮动扩散区域、以及衬垫。 
第二晶片20包括组成像素的其余电路元件(即，复位晶体管、源极跟随晶体管和阻断开关晶体管)、读出电路、垂直/水平解码器、影响传感器工作和图像质量的相关双采样(CDS)电路、模拟电路、模拟数字转换器(ADC)以及数字电路。 
传导性的衬垫17和21分别被连接至第一晶片10和第二晶片20以用于外部连接。 
以下将详细描述第一晶片10。 
第一晶片10包括使每个像素呈现出确定颜色的滤色器12、包含特定掺杂以形成光电二极管14的半导体材料13、被插入滤色器12和半导体材料13之间以促进结构的形成并提高透光性的第一透射缓冲层18、包含与半导体材料13相反类型掺杂的光电二极管14、光电二极管14内的电荷向其转移并且包含与光电二极管14同类型掺杂的浮动扩散区域15、以及连接浮动扩散区域15和光电二极管14并将它们分隔开的传输晶体管16。 
在本发明中，浮动扩散区域15被连接至传导性衬垫17以连接至外电路。此外，微衬垫PAD在电极上形成，传输晶体管16通过该电 极被连接至外电路。 
以下将详细描述第二晶片20。 
第二晶片20具有像素阵列部分和外电路部分。外电路部分具有典型的图像传感器结构，并且可包括用于提取图像传感器信号的电路、CDS电路、用于处理普通的模拟信号的电路、数字控制电路、以及图像信号处理数字电路。 
在该像素阵列部分中，像素单元(不包括光电二极管或者与光电二极管一起的转换开关)规则地排列，例如图10的下部所示。传导性衬垫21从上部所示的第一晶片10接收信号。复位晶体管22和电压源23使光电二极管14初始化。源极跟随晶体管24将浮动扩散区域15的电压转移至外电路，浮动扩散区域15为浮动结点。选择晶体管25决定是否允许将给定的像素信息传输至外部引出电路。电极26为该像素的末端输出电极。 
图11示出了根据本发明的另一个实施方案用于图像传感器的、具有3D结构的分离式单位像素。 
与图10相比，图11进一步包括将光线聚集在光电二极管14上的微透镜11和在中间插入以促进结构的形成并提高透光性的第二透射缓冲层19。第二透射缓冲层19被额外地提供，并且其是用于普通图像传感器的薄膜。 
图12为根据本发明的实施方案用于图像传感器的、具有3D结构的分离式单位像素的制造方法的流程图。 
首先，构造第一晶片，从而使第一晶片包括光电二极管、传输晶体管、以及起到将电荷变换为电压的静电作用的浮动扩散区域(操作S511)。 
在构造第一晶片时，构造第二晶片，从而使第二晶片包括组成像素的其余电路元件(即，复位晶体管、源极跟随晶体管和阻断开关晶体管)、读出电路、垂直/水平解码器、影响传感器工作和图像质量的相关双采样(CDS)电路、模拟电路、模拟数字转换器(ADC)以及数字电路(操作S512)。 
第二步，将第一晶片和第二晶片上下排列(操作S530)。 
为了上下排列第一晶片和第二晶片，可利用红外线(IR)穿透方法、蚀刻方法或激光打孔方法在第一晶片内形成孔洞，从而以光学的    方式使晶片排列。 
在IR穿透方法中，可设置晶片而并非必须在第一晶片内形成孔洞。在蚀刻方法或激光打孔方法中，穿过第一晶片形成孔洞，然后通过光学模式识别使晶片排列。 
第三步，将上下排列的第一和第二晶片贴附在传导性衬垫上(操作S530)。 
第四步，减小第一晶片背面的表面厚度，从而形成第一晶片的较薄的背面(操作S540)。 
在第一晶片被贴附在第二晶片上之后，第一晶片的背面被减薄，从而减小晶片厚度。为了减小第一晶片背面的厚度，通过在该晶片的背面表面上进行研磨工艺、化学机械抛光(CMP)工艺或蚀刻工艺而对该晶片的背面进行处理。 
第五步，在第一晶片上形成滤色器(操作S550)。 
第六步，在滤色器上形成微透镜(操作S560)。 
图13示出了根据本发明的实施方案，当制造用于图像传感器的具有3D结构的分离式单位像素时，第一和第二晶片的排列。 
通过利用IR穿透方法、蚀刻方法或激光打孔方法使第一晶片10和第二晶片20精确地对准。 
在图13中，通过利用蚀刻方法或激光打孔方法穿过第一晶片10形成孔洞。 
当利用IR穿透方法时，无需穿过第一晶片形成孔洞。 
图14示出了根据本发明的实施方案当制造用于图像传感器的、具有3D结构的分离式单位像素时减小第一晶片背面的表面厚度的工艺。 
通过利用CMP方法、研磨方法或蚀刻方法完成厚度减小工艺。可通过利用这些方法之一减小第一晶片10背面的厚度。 
用于本发明的图像传感器的、具有3D结构的分离式单位像素的制造方法不仅限于CMOS制造工艺，并且该方法可被用于其他半导体制造工艺。 
尽管结合本发明的示例性实施方案对本发明进行了详细地说明和描述，但本领域技术人员可以理解，在不脱离权利要求所限定的本发明的精神和范围的情况下，可对本发明进行各种形式上和细节上的变化。 
工业适用性 
因此，通过形成几乎相同的用于光电二极管的区域和用于像素的区域，本发明具有以下优点：图像传感器可被制造为在超小型像素内具有较好的灵敏性，且无需使用微透镜。此外，通过在顶层设置光电二极管，可确保入射光的入射角裕度，传感器必须基本上提供该入射光的入射角裕度，以实现其自动聚焦功能或缩放功能。 

Claims (11)

1.一种用于图像传感器且具有3D结构的分离式单位像素，所述分离式单位像素包含多个晶体管，所述分离式单位像素包括：
第一晶片，其包括光电二极管、传输晶体管、起到将电荷转换为电压的静电作用的浮动扩散区域的结点、以及将所述浮动扩散区域和所述传输晶体管连接至外电路的衬垫；
第二晶片，其包括组成像素的其余电路元件、读出电路、垂直/水平解码器、影响传感器工作和图像质量的相关双采样(CDS)电路、模拟电路、模拟数字转换器(ADC)、数字电路、以及连接每个所述像素的衬垫，其中，所述组成像素的其余电路元件是复位晶体管、源极跟随晶体管和阻断开关晶体管；以及
连接装置，其连接所述第一晶片的所述衬垫和所述第二晶片的所述衬垫。
2.如权利要求1所述的分离式单位像素，其中所述第一晶片包括：
半导体材料，其包含用于形成光电二极管的特定掺杂；
滤色器，其使每个所述像素呈现出确定的颜色；
第一透射缓冲层，其被插入滤色器和所述半导体材料之间，以促进结构的形成并提高透光性；
光电二极管，其包含与所述半导体材料相反类型的掺杂；
浮动扩散区域，所述光电二极管内的光电荷被传输至所述浮动扩散区域；
传输晶体管，其将在所述光电二极管内产生的所述光电荷传输至所述浮动扩散区域；以及
衬垫，其将所述浮动扩散区域的结点连接至外电路。
3.如权利要求2所述的分离式单位像素，其中所述第一晶片进一步包括：
微透镜，其将光线聚集在所述光电二极管上；以及
第二透射缓冲层，其被插入所述微透镜和所述滤色器之间，以促进结构的形成并提高透光性。
4.如权利要求1所述的分离式单位像素，其中所述第二晶片包括：
像素阵列部分，在所述像素阵列部分内，除所述光电二极管和所述传输晶体管以外的像素元件被规则地排列；以及
外电路部分，其不包括所述像素阵列部分，并具有图像传感器结构。
5.如权利要求4所述的分离式单位像素，其中所述外电路部分包括用于提取图像传感器信号的电路、CDS电路、用于处理普通的模拟信号的电路、数字控制电路、以及图像信号处理数字电路。
6.一种用于图像传感器且具有3D结构的分离式单位像素的制造方法，所述分离式单位像素包含多个晶体管，所述方法包括：
(a)构造第一晶片，其包括光电二极管、传输晶体管、起到将电荷转换为电压的静电作用的浮动扩散区域以及将所述浮动扩散区域和所述传输晶体管连接至外电路的衬垫；
(b)构造第二晶片，其包括组成像素的其余电路元件、读出电路、垂直/水平解码器、影响传感器工作和图像质量的CDS电路、模拟电路、ADC、数字电路以及连接每个所述像素的衬垫，其中，所述组成像素的其余电路元件是复位晶体管、源极跟随晶体管和阻断开关晶体管；
(c)将所述第一晶片和所述第二晶片上下排列以用于像素阵列排列；
(d)贴附上下排列的所述第一晶片和所述第二晶片的衬垫；
(e)进行表面处理，以减小所述第一晶片的背面的厚度，从而减小所述第一晶片的厚度；并且
(f)在所述第一晶片上形成滤色器。
7.如权利要求6所述的方法，进一步包括：
(g)在所述滤色器上形成微透镜，以聚集光线。
8.如权利要求6或7所述的方法，其中所述步骤(c)利用了红外线(IR)穿透方法、蚀刻方法或激光打孔方法。
9.如权利要求8所述的方法，其中，在所述红外线穿透方法中，配置所述第一晶片和所述第二晶片并无需穿过所述第一晶片形成孔洞，并且在所述蚀刻方法或所述激光打孔方法中，在配置前穿过所述第一晶片形成孔洞。
10.如权利要求6或7所述的方法，其中所述步骤(e)中的所述表面处理采用研磨工艺或化学机械抛光(CMP)工艺。
11.如权利要求6或7所述的方法，其中所述表面处理采用蚀刻工艺。
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