CN100505187C - 用于cmos器件的自形成金属硅化物栅极 - Google Patents
用于cmos器件的自形成金属硅化物栅极 Download PDFInfo
- Publication number
- CN100505187C CN100505187C CNB2006800014309A CN200680001430A CN100505187C CN 100505187 C CN100505187 C CN 100505187C CN B2006800014309 A CNB2006800014309 A CN B2006800014309A CN 200680001430 A CN200680001430 A CN 200680001430A CN 100505187 C CN100505187 C CN 100505187C
- Authority
- CN
- China
- Prior art keywords
- layer
- silicide
- temperature technology
- gate
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
- H10D64/668—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the layer being a silicide, e.g. TiSi2
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
- H10D64/0132—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN the conductor being a metallic silicide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
- H10D84/0174—Manufacturing their gate conductors the gate conductors being silicided
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/905,629 US7105440B2 (en) | 2005-01-13 | 2005-01-13 | Self-forming metal silicide gate for CMOS devices |
| US10/905,629 | 2005-01-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101080811A CN101080811A (zh) | 2007-11-28 |
| CN100505187C true CN100505187C (zh) | 2009-06-24 |
Family
ID=36653783
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006800014309A Expired - Fee Related CN100505187C (zh) | 2005-01-13 | 2006-01-10 | 用于cmos器件的自形成金属硅化物栅极 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7105440B2 (https=) |
| EP (1) | EP1856725A4 (https=) |
| JP (1) | JP2008527743A (https=) |
| KR (1) | KR20070095933A (https=) |
| CN (1) | CN100505187C (https=) |
| TW (1) | TW200636920A (https=) |
| WO (1) | WO2006076373A1 (https=) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4784734B2 (ja) * | 2005-09-12 | 2011-10-05 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| US7687396B2 (en) * | 2006-12-29 | 2010-03-30 | Texas Instruments Incorporated | Method of forming silicided gates using buried metal layers |
| KR100852212B1 (ko) | 2007-06-12 | 2008-08-13 | 삼성전자주식회사 | 반도체 소자 및 이를 형성하는 방법 |
| US7615831B2 (en) * | 2007-10-26 | 2009-11-10 | International Business Machines Corporation | Structure and method for fabricating self-aligned metal contacts |
| US7964923B2 (en) | 2008-01-07 | 2011-06-21 | International Business Machines Corporation | Structure and method of creating entirely self-aligned metallic contacts |
| US9165826B2 (en) | 2011-08-01 | 2015-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a semiconductor device comprising titanium silicon oxynitride |
| US8765603B2 (en) * | 2011-08-01 | 2014-07-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a buffer layer |
| US12389616B2 (en) * | 2022-02-11 | 2025-08-12 | Globalfoundries U.S. Inc. | Transistors with multiple silicide layers |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1081283A (zh) * | 1992-05-30 | 1994-01-26 | 三星电子株式会社 | 具双层硅化物结构的半导体器件及其制造方法 |
| CN1222754A (zh) * | 1997-12-19 | 1999-07-14 | 西门子公司 | 在硅化物膜上进行化学汽相淀积的方法和设备 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5444302A (en) * | 1992-12-25 | 1995-08-22 | Hitachi, Ltd. | Semiconductor device including multi-layer conductive thin film of polycrystalline material |
| JPH06244136A (ja) * | 1992-12-25 | 1994-09-02 | Hitachi Ltd | 半導体装置及びその製造方法 |
| JPH1117182A (ja) * | 1997-06-26 | 1999-01-22 | Sony Corp | 半導体装置およびその製造方法 |
| JPH11135789A (ja) * | 1997-10-31 | 1999-05-21 | Nippon Steel Corp | 半導体装置およびその製造方法 |
| JP2000252462A (ja) * | 1999-03-01 | 2000-09-14 | Toshiba Corp | Mis型半導体装置及びその製造方法 |
| US6562718B1 (en) | 2000-12-06 | 2003-05-13 | Advanced Micro Devices, Inc. | Process for forming fully silicided gates |
| US6555453B1 (en) | 2001-01-31 | 2003-04-29 | Advanced Micro Devices, Inc. | Fully nickel silicided metal gate with shallow junction formed |
| US6878623B2 (en) * | 2001-02-01 | 2005-04-12 | Chartered Semiconductor Manufacturing Ltd. | Technique to achieve thick silicide film for ultra-shallow junctions |
| US7029966B2 (en) * | 2003-09-18 | 2006-04-18 | International Business Machines Corporation | Process options of forming silicided metal gates for advanced CMOS devices |
-
2005
- 2005-01-13 US US10/905,629 patent/US7105440B2/en not_active Expired - Fee Related
-
2006
- 2006-01-04 TW TW095100297A patent/TW200636920A/zh unknown
- 2006-01-10 KR KR1020077015594A patent/KR20070095933A/ko not_active Ceased
- 2006-01-10 EP EP06717971A patent/EP1856725A4/en active Pending
- 2006-01-10 JP JP2007551329A patent/JP2008527743A/ja active Pending
- 2006-01-10 CN CNB2006800014309A patent/CN100505187C/zh not_active Expired - Fee Related
- 2006-01-10 WO PCT/US2006/000838 patent/WO2006076373A1/en not_active Ceased
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1081283A (zh) * | 1992-05-30 | 1994-01-26 | 三星电子株式会社 | 具双层硅化物结构的半导体器件及其制造方法 |
| CN1222754A (zh) * | 1997-12-19 | 1999-07-14 | 西门子公司 | 在硅化物膜上进行化学汽相淀积的方法和设备 |
Also Published As
| Publication number | Publication date |
|---|---|
| US7105440B2 (en) | 2006-09-12 |
| EP1856725A4 (en) | 2009-01-14 |
| KR20070095933A (ko) | 2007-10-01 |
| EP1856725A1 (en) | 2007-11-21 |
| JP2008527743A (ja) | 2008-07-24 |
| US20060154413A1 (en) | 2006-07-13 |
| WO2006076373A1 (en) | 2006-07-20 |
| CN101080811A (zh) | 2007-11-28 |
| TW200636920A (en) | 2006-10-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090624 Termination date: 20110110 |