CN100448008C - 半导体器件和用于制造半导体器件的方法 - Google Patents

半导体器件和用于制造半导体器件的方法 Download PDF

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Publication number
CN100448008C
CN100448008C CNB2006100066428A CN200610006642A CN100448008C CN 100448008 C CN100448008 C CN 100448008C CN B2006100066428 A CNB2006100066428 A CN B2006100066428A CN 200610006642 A CN200610006642 A CN 200610006642A CN 100448008 C CN100448008 C CN 100448008C
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CN
China
Prior art keywords
gate electrode
gate
insulating film
semiconductor substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB2006100066428A
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English (en)
Chinese (zh)
Other versions
CN1819200A (zh
Inventor
木下敦宽
土屋义规
古贺淳二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japanese Businessman Panjaya Co ltd
Kioxia Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Publication of CN1819200A publication Critical patent/CN1819200A/zh
Application granted granted Critical
Publication of CN100448008C publication Critical patent/CN100448008C/zh
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01322Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor contacting the insulator having a lateral variation in doping, composition or deposition steps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01318Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
    • H10D64/0132Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN the conductor being a metallic silicide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0179Manufacturing their gate conductors the gate conductors having different shapes or dimensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0278Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline channels on wafers after forming insulating device isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/30Diffusion for doping of conductive or resistive layers
    • H10P32/302Doping polycrystalline silicon or amorphous silicon layers

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
CNB2006100066428A 2005-01-27 2006-01-27 半导体器件和用于制造半导体器件的方法 Expired - Lifetime CN100448008C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005019293 2005-01-27
JP2005019293A JP4473741B2 (ja) 2005-01-27 2005-01-27 半導体装置および半導体装置の製造方法

Publications (2)

Publication Number Publication Date
CN1819200A CN1819200A (zh) 2006-08-16
CN100448008C true CN100448008C (zh) 2008-12-31

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CNB2006100066428A Expired - Lifetime CN100448008C (zh) 2005-01-27 2006-01-27 半导体器件和用于制造半导体器件的方法

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Country Link
US (3) US20060163662A1 (https=)
JP (1) JP4473741B2 (https=)
CN (1) CN100448008C (https=)

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JP4440080B2 (ja) * 2004-11-12 2010-03-24 株式会社東芝 半導体装置およびその製造方法
JP2007081249A (ja) * 2005-09-15 2007-03-29 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
CN1945852A (zh) * 2005-10-06 2007-04-11 松下电器产业株式会社 半导体装置及其制造方法
US20070090417A1 (en) * 2005-10-26 2007-04-26 Chiaki Kudo Semiconductor device and method for fabricating the same
JP2007173347A (ja) * 2005-12-20 2007-07-05 Renesas Technology Corp 半導体装置及びその製造方法
US20080093682A1 (en) * 2006-10-18 2008-04-24 Liang-Gi Yao Polysilicon levels for silicided structures including MOSFET gate electrodes and 3D devices
US20080237743A1 (en) * 2007-03-30 2008-10-02 Texas Instruments Incorporated Integration Scheme for Dual Work Function Metal Gates
US7482270B2 (en) * 2006-12-05 2009-01-27 International Business Machines Corporation Fully and uniformly silicided gate structure and method for forming same
US7550808B2 (en) * 2007-01-18 2009-06-23 International Business Machines Corporation Fully siliciding regions to improve performance
US20080173950A1 (en) * 2007-01-18 2008-07-24 International Business Machines Corporation Structure and Method of Fabricating Electrical Structure Having Improved Charge Mobility
WO2009101763A1 (ja) * 2008-02-12 2009-08-20 Panasonic Corporation 半導体装置及びその製造方法
US9934976B2 (en) * 2008-12-18 2018-04-03 Intel Corporation Methods of forming low interface resistance rare earth metal contacts and structures formed thereby
JP2010258124A (ja) * 2009-04-23 2010-11-11 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法
US8642371B2 (en) * 2011-04-06 2014-02-04 Shamsoddin Mohajerzadeh Method and system for fabricating ion-selective field-effect transistor (ISFET)
CN104094383A (zh) * 2011-08-22 2014-10-08 1366科技公司 用于硅晶片的湿法酸化学蚀刻的制剂
US8629512B2 (en) * 2012-03-28 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Gate stack of fin field effect transistor with slanted sidewalls
US9111783B2 (en) * 2012-04-13 2015-08-18 Renesas Electronics Corporation Semiconductor devices with self-aligned source drain contacts and methods for making the same
US8921178B2 (en) * 2012-05-16 2014-12-30 Renesas Electronics Corporation Semiconductor devices with self-aligned source drain contacts and methods for making the same
CN103854980B (zh) * 2012-11-29 2016-05-11 中国科学院微电子研究所 形成半导体器件替代栅的方法以及制造半导体器件的方法
KR20160055784A (ko) * 2013-09-27 2016-05-18 인텔 코포레이션 공통 기판 상의 상이한 일함수를 가지는 비-평면 i/o 및 논리 반도체 디바이스들
US9520500B1 (en) * 2015-12-07 2016-12-13 International Business Machines Corporation Self heating reduction for analog radio frequency (RF) device
US10096596B2 (en) * 2015-12-15 2018-10-09 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure having a plurality of gate structures
KR102890787B1 (ko) * 2020-04-07 2025-11-26 삼성전자주식회사 게이트 스페이서를 갖는 반도체 소자들
US12490510B2 (en) * 2020-08-12 2025-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of forming the same
US20230187535A1 (en) * 2021-12-14 2023-06-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure with modified spacer and method for forming the same

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US20020052086A1 (en) * 2000-10-31 2002-05-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method of manufacturing same
WO2004057659A1 (en) * 2002-12-20 2004-07-08 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device and semiconductor device obtained with such a method

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US20020052086A1 (en) * 2000-10-31 2002-05-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method of manufacturing same
WO2004057659A1 (en) * 2002-12-20 2004-07-08 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device and semiconductor device obtained with such a method

Non-Patent Citations (2)

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Title
Totally Silicided (CoSi2) Polysilicon: a novel approach to verylow-resistive gate without metal CMP nor etching. B. Tavel, T. Skotnicki, et al.IEEE,IEDM 01. 2001
Totally Silicided (CoSi2) Polysilicon: a novel approach to verylow-resistive gate without metal CMP nor etching. B. Tavel, T. Skotnicki, et al.IEEE,IEDM 01. 2001 *

Also Published As

Publication number Publication date
JP2006210555A (ja) 2006-08-10
US20080308877A1 (en) 2008-12-18
CN1819200A (zh) 2006-08-16
US8357580B2 (en) 2013-01-22
US20060163662A1 (en) 2006-07-27
US20100062575A1 (en) 2010-03-11
JP4473741B2 (ja) 2010-06-02

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Patentee after: TOSHIBA MEMORY Corp.

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Patentee before: Japanese businessman Panjaya Co.,Ltd.

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Granted publication date: 20081231