CN100358133C - 晶背上具有整合散热座的晶圆级封装以及晶片的散热方法 - Google Patents
晶背上具有整合散热座的晶圆级封装以及晶片的散热方法 Download PDFInfo
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Abstract
本发明提供一种晶背上具有整合散热座的晶圆级封装以及晶片的散热方法,具体涉及一种IC晶片的散热座及其IC晶片散热的方法,其实施方式可包括:于晶背上沉积晶种层以形成IC晶片的散热座,其中晶圆上具有多个集成电路晶片。然后沉积一光致抗蚀剂层于晶种层上并图案化之以定义多个光致抗蚀剂开口。电镀金属于光致抗蚀剂开口以形成多个散热柱于晶种上。最后除去自晶种层上延伸的光致抗蚀剂以定义多个散热柱,其中该些散热柱自晶种层延伸且该些散热柱间具有网状散热通道。晶片运作时可透过散热座散热。本发明所述IC晶片散热座,其是低成本、每单位面积具有有效的热传递以及具有小尺寸的晶片封装。
Description
技术领域
本发明是有关于一种半导体集成电路的覆晶封装,特别有关于一种新式的改良晶片散热座装置以及于集成电路(IC)晶片运作中的散热方法。
背景技术
半导体集成电路的最后制程之一为多层级封装,其方法包括增加I C晶片的电极距离,保护晶片免于受机械与外界应力;提供适当的热途径以借由晶片引导散热并形成电性连接。晶片封装的方法决定了封装晶片的整个制程花费、功能以及可靠度以及提供封装的系统。
IC晶片封装一般可广泛地分类为二:一是将晶片封装于一陶瓷封装以借由真空密封与外界隔绝。此封装为典型陶瓷并应用于高效能需求。另一晶片封装于一塑料封装,换句话说,由于封胶主要是由环氧树脂组成,因此晶片并非完全与外界环境隔绝。所以周围空气会渗透封包并对晶片产生不良影响。然而最近改良塑料封装已将其范围及运用能力扩大。由于塑料封装的制程有助于自动整批处理因此较符合经济效益。
球栅阵列(BGA)封装为最近发展的IC晶片封装,其可利用陶瓷封装或塑料封装并可为不同种类的集成封装结构。球栅阵列(BGA)封装是使用焊锡球或凸块以电性及机械内连接晶片至其它微电子装置。晶粒自晶圆分割后,通常借由形成焊锡凸块于电路晶片或晶粒上,以保护连接至电路板的IC晶片并电性连接晶片电路至形成于电路板上的导电图案。BGA技术属于覆晶技术的领域。
覆晶封装技术可用于连接不同种类的电路板,包括陶瓷基板、印刷电路板、软性电路板以及硅基板。焊锡凸块一般设置于覆晶周围,借由导电连接垫以电性内连接覆晶上的电路。由于覆晶的微电路提供多种功能,因此通常需要较多的焊锡凸块。覆晶尺寸一般为每边13毫米以沿覆晶边缘塞满焊锡凸块。因此覆晶导电图案由多个各别的导体组成,其中该分隔的间距约0.1毫米或更小。
请参照图1A其是显示一般覆晶26的剖面图,其包括例如一上层导电层16与下层导电层22透过一绝缘层18相互分隔。下层的多个导电层22借由绝缘层18彼此分隔。而导电层16、22透过穿过绝缘层18的导电介层孔20彼此相互电性连接。绝缘层18及导电层22是以传统方式依序沉积于硅基板24上。
于形成多个IC晶片或晶粒沉积于单一半导体晶圆基板24上之后,基板24会切割成独立的晶粒。多个焊锡凸块10接着直接焊接至连续的各别凸块垫14的上表面,其中每一焊锡垫14外型呈矩形,且部分被保护层12覆盖。凸块垫14周围由介电层15(例如:基板26中的氧化物)环绕。此外同样参照图1A,每一焊锡垫14皆与上导电层16形成电性接触。
请参照图1B,于覆晶26上形成焊锡凸块10后,将晶片26反转(一般称之为覆晶)而焊锡凸块10连接至基板28(例如:印刷电路板)的导电端。最后将金属散热座30装设于覆晶26的基板24背面25,以于集成电路装置(而覆晶26是其中的一部分)操作时散热。散热座30包括多个散热缝32,并利用含有银粒的涂胶34连接于基板背面25。一般在涂胶34以及基板背面25之间会设置一层金属盖36。
利用传统方式装设散热座于晶体电路晶片具有几项缺点。其中之一是于晶粒分割及封装后,装设散热座至每一封装晶粒需要高成本,另一是晶片封装尺寸大。因此业界急需一种新的改良式晶片散热座装置及方法以降低成本及其封装尺寸。
发明内容
本发明的一目的在于提供一种新的散热座以应用于集成电路晶片。
本发明的另一目的在于提供一种新IC晶片散热座以减小封装尺寸。
本发明的再一目的在于提供一种新的IC晶片散热座以降低成本。
本发明的又一目的在于提供一种新的IC晶片散热座以使晶片的每单位面积具有高速的热传递。
本发明的又一目的在于提供一种新的IC晶片散热座及方法,以利用连续的制程步骤同时形成在所有IC晶片或晶粒于晶圆基板上。
根据上述及其它目的,本发明提供一种新的IC晶片散热座,其具有低成本、每单位面积具有有效的热传递以及具有小尺寸的晶片封装。典型的实施例是先沉积一金属晶种层于半导体晶圆背面,以形成IC晶片散热座,其中半导体晶圆上具有多个IC晶片。然后沉积一光致抗蚀剂层于该晶种层上并图案化之以定义多个光致抗蚀剂开口。电镀金属于光致抗蚀剂开口以形成多个散热柱于晶种上。最后除去晶种层上的光致抗蚀剂以定义多个散热柱使其自晶种层延伸以及一网状散热通道延伸于该些散热柱之间。
本发明更包括于电子产品操作中产品中的IC晶片的散热方法。典型实施例的方法包括:提供一半导体晶圆;形成多个IC晶片于该晶圆上;沉积金属晶种层于晶圆背面;沉积光致抗蚀剂层于晶种层上;图案化多个光致抗蚀剂开口于光致抗蚀剂层中;沉积金属于光致抗蚀剂开口中及晶种层上;清除晶种层上的光致抗蚀剂层;分割IC晶片,其中IC晶片散热座留在每一晶片背片;将每一晶片封装于电子产品中;以及于电子产品运作时透过散热座使晶片散热。
本发明是这样实现的:
本发明提供一种晶背上具有整合散热座的晶圆级封装,所述晶背上具有整合散热座的晶圆级封装包括:一半导体晶圆,具有一晶背以及一图案化表面;多个集成电路晶片于该晶圆的图案化表面上;以及一散热座于该晶背上以热传导每一该集成电路晶片,该晶背的散热座包括一金属晶种层于该晶背以及一金属层于该晶种层上。
本发明所述的晶背上具有整合散热座的晶圆级封装,该晶背的散热座是利用沉积散热材料于该晶背上并经由蚀刻而成。
本发明所述的晶背上具有整合散热座的晶圆级封装,该散热座包括多个散热柱以及一网状散热通道延伸于该些散热柱之间。
本发明所述的晶背上具有整合散热座的晶圆级封装,更包括多个焊锡凸块于该图案化表面上以电性接触该集成电路晶片。
本发明所述的晶背上具有整合散热座的晶圆级封装,该散热座是导热金属,其择自由铜、银以及钛所组成的族群。
本发明所述的晶背上具有整合散热座的晶圆级封装,该多个集成电路晶片是覆晶晶片。
本发明另提供一种集成电路晶片的散热方法,所述集成电路晶片的散热方法包括:提供一半导体晶圆,具有一晶背以及一图案化表面;提供多个集成电路晶片于该晶圆上,其是借由制作集成电路于该图案化表面上,每一该集成电路晶片具有一所述集成电路;形成一散热座于该晶背上;以及将每一集成电路晶片相互分割,以使该散热座形成于每一该集成电路晶片上。
本发明所述的集成电路晶片的散热方法,形成该散热座于该晶背上包括提供一金属晶种层于该晶背上,然后提供一图案化光致抗蚀剂层于该晶种层上,再沉积一金属于该晶种层上以及移除该晶种层上的该光致抗蚀剂层。
本发明所述的集成电路晶片的散热方法,该散热座包括多个散热柱以及一网状散热通道延伸于该些散热柱之间。
本发明所述的集成电路晶片的散热方法,该散热座是导热金属,其是择自由铜、银以及钛所组成的族群。
本发明所述的集成电路晶片的散热方法,该散热座是利用沉积散热材料于该晶背并经由蚀刻而成。
本发明所述的集成电路晶片的散热方法,更包括提供多个焊锡凸块于该图案化表面以于形成该散热座于该晶背之前先与该集成电路电性接触。
本发明所述的集成电路晶片的散热方法,于每一集成电路晶片相互分割后,封装每一该集成电路晶片,其是借由提供多个基板并个别连接该些晶片至该些基板上。
附图说明
图1A是显示半导体晶圆基板的部分剖面图,其图解说明以传统的球栅阵列(BGA)IC晶片封装结构的方式,提供焊锡凸块以电性连接沉积于基板上的导电层;
图1B是显示传统集成电路覆晶的封装以及传统提供散热座于晶片背面的剖面图;
图2是显示一集成电路覆晶剖面图,根据本发明其具有散热座于晶片背面;
图3是显示图2的部分区域的IC晶片散热座的上视图;
图4A至图4G是显示集成电路覆晶的剖面图,其是图解说明根据本发明方法制作散热座于覆晶背面的连续制程步骤;
图5是显示根据本发明的一方法的连续制程步骤的流程图;
图6是显示根据本发明的另一方法的连续制程步骤的流程图。
具体实施方式
为让本发明的上述和其它目的、特征和优点能更明显易懂,下文特举出较佳实施例,并配合所附图式,作详细说明如下:
请参照图2、图3,其是绘示本发明一较佳实施例的IC晶片散热座58于覆晶40上。覆晶40包括:IC晶片42其具有图案化表面44a以及一晶背44b的典型硅半导体晶圆44,而该图案化表面44a覆盖一保护层50。于制作半导体的过程中,集成电路(未显示)逐渐地形成于图案化表面44a上。利用本领域技术人员的技术形成焊锡凸块46,以各别透过于图案化表面44a的凸块垫48电性连接集成电路(ICs)。
一般于封装过程中在制作集成电路晶面散热座于其上后将该晶片42翻转并于其上形成焊锡凸块以电性接触基板54,例如印刷电路板以用于电子产品中。一般常利用环氧树脂52来固定IC晶片42于基板54上。接着提供基板54以透过焊锡凸块56电性接触电子产品的其它的电路(未显示)。根据本领域技术人员的技术进行封装以及组合步骤。
覆晶40的IC晶片散热座58是由高热传导金属形成。适用于制作体电路晶片散热座58的金属包括铜、银以及钛,但亦可包括其它金属。IC晶片散热座58包括形成于半导体晶圆44背面44b的金属晶种层60。多个散热柱62彼此相互间隔邻接并自晶种层60表面垂直延伸。如图3所示,邻接的散热柱62以交错的行74及列76的阵列排列以定义出交错的散热通道64网。如图2所示,每一散热柱62的散热柱高78至少约100微米而其散热柱宽80约10至100微米。
请参照图4A至图4G,其是显示制作集成电路散热座于IC晶片42上。于图4A至图4G中,简单地显示单一IC晶片42,然而根据本发明方法于将晶圆分割成各自独立的晶片前,于整个半导体晶圆44背面44b形成IC晶片散热座58。因此于下述中,在晶粒切割与分割后,每一IC晶片42上便具有IC晶片散热座58。
根据本发明方法,IC晶片散热座的典型制法如下。整个半导体制作方法,是开始于制作集成电路(未显示)于半导体晶圆44的图案化表面44a上。接着提供连接垫以电性接触每一IC晶片42的集成电路。然后请参照图4A,焊锡凸块46对应地形成于连接垫上。
接着请参照图4B,一保护层薄板66沉积于图案化表面44a上,以于制作IC晶面散热座58时覆盖并保护焊锡凸块46。保护层薄板66的厚度足以覆盖焊锡凸块46,并可利用本领域技术人员所知的传统化学气相沉积技术沉积保护层薄板66于图案化表面44a上。
请参照图4C,接着将晶片42翻转并于半导体晶片44的背面44b沉积金属晶种层60。在此金属晶种层60可为铜、银、钛或其它导热金属。其中晶种层60是利用传统的物理气相沉积溅镀步骤形成于晶背44b上。
请参到图4D,沉积一光致抗蚀剂层68于金属晶种层60上,其中光致抗蚀剂层68一般为干膜光致抗蚀剂。光致抗蚀剂层68的厚度68a以至少100微米较佳,接着将光致抗蚀剂层68图案化以于晶种层60上形成尺寸大小及位置符合各个散热柱62(如图2)的多个光致抗蚀剂开口70。每一光致抗蚀剂开口70的一般宽度70a约10至100微米。
请参照图4E,沉积金属层72于晶种层上60以填充光致抗蚀剂层68的光致抗蚀剂开口70。其中金属层72是68利用传统电化学电镀技术沉积,而金属层72厚度与光致抗蚀剂层的厚度68a实质上相同。完成电镀后,化学机械研磨法平坦化金属层72并依所需移除过量的金属层72。
请参照图4F,接着移除晶种层60上的光致抗蚀剂层68以完成IC晶片散热座58的制作。因此IC晶片散热座58的散热柱自晶种层60延伸,并大抵与晶种层60表面垂直。同时保护层薄板66会自半导体晶圆44的图案化表面44a移除。或者保护层薄板66亦可于另外的制程步骤中自半导体晶圆44移除。
于完成上述的散热座制程步骤后,连续散热座58覆盖于整个半导体晶圆44背面,包括先前形成于晶圆44上的所有IC晶片42背面。接着将制作于半导体晶圆44上的多个IC晶片42借由晶圆的切割而彼此分开且散热座58顺着切刻线(未显示)。于晶片分割制程后,IC晶片散热座58留在每一晶片42背面。
请参照图4G,借由将每一IC晶片42的焊锡凸块46贴附至基板54上以完成每一覆晶40的装配,贴附方式一般是利用环氧树脂52。接着根据本领域技术人员的技术,将覆晶40装设于电子产品中(未显示)。
请参照图5,其是显示根据本发明方法的制程步骤的流程图。步骤1,是先将IC装置制作于半导体晶圆上。步骤2,是形成连接垫以电性连接IC装置与形成于凸块垫上的焊锡凸块。步骤3是于焊锡凸块上形成保护层薄板,以于后续散热座制作过程中保护焊锡凸块。
步骤4是沉积金属晶种层于晶圆背面。步骤5于晶种层上层压并图案化一光致抗蚀剂层。步骤6是电镀金属于晶种层上以及光致抗蚀剂开口中。步骤7是除去晶圆上的光致抗蚀剂与保护层。步骤8利用晶粒分割制程,将先前形成于晶圆上的多个IC晶片彼此分隔,其中每一IC晶片背面具有散热座。于步骤9完成晶片封装制程,每一IC晶片连接至基板(例如:印刷电路板)并将覆晶装配成电子产品。
请参照图6,其是显示根据本发明另一方法的制程步骤的流程图。制程步骤1至3与上述图5的步骤1至3相同。然而制程步骤4a是沉积金属层于晶圆背面。制程步骤5a是沉积一光致抗蚀剂层于金属层上以图案化形成光致抗蚀剂开口来定义散热通道的尺寸与构造以于后续蚀刻金属层。制程步骤6a是蚀刻透过光致抗蚀剂开口所露出的部分金属层以于金属层中形成网状散热通道。而制程步骤7、8、9与上述图5的步骤7、8、9相同。
以上所述仅为本发明较佳实施例,然其并非用以限定本发明的范围,任何熟悉本项技术的人员,在不脱离本发明的精神和范围内,可在此基础上做进一步的改进和变化,因此本发明的保护范围当以本申请的权利要求书所界定的范围为准。
附图中符号的简单说明如下:
10:焊锡凸块
12:保护层
14:凸块垫
15:介电层
16:导电层
18:绝缘层
20:导电介层孔
22:导电层
24:硅基板
25:背面
26:基板
28:基板
30:散热座
32:散热缝
34:涂胶
36:金属盖
40:覆晶
42:IC晶片
44:半导体晶圆
44a:图案化表面
44b:背面
46:焊锡凸块
48:凸块垫
50:保护层
52:环氧树脂
54:基板
56:焊锡凸块
58:散热座
60:光致抗蚀剂层
62:散热柱
64:散热通道
66:保护层薄板
68:光致抗蚀剂层
68a:厚度
70:光致抗蚀剂开口
70a:宽度
72:金属层
74:行
76:列
78:散热柱高
80:散热柱宽
1:制作装置于晶圆上
2:提供连接垫及焊锡凸块于晶圆上
3:提供保护层于焊锡凸块上
4:沉积金属晶种层于晶圆背面
5:沉积并图案化光致抗蚀剂层于晶种层上
6:电镀金属于光致抗蚀剂层开口
7:自晶圆上移除光致抗蚀剂层及保护层
8:分割晶片
9:封装晶片
4a:沉积金属层于晶背上
5a:沉积并图案化光致抗蚀剂层于金属层上
6a:蚀刻散热通道于金属层中
7a:自金属层上移除光致抗蚀剂层
Claims (13)
1、一种晶背上具有整合散热座的晶圆级封装,所述晶背上具有整合散热座的晶圆级封装包括:
一半导体晶圆,具有一晶背以及一图案化表面;
多个集成电路晶片于该晶圆的图案化表面上;以及
一散热座于该晶背上以热传导每一该集成电路晶片,该晶背的散热座包括一金属晶种层于该晶背以及一金属层于该晶种层上。
2、根据权利要求1所述的晶背上具有整合散热座的晶圆级封装,其特征在于:该晶背的散热座是利用沉积散热材料于该晶背上并经由蚀刻而成。
3、根据权利要求1所述的晶背上具有整合散热座的晶圆级封装,其特征在于:该散热座包括多个散热柱以及一网状散热通道延伸于该些散热柱之间。
4、根据权利要求1所述的晶背上具有整合散热座的晶圆级封装,其特征在于:更包括多个焊锡凸块于该图案化表面上以电性接触该集成电路晶片。
5、根据权利要求1所述的晶背上具有整合散热座的晶圆级封装,其特征在于:该散热座是导热金属,其择自由铜、银以及钛所组成的族群。
6、根据权利要求1所述的晶背上具有整合散热座的晶圆级封装,其特征在于:该多个集成电路晶片是覆晶晶片。
7、一种集成电路晶片的散热方法,所述集成电路晶片的散热方法包括:
提供一半导体晶圆,具有一晶背以及一图案化表面;
提供多个集成电路晶片于该晶圆上,其是借由制作集成电路于该图案化表面上,每一该集成电路晶片具有一所述集成电路;
形成一散热座于该晶背上;以及
将每一集成电路晶片相互分割,以使该散热座形成于每一该集成电路晶片上。
8、根据权利要求7所述的集成电路晶片的散热方法,其特征在于:形成该散热座于该晶背上包括提供一金属晶种层于该晶背上,然后提供一图案化光致抗蚀剂层于该晶种层上,再沉积一金属于该晶种层上以及移除该晶种层上的该光致抗蚀剂层。
9、根据权利要求7所述的集成电路晶片的散热方法,其特征在于:该散热座包括多个散热柱以及一网状散热通道延伸于该些散热柱之间。
10、根据权利要求7所述的集成电路晶片的散热方法,其特征在于:该散热座是导热金属,其是择自由铜、银以及钛所组成的族群。
11、根据权利要求7所述的集成电路晶片的散热方法,其特征在于:该散热座是利用沉积散热材料于该晶背并经由蚀刻而成。
12、根据权利要求7所述的集成电路晶片的散热方法,其特征在于:更包括提供多个焊锡凸块于该图案化表面以于形成该散热座于该晶背之前先与该集成电路电性接触。
13、根据权利要求7所述的集成电路晶片的散热方法,其特征在于:于每一集成电路晶片相互分割后,封装每一该集成电路晶片,其是借由提供多个基板并个别连接该些晶片至该些基板上。
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US10/851,576 US20050258536A1 (en) | 2004-05-21 | 2004-05-21 | Chip heat sink device and method |
US10/851,576 | 2004-05-21 |
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CN102915979A (zh) * | 2011-08-02 | 2013-02-06 | 南茂科技股份有限公司 | 芯片封装结构及其制作方法 |
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US20070037376A1 (en) * | 2005-08-11 | 2007-02-15 | Texas Instruments Incorporated | Method and apparatus for fine pitch solder joint |
JP5165207B2 (ja) * | 2006-03-29 | 2013-03-21 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置の製造方法 |
US8018050B2 (en) * | 2007-11-01 | 2011-09-13 | National Semiconductor Corporation | Integrated circuit package with integrated heat sink |
TWI376022B (en) | 2008-12-05 | 2012-11-01 | Ind Tech Res Inst | Semiconductor package structure and method of fabricating the same |
CN101752328A (zh) * | 2008-12-18 | 2010-06-23 | 财团法人工业技术研究院 | 半芯片封装结构及其制造方法 |
TWI421990B (zh) * | 2009-12-11 | 2014-01-01 | Alpha & Omega Semiconductor | 低襯底電阻的晶圓級晶片尺寸封裝及其製造方法 |
US8283776B2 (en) | 2010-01-26 | 2012-10-09 | Qualcomm Incorporated | Microfabricated pillar fins for thermal management |
CN103811365A (zh) * | 2014-01-23 | 2014-05-21 | 南通富士通微电子股份有限公司 | 芯片级封装方法 |
CN105357859A (zh) * | 2015-10-20 | 2016-02-24 | 上海斐讯数据通信技术有限公司 | 一种散热结构及印制电路板 |
CN112164683A (zh) * | 2020-08-24 | 2021-01-01 | 杰群电子科技(东莞)有限公司 | 一种背面设有金属层的裸芯封装结构 |
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US6069023A (en) * | 1996-06-28 | 2000-05-30 | International Business Machines Corporation | Attaching heat sinks directly to flip chips and ceramic chip carriers |
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