CH675323A5 - - Google Patents

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Publication number
CH675323A5
CH675323A5 CH506287A CH506287A CH675323A5 CH 675323 A5 CH675323 A5 CH 675323A5 CH 506287 A CH506287 A CH 506287A CH 506287 A CH506287 A CH 506287A CH 675323 A5 CH675323 A5 CH 675323A5
Authority
CH
Switzerland
Prior art keywords
conductive layer
substrate
layer
combined adhesive
adhesive
Prior art date
Application number
CH506287A
Other languages
German (de)
English (en)
Inventor
Gianni Dr Berner
Gerold Dr Braendli
Urs Brunner
Original Assignee
Contraves Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Contraves Ag filed Critical Contraves Ag
Priority to CH506287A priority Critical patent/CH675323A5/de
Priority to DE19883837009 priority patent/DE3837009A1/de
Publication of CH675323A5 publication Critical patent/CH675323A5/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4076—Through-connections; Vertical interconnect access [VIA] connections by thin-film techniques
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
CH506287A 1987-12-24 1987-12-24 CH675323A5 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CH506287A CH675323A5 (fr) 1987-12-24 1987-12-24
DE19883837009 DE3837009A1 (de) 1987-12-24 1988-10-31 Verfahren zum herstellen einer duennschichtschaltung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH506287A CH675323A5 (fr) 1987-12-24 1987-12-24

Publications (1)

Publication Number Publication Date
CH675323A5 true CH675323A5 (fr) 1990-09-14

Family

ID=4287307

Family Applications (1)

Application Number Title Priority Date Filing Date
CH506287A CH675323A5 (fr) 1987-12-24 1987-12-24

Country Status (2)

Country Link
CH (1) CH675323A5 (fr)
DE (1) DE3837009A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6184579B1 (en) 1998-07-07 2001-02-06 R-Amtech International, Inc. Double-sided electronic device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0386458A1 (fr) * 1989-03-04 1990-09-12 Oerlikon-Contraves AG Méthode pour fabriquer des circuits imprimés à couches minces avec des structures d'étain
DE3907004A1 (de) * 1989-03-04 1990-09-06 Contraves Ag Verfahren zum herstellen von duennschichtschaltungen

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3360349A (en) * 1965-04-01 1967-12-26 Sperry Rand Corp Copper layer bonded to a non-conductive layer by means of a copper alloy
US3832176A (en) * 1973-04-06 1974-08-27 Eastman Kodak Co Novel photoresist article and process for its use
EP0163830A2 (fr) * 1984-04-06 1985-12-11 International Business Machines Corporation Substrats multi-couches pour circuits intégrés et leur procédé de fabrication
DE3433251A1 (de) * 1984-08-16 1986-02-27 Robert Bosch Gmbh, 7000 Stuttgart Verfahren zur herstellung von galvanischen lotschichten auf anorganischen substraten

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2290762A1 (fr) * 1974-11-06 1976-06-04 Lignes Telegraph Telephon Procede de realisation de contacts ohmiques pour circuits en couche mince
DE3524832A1 (de) * 1985-07-11 1987-01-15 Siemens Ag Herstellung von duennfilmschaltungen

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3360349A (en) * 1965-04-01 1967-12-26 Sperry Rand Corp Copper layer bonded to a non-conductive layer by means of a copper alloy
US3832176A (en) * 1973-04-06 1974-08-27 Eastman Kodak Co Novel photoresist article and process for its use
EP0163830A2 (fr) * 1984-04-06 1985-12-11 International Business Machines Corporation Substrats multi-couches pour circuits intégrés et leur procédé de fabrication
DE3433251A1 (de) * 1984-08-16 1986-02-27 Robert Bosch Gmbh, 7000 Stuttgart Verfahren zur herstellung von galvanischen lotschichten auf anorganischen substraten

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6184579B1 (en) 1998-07-07 2001-02-06 R-Amtech International, Inc. Double-sided electronic device

Also Published As

Publication number Publication date
DE3837009A1 (de) 1989-07-06

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PL Patent ceased