CH555596A - Verfahren zur herstellung metallischer anschluesse an halbleiter. - Google Patents
Verfahren zur herstellung metallischer anschluesse an halbleiter.Info
- Publication number
- CH555596A CH555596A CH1513873A CH1513873A CH555596A CH 555596 A CH555596 A CH 555596A CH 1513873 A CH1513873 A CH 1513873A CH 1513873 A CH1513873 A CH 1513873A CH 555596 A CH555596 A CH 555596A
- Authority
- CH
- Switzerland
- Prior art keywords
- semiconductors
- producing metallic
- metallic connections
- connections
- producing
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US310318A US3881971A (en) | 1972-11-29 | 1972-11-29 | Method for fabricating aluminum interconnection metallurgy system for silicon devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH555596A true CH555596A (de) | 1974-10-31 |
Family
ID=23201970
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH1513873A CH555596A (de) | 1972-11-29 | 1973-10-26 | Verfahren zur herstellung metallischer anschluesse an halbleiter. |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US3881971A (de) |
| JP (1) | JPS5622375B2 (de) |
| CA (1) | CA996281A (de) |
| CH (1) | CH555596A (de) |
| DE (1) | DE2355567C3 (de) |
| ES (1) | ES420919A1 (de) |
| FR (1) | FR2208190B1 (de) |
| GB (1) | GB1439209A (de) |
| IT (1) | IT1001592B (de) |
| NL (1) | NL179323C (de) |
Families Citing this family (44)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4005455A (en) * | 1974-08-21 | 1977-01-25 | Intel Corporation | Corrosive resistant semiconductor interconnect pad |
| JPS51111069A (en) * | 1975-03-26 | 1976-10-01 | Hitachi Ltd | Semiconductor device |
| US4062720A (en) * | 1976-08-23 | 1977-12-13 | International Business Machines Corporation | Process for forming a ledge-free aluminum-copper-silicon conductor structure |
| US4164461A (en) * | 1977-01-03 | 1979-08-14 | Raytheon Company | Semiconductor integrated circuit structures and manufacturing methods |
| DE2730672A1 (de) * | 1977-07-07 | 1979-01-25 | Schmidt Gmbh Karl | Sicherheitslenkrad fuer kraftfahrzeuge |
| US4172004A (en) * | 1977-10-20 | 1979-10-23 | International Business Machines Corporation | Method for forming dense dry etched multi-level metallurgy with non-overlapped vias |
| US4289834A (en) * | 1977-10-20 | 1981-09-15 | Ibm Corporation | Dense dry etched multi-level metallurgy with non-overlapped vias |
| US4333099A (en) * | 1978-02-27 | 1982-06-01 | Rca Corporation | Use of silicide to bridge unwanted polycrystalline silicon P-N junction |
| US4230522A (en) * | 1978-12-26 | 1980-10-28 | Rockwell International Corporation | PNAF Etchant for aluminum and silicon |
| US4267012A (en) * | 1979-04-30 | 1981-05-12 | Fairchild Camera & Instrument Corp. | Process for patterning metal connections on a semiconductor structure by using a tungsten-titanium etch resistant layer |
| JPS561533A (en) * | 1979-06-18 | 1981-01-09 | Hitachi Ltd | Method of photoetching |
| JPS56146253A (en) * | 1980-04-16 | 1981-11-13 | Hitachi Ltd | Semiconductor device |
| DE3021175A1 (de) * | 1980-06-04 | 1981-12-10 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum passivieren von siliciumbauelementen |
| JPS5731144A (en) * | 1980-07-31 | 1982-02-19 | Fujitsu Ltd | Mamufacture of semiconductor device |
| US4392150A (en) * | 1980-10-27 | 1983-07-05 | National Semiconductor Corporation | MOS Integrated circuit having refractory metal or metal silicide interconnect layer |
| US4398335A (en) * | 1980-12-09 | 1983-08-16 | Fairchild Camera & Instrument Corporation | Multilayer metal silicide interconnections for integrated circuits |
| JPS57121224A (en) * | 1981-01-20 | 1982-07-28 | Sanyo Electric Co Ltd | Formation of ohmic contact in semiconductor device |
| JPS57162449A (en) * | 1981-03-31 | 1982-10-06 | Fujitsu Ltd | Formation of multilayer wiring |
| US4373966A (en) * | 1981-04-30 | 1983-02-15 | International Business Machines Corporation | Forming Schottky barrier diodes by depositing aluminum silicon and copper or binary alloys thereof and alloy-sintering |
| JPS59220952A (ja) * | 1983-05-31 | 1984-12-12 | Toshiba Corp | 半導体装置の製造方法 |
| JPS584948A (ja) * | 1981-06-30 | 1983-01-12 | Fujitsu Ltd | 半導体装置 |
| US4389257A (en) * | 1981-07-30 | 1983-06-21 | International Business Machines Corporation | Fabrication method for high conductivity, void-free polysilicon-silicide integrated circuit electrodes |
| GB2107744B (en) * | 1981-10-06 | 1985-07-24 | Itt Ind Ltd | Making al/si films by ion implantation; integrated circuits |
| JPS5893347A (ja) * | 1981-11-30 | 1983-06-03 | Toshiba Corp | Ｍｏｓ型半導体装置及びその製造方法 |
| JPS58103168A (ja) * | 1981-12-16 | 1983-06-20 | Fujitsu Ltd | 半導体装置 |
| DE3228399A1 (de) * | 1982-07-29 | 1984-02-02 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen einer monolithisch integrierten schaltung |
| JPS59501845A (ja) * | 1982-09-30 | 1984-11-01 | アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド | 集積回路のためのアルミニウム−金属シリサイドの相互接続構造及びその製造方法 |
| US5136361A (en) * | 1982-09-30 | 1992-08-04 | Advanced Micro Devices, Inc. | Stratified interconnect structure for integrated circuits |
| KR840006728A (ko) * | 1982-11-01 | 1984-12-01 | 오레그 이. 엘버 | 집적회로 제조방법 |
| US4558507A (en) * | 1982-11-12 | 1985-12-17 | Nec Corporation | Method of manufacturing semiconductor device |
| US4520554A (en) * | 1983-02-10 | 1985-06-04 | Rca Corporation | Method of making a multi-level metallization structure for semiconductor device |
| US4720470A (en) * | 1983-12-15 | 1988-01-19 | Laserpath Corporation | Method of making electrical circuitry |
| JPS60136337A (ja) * | 1983-12-22 | 1985-07-19 | モノリシツク・メモリ−ズ・インコ−ポレイテツド | ２重層処理においてヒロツク抑制層を形成する方法及びその構造物 |
| US4622576A (en) * | 1984-10-22 | 1986-11-11 | National Semiconductor Corporation | Conductive non-metallic self-passivating non-corrodable IC bonding pads |
| US4747211A (en) * | 1987-02-09 | 1988-05-31 | Sheldahl, Inc. | Method and apparatus for preparing conductive screened through holes employing metallic plated polymer thick films |
| JPH0622235B2 (ja) * | 1987-05-21 | 1994-03-23 | 日本電気株式会社 | 半導体装置の製造方法 |
| KR0130776B1 (ko) * | 1987-09-19 | 1998-04-06 | 미다 가쓰시게 | 반도체 집적회로 장치 |
| US5081563A (en) * | 1990-04-27 | 1992-01-14 | International Business Machines Corporation | Multi-layer package incorporating a recessed cavity for a semiconductor chip |
| EP0572212A3 (en) * | 1992-05-29 | 1994-05-11 | Sgs Thomson Microelectronics | Method to form silicon doped cvd aluminium |
| US6274391B1 (en) * | 1992-10-26 | 2001-08-14 | Texas Instruments Incorporated | HDI land grid array packaged device having electrical and optical interconnects |
| JP2596331B2 (ja) * | 1993-09-08 | 1997-04-02 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| JP3399814B2 (ja) * | 1997-11-27 | 2003-04-21 | 科学技術振興事業団 | 微細突起構造体の製造方法 |
| US6078100A (en) | 1999-01-13 | 2000-06-20 | Micron Technology, Inc. | Utilization of die repattern layers for die internal connections |
| CN111682003B (zh) * | 2019-03-11 | 2024-04-19 | 奥特斯奥地利科技与系统技术有限公司 | 包括具有竖向贯通连接件的部件的部件承载件 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2778790A (en) * | 1953-06-30 | 1957-01-22 | Croname Inc | Decorating anodized aluminum |
| US3382568A (en) * | 1965-07-22 | 1968-05-14 | Ibm | Method for providing electrical connections to semiconductor devices |
| US3751292A (en) * | 1971-08-20 | 1973-08-07 | Motorola Inc | Multilayer metallization system |
| JPS5013156A (de) * | 1973-06-06 | 1975-02-12 |
-
1972
- 1972-11-29 US US310318A patent/US3881971A/en not_active Expired - Lifetime
-
1973
- 1973-10-10 GB GB4719473A patent/GB1439209A/en not_active Expired
- 1973-10-17 IT IT30201/73A patent/IT1001592B/it active
- 1973-10-23 JP JP11862073A patent/JPS5622375B2/ja not_active Expired
- 1973-10-23 FR FR7338734A patent/FR2208190B1/fr not_active Expired
- 1973-10-26 CA CA184,342A patent/CA996281A/en not_active Expired
- 1973-10-26 CH CH1513873A patent/CH555596A/de not_active IP Right Cessation
- 1973-11-07 DE DE2355567A patent/DE2355567C3/de not_active Expired
- 1973-11-26 NL NLAANVRAGE7316116,A patent/NL179323C/xx not_active IP Right Cessation
- 1973-11-28 ES ES420919A patent/ES420919A1/es not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| ES420919A1 (es) | 1976-04-01 |
| IT1001592B (it) | 1976-04-30 |
| JPS5622375B2 (de) | 1981-05-25 |
| US3881971A (en) | 1975-05-06 |
| DE2355567B2 (de) | 1977-03-31 |
| NL7316116A (de) | 1974-05-31 |
| DE2355567A1 (de) | 1974-06-12 |
| FR2208190A1 (de) | 1974-06-21 |
| GB1439209A (en) | 1976-06-16 |
| CA996281A (en) | 1976-08-31 |
| NL179323C (nl) | 1986-08-18 |
| DE2355567C3 (de) | 1980-04-17 |
| NL179323B (nl) | 1986-03-17 |
| JPS4984788A (de) | 1974-08-14 |
| FR2208190B1 (de) | 1978-03-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased |