CH524827A - Verfahren zum Prüfen einer Vielzahl von auf einer einzigen Halbleiterscheibe gleichzeitig erzeugten gleichen Halbleiterbauelementen mit pn-Übergang - Google Patents

Verfahren zum Prüfen einer Vielzahl von auf einer einzigen Halbleiterscheibe gleichzeitig erzeugten gleichen Halbleiterbauelementen mit pn-Übergang

Info

Publication number
CH524827A
CH524827A CH1033271A CH1033271A CH524827A CH 524827 A CH524827 A CH 524827A CH 1033271 A CH1033271 A CH 1033271A CH 1033271 A CH1033271 A CH 1033271A CH 524827 A CH524827 A CH 524827A
Authority
CH
Switzerland
Prior art keywords
testing
large number
produced simultaneously
semiconductor wafer
junction produced
Prior art date
Application number
CH1033271A
Other languages
English (en)
Inventor
Spaeth Werner
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH524827A publication Critical patent/CH524827A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/24Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2607Circuits therefor
    • G01R31/2637Circuits therefor for testing other individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02258Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H01L21/3167Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself of anodic oxidation
    • H01L21/31675Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself of anodic oxidation of silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Weting (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
CH1033271A 1970-08-18 1971-07-14 Verfahren zum Prüfen einer Vielzahl von auf einer einzigen Halbleiterscheibe gleichzeitig erzeugten gleichen Halbleiterbauelementen mit pn-Übergang CH524827A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2041035A DE2041035C2 (de) 1970-08-18 1970-08-18 Verfahren zum gleichzeitigen elektrolytischen in bezug auf die Sperrfähigkeit selektiven Behandeln von mehreren in einer gemeinsamen Halbleiterscheibe erzeugten gleichen Halbleiterbauelementen

Publications (1)

Publication Number Publication Date
CH524827A true CH524827A (de) 1972-06-30

Family

ID=5780094

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1033271A CH524827A (de) 1970-08-18 1971-07-14 Verfahren zum Prüfen einer Vielzahl von auf einer einzigen Halbleiterscheibe gleichzeitig erzeugten gleichen Halbleiterbauelementen mit pn-Übergang

Country Status (10)

Country Link
US (1) US3738917A (de)
JP (1) JPS579217B1 (de)
AT (1) AT337779B (de)
CA (1) CA932880A (de)
CH (1) CH524827A (de)
DE (1) DE2041035C2 (de)
FR (1) FR2102327B1 (de)
GB (1) GB1332586A (de)
NL (1) NL7111385A (de)
SE (1) SE376685B (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2207012C2 (de) * 1972-02-15 1985-10-31 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Kontaktierung von Halbleiterbauelementen
US3987538A (en) * 1973-12-26 1976-10-26 Texas Instruments Incorporated Method of making devices having closely spaced electrodes
US4080721A (en) * 1975-06-30 1978-03-28 International Business Machines Corporation Fabrication of semiconductor device
US4125440A (en) * 1977-07-25 1978-11-14 International Business Machines Corporation Method for non-destructive testing of semiconductor articles
US4306951A (en) * 1980-05-30 1981-12-22 International Business Machines Corporation Electrochemical etching process for semiconductors
FR3120569B1 (fr) 2021-03-10 2024-04-26 Psa Automobiles Sa Procédé de gestion du fonctionnement d’une interface homme-machine d’un appareillage de gestion du fonctionnement d’un vitrage adaptatif d’un véhicule automobile, système et véhicule automobile associés

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1432035A (fr) * 1964-03-30 1966-03-18 Gen Electric Perfectionnements aux méthodes de contrôle de semiconducteurs

Also Published As

Publication number Publication date
DE2041035A1 (de) 1972-02-24
GB1332586A (en) 1973-10-03
AT337779B (de) 1977-07-25
DE2041035C2 (de) 1982-10-28
US3738917A (en) 1973-06-12
FR2102327B1 (de) 1977-03-18
NL7111385A (de) 1972-02-22
JPS579217B1 (de) 1982-02-20
SE376685B (de) 1975-06-02
FR2102327A1 (de) 1972-04-07
CA932880A (en) 1973-08-28
ATA658871A (de) 1976-11-15

Similar Documents

Publication Publication Date Title
CH505473A (de) Verfahren zum Herstellen einer Halbleitervorrichtung
CH415856A (de) Verfahren zum Herstellen eines pn-Übergangs in einer Halbleiteranordnung
CH432656A (de) Verfahren zum Herstellen einer Halbleiteranordnung
CH483726A (de) Verfahren zum Zerlegen einer Halbleiterscheibe
CH516227A (de) Verfahren zum Herstellen einer Sperrschicht-Halbleitervorrichtung
CH540993A (de) Verfahren zum Erzeugen einer Oxydschicht auf einem Silizium-Substrat
CH403436A (de) Verfahren zum Herstellen einer Halbleiteranordnung
CH524827A (de) Verfahren zum Prüfen einer Vielzahl von auf einer einzigen Halbleiterscheibe gleichzeitig erzeugten gleichen Halbleiterbauelementen mit pn-Übergang
CH445649A (de) Verfahren zum Herstellen von Halbleiterschaltungen
CH525027A (de) Verfahren zum epitaktischen Niederschlagen einer Halbleiterverbindung
AT258364B (de) Verfahren zum Herstellen von Halbleiteranordnungen
CH462326A (de) Halbleiteranordnung und Verfahren zum Herstellen einer solchen
DE1800347B2 (de) Verfahren zum herstellen einer halbleiteranordnung
AT256940B (de) Verfahren zum Herstellen einer epitaktischen, kristallinen Schicht, insbesondere Halbleiterschicht
CH458299A (de) Verfahren zum Herstellen einer einkristallinen Halbleiterschicht
CH462338A (de) Anordnung mit einem lichtempfindlichen Halbleiter-Bauelement und Verfahren zum Herstellen einer derartigen Anordnung
AT262381B (de) Verfahren zum Herstellen von Halbleiterschaltungen
CH446538A (de) Verfahren zum Herstellen einer Halbleiteranordnung und zum Stabilisieren der pn-Übergänge an ihrem Halbleiterkörper
AT292786B (de) Verfahren zum herstellen einer halbleiteranordnung
CH474859A (de) Verfahren zum Herstellen einer Halbleitervorrichtung
AT277286B (de) Verfahren zum Betrieb einer Chloralkalizelle
AT259016B (de) Verfahren zum Herstellen von Halbleiteranordnungen
CH489911A (de) Verfahren zum Kontaktieren von Halbleiteranordnungen
CH408223A (de) Verfahren zum Herstellen einer Halbleiteranordnung
CH490737A (de) Verfahren zum Herstellen einer Halbleiteranordnung

Legal Events

Date Code Title Description
PL Patent ceased