CH513515A - Halbleiteranordnung - Google Patents

Halbleiteranordnung

Info

Publication number
CH513515A
CH513515A CH675470A CH675470A CH513515A CH 513515 A CH513515 A CH 513515A CH 675470 A CH675470 A CH 675470A CH 675470 A CH675470 A CH 675470A CH 513515 A CH513515 A CH 513515A
Authority
CH
Switzerland
Prior art keywords
semiconductor device
semiconductor
Prior art date
Application number
CH675470A
Other languages
English (en)
Inventor
Encinas Juan
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH513515A publication Critical patent/CH513515A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/007Autodoping
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/037Diffusion-deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/096Lateral transistor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/914Doping
    • Y10S438/916Autodoping control or utilization
CH675470A 1969-05-08 1970-05-05 Halbleiteranordnung CH513515A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR696914719A FR2041710B1 (de) 1969-05-08 1969-05-08

Publications (1)

Publication Number Publication Date
CH513515A true CH513515A (de) 1971-09-30

Family

ID=9033654

Family Applications (1)

Application Number Title Priority Date Filing Date
CH675470A CH513515A (de) 1969-05-08 1970-05-05 Halbleiteranordnung

Country Status (10)

Country Link
US (1) US3759760A (de)
JP (1) JPS4940106B1 (de)
AU (1) AU455243B1 (de)
BE (1) BE750088A (de)
CH (1) CH513515A (de)
DE (1) DE2019450C3 (de)
FR (1) FR2041710B1 (de)
GB (1) GB1308013A (de)
NL (1) NL7006245A (de)
SE (1) SE365902B (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4170501A (en) * 1978-02-15 1979-10-09 Rca Corporation Method of making a semiconductor integrated circuit device utilizing simultaneous outdiffusion and autodoping during epitaxial deposition
US4202006A (en) * 1978-02-15 1980-05-06 Rca Corporation Semiconductor integrated circuit device
US4168997A (en) * 1978-10-10 1979-09-25 National Semiconductor Corporation Method for making integrated circuit transistors with isolation and substrate connected collectors utilizing simultaneous outdiffusion to convert an epitaxial layer
US4902633A (en) * 1988-05-09 1990-02-20 Motorola, Inc. Process for making a bipolar integrated circuit
JP3031117B2 (ja) * 1993-06-02 2000-04-10 日産自動車株式会社 半導体装置の製造方法
FR2766845B1 (fr) * 1997-07-31 1999-10-15 Sgs Thomson Microelectronics Procede d'epitaxie sur un substrat de silicium comprenant des zones fortement dopees a l'arsenic
CN104576498A (zh) * 2013-10-29 2015-04-29 北大方正集团有限公司 一种掩埋层的制作方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1541490A (fr) * 1966-10-21 1968-10-04 Philips Nv Dispositif semi-conducteur et procédé pour sa fabrication

Also Published As

Publication number Publication date
DE2019450A1 (de) 1970-11-12
GB1308013A (en) 1973-02-21
JPS4940106B1 (de) 1974-10-31
FR2041710B1 (de) 1974-06-14
SE365902B (de) 1974-04-01
FR2041710A1 (de) 1971-02-05
NL7006245A (de) 1970-11-10
DE2019450B2 (de) 1979-09-06
US3759760A (en) 1973-09-18
DE2019450C3 (de) 1980-05-29
AU455243B1 (en) 1974-11-04
BE750088A (nl) 1970-11-06

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Legal Events

Date Code Title Description
PL Patent ceased