CH508275A - Verfahren zum Herstellen von p-dotierten Zonen mit unterschiedlichen Eindringtiefen in einem Siliciumhalbleiterkörper - Google Patents

Verfahren zum Herstellen von p-dotierten Zonen mit unterschiedlichen Eindringtiefen in einem Siliciumhalbleiterkörper

Info

Publication number
CH508275A
CH508275A CH1762069A CH1762069A CH508275A CH 508275 A CH508275 A CH 508275A CH 1762069 A CH1762069 A CH 1762069A CH 1762069 A CH1762069 A CH 1762069A CH 508275 A CH508275 A CH 508275A
Authority
CH
Switzerland
Prior art keywords
producing
semiconductor body
silicon semiconductor
penetration depths
different penetration
Prior art date
Application number
CH1762069A
Other languages
German (de)
English (en)
Inventor
Mueller Wolfgang Dr Dipl-Phys
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH508275A publication Critical patent/CH508275A/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Thin Film Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Formation Of Insulating Films (AREA)
CH1762069A 1968-11-27 1969-11-26 Verfahren zum Herstellen von p-dotierten Zonen mit unterschiedlichen Eindringtiefen in einem Siliciumhalbleiterkörper CH508275A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE1811277A DE1811277C3 (de) 1968-11-27 1968-11-27 Verfahren zum Herstellen von p-dotierten Zonen mit unterschiedlichen Eindringtiefen in einer n-Silicium-Schicht

Publications (1)

Publication Number Publication Date
CH508275A true CH508275A (de) 1971-05-31

Family

ID=5714504

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1762069A CH508275A (de) 1968-11-27 1969-11-26 Verfahren zum Herstellen von p-dotierten Zonen mit unterschiedlichen Eindringtiefen in einem Siliciumhalbleiterkörper

Country Status (8)

Country Link
JP (1) JPS4826662B1 (enrdf_load_stackoverflow)
AT (1) AT320030B (enrdf_load_stackoverflow)
CH (1) CH508275A (enrdf_load_stackoverflow)
DE (1) DE1811277C3 (enrdf_load_stackoverflow)
FR (1) FR2024352B1 (enrdf_load_stackoverflow)
GB (1) GB1232727A (enrdf_load_stackoverflow)
NL (1) NL6914784A (enrdf_load_stackoverflow)
SE (1) SE344385B (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2092730A1 (en) * 1970-06-12 1972-01-28 Radiotechnique Compelec Boron diffusion in silicon - from diborane, oxygen nitrogen mixtures
JPS51127564U (enrdf_load_stackoverflow) * 1975-04-09 1976-10-15
US4099997A (en) * 1976-06-21 1978-07-11 Rca Corporation Method of fabricating a semiconductor device
NL8006668A (nl) * 1980-12-09 1982-07-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
DE102009041546A1 (de) * 2009-03-27 2010-10-14 Bosch Solar Energy Ag Verfahren zur Herstellung von Solarzellen mit selektivem Emitter

Also Published As

Publication number Publication date
DE1811277B2 (de) 1977-09-08
JPS4826662B1 (enrdf_load_stackoverflow) 1973-08-14
SE344385B (enrdf_load_stackoverflow) 1972-04-10
DE1811277A1 (de) 1970-06-18
GB1232727A (enrdf_load_stackoverflow) 1971-05-19
FR2024352A1 (enrdf_load_stackoverflow) 1970-08-28
NL6914784A (enrdf_load_stackoverflow) 1970-05-29
AT320030B (de) 1975-01-27
DE1811277C3 (de) 1978-06-08
FR2024352B1 (enrdf_load_stackoverflow) 1974-05-03

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Legal Events

Date Code Title Description
PL Patent ceased