CH474158A - Verfahren zur Herstellung einer Halbleitervorrichtung - Google Patents

Verfahren zur Herstellung einer Halbleitervorrichtung

Info

Publication number
CH474158A
CH474158A CH785568A CH785568A CH474158A CH 474158 A CH474158 A CH 474158A CH 785568 A CH785568 A CH 785568A CH 785568 A CH785568 A CH 785568A CH 474158 A CH474158 A CH 474158A
Authority
CH
Switzerland
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
CH785568A
Other languages
German (de)
English (en)
Inventor
Anthony Kerr John
Wadham Eric
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH474158A publication Critical patent/CH474158A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors with potential-jump barrier or surface barrier
    • H01L29/93Variable capacitance diodes, e.g. varactors
CH785568A 1967-05-26 1968-05-27 Verfahren zur Herstellung einer Halbleitervorrichtung CH474158A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2476267 1967-05-26

Publications (1)

Publication Number Publication Date
CH474158A true CH474158A (de) 1969-06-15

Family

ID=10216859

Family Applications (1)

Application Number Title Priority Date Filing Date
CH785568A CH474158A (de) 1967-05-26 1968-05-27 Verfahren zur Herstellung einer Halbleitervorrichtung

Country Status (6)

Country Link
CH (1) CH474158A (nl)
DE (1) DE1764372C3 (nl)
FR (1) FR1573306A (nl)
GB (1) GB1228754A (nl)
NL (1) NL151558B (nl)
SE (1) SE352196B (nl)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2103468A1 (de) * 1970-01-15 1971-07-22 Philips Nv Verfahren zur Herstellung einer Halbleiteranordnung
DE2160450A1 (de) * 1970-12-09 1972-06-29 Philips Nv Verfahren zur Herstellung einer Halbleiteranordnung und durch dieses Verfahren hergestellte Halbleiteranordnung

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1263009A (en) * 1969-03-31 1972-02-09 Tokyo Shibaura Electric Co A method for manufacturing a semiconductor device and such device prepared thereby
FR2096876B1 (nl) * 1970-07-09 1973-08-10 Thomson Csf
NL170348C (nl) * 1970-07-10 1982-10-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult.

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2103468A1 (de) * 1970-01-15 1971-07-22 Philips Nv Verfahren zur Herstellung einer Halbleiteranordnung
DE2160450A1 (de) * 1970-12-09 1972-06-29 Philips Nv Verfahren zur Herstellung einer Halbleiteranordnung und durch dieses Verfahren hergestellte Halbleiteranordnung

Also Published As

Publication number Publication date
FR1573306A (nl) 1969-07-04
DE1764372B2 (de) 1974-06-12
NL6807438A (nl) 1968-11-27
GB1228754A (nl) 1971-04-21
SE352196B (nl) 1972-12-18
NL151558B (nl) 1976-11-15
DE1764372A1 (de) 1972-04-20
DE1764372C3 (de) 1975-01-16

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Legal Events

Date Code Title Description
PL Patent ceased