CA2150573A1 - Transistor en couches minces a isolateur de gachette dielectrique a trois couches, methode de fabrication de ce transistor et afficheur a matrice active comportant une multiplicite de ces transistors - Google Patents

Transistor en couches minces a isolateur de gachette dielectrique a trois couches, methode de fabrication de ce transistor et afficheur a matrice active comportant une multiplicite de ces transistors

Info

Publication number
CA2150573A1
CA2150573A1 CA002150573A CA2150573A CA2150573A1 CA 2150573 A1 CA2150573 A1 CA 2150573A1 CA 002150573 A CA002150573 A CA 002150573A CA 2150573 A CA2150573 A CA 2150573A CA 2150573 A1 CA2150573 A1 CA 2150573A1
Authority
CA
Canada
Prior art keywords
thin film
layer
film transistor
dielectric
gate insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002150573A
Other languages
English (en)
Inventor
David Waechter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
1294339 Ontario Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CA002150573A priority Critical patent/CA2150573A1/fr
Priority to PCT/CA1992/000519 priority patent/WO1994013018A1/fr
Priority to JP6512598A priority patent/JPH08503815A/ja
Priority to EP92923642A priority patent/EP0672301A1/fr
Publication of CA2150573A1 publication Critical patent/CA2150573A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66969Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/469Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
    • H01L21/471Inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/469Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
    • H01L21/471Inorganic layers
    • H01L21/473Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
CA002150573A 1992-12-01 1992-12-01 Transistor en couches minces a isolateur de gachette dielectrique a trois couches, methode de fabrication de ce transistor et afficheur a matrice active comportant une multiplicite de ces transistors Abandoned CA2150573A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CA002150573A CA2150573A1 (fr) 1992-12-01 1992-12-01 Transistor en couches minces a isolateur de gachette dielectrique a trois couches, methode de fabrication de ce transistor et afficheur a matrice active comportant une multiplicite de ces transistors
PCT/CA1992/000519 WO1994013018A1 (fr) 1992-12-01 1992-12-01 Transistor a couches minces possedant un dielectrique de grille a trois couches, son procede de fabrication, et affichage a matrice active muni d'une pluralite de transistors de ce type
JP6512598A JPH08503815A (ja) 1992-12-01 1992-12-01 三層誘電体のゲート絶縁体を有する薄膜トランジスタ、このような薄膜トランジスタの製造方法、及び複数のこのような薄膜トランジスタを有するアクティブなマトリクスディスプレイ
EP92923642A EP0672301A1 (fr) 1992-12-01 1992-12-01 Transistor a couches minces possedant un dielectrique de grille a trois couches, son procede de fabrication, et affichage a matrice active muni d'une pluralite de transistors de ce type

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CA002150573A CA2150573A1 (fr) 1992-12-01 1992-12-01 Transistor en couches minces a isolateur de gachette dielectrique a trois couches, methode de fabrication de ce transistor et afficheur a matrice active comportant une multiplicite de ces transistors
PCT/CA1992/000519 WO1994013018A1 (fr) 1992-12-01 1992-12-01 Transistor a couches minces possedant un dielectrique de grille a trois couches, son procede de fabrication, et affichage a matrice active muni d'une pluralite de transistors de ce type

Publications (1)

Publication Number Publication Date
CA2150573A1 true CA2150573A1 (fr) 1994-06-09

Family

ID=25677983

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002150573A Abandoned CA2150573A1 (fr) 1992-12-01 1992-12-01 Transistor en couches minces a isolateur de gachette dielectrique a trois couches, methode de fabrication de ce transistor et afficheur a matrice active comportant une multiplicite de ces transistors

Country Status (2)

Country Link
CA (1) CA2150573A1 (fr)
WO (1) WO1994013018A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8835909B2 (en) 2008-08-04 2014-09-16 The Trustees Of Princeton University Hybrid dielectric material for thin film transistors
CN106292151B (zh) * 2015-06-10 2017-12-26 钱鸿斌 采用有机反射镜管的微型投影装置
CN110797413A (zh) * 2019-11-11 2020-02-14 云谷(固安)科技有限公司 薄膜晶体管、像素驱动电路和显示面板

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3671820A (en) * 1970-04-27 1972-06-20 Rudolph R Haering High voltage thin-film transistor
JPH01291467A (ja) * 1988-05-19 1989-11-24 Toshiba Corp 薄膜トランジスタ
JPH0816756B2 (ja) * 1988-08-10 1996-02-21 シャープ株式会社 透過型アクティブマトリクス液晶表示装置
JPH03190141A (ja) * 1989-12-12 1991-08-20 Samsung Electron Devices Co Ltd 平板ディスプレー用薄膜トランジスタ及びその製造方法

Also Published As

Publication number Publication date
WO1994013018A1 (fr) 1994-06-09

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Legal Events

Date Code Title Description
EEER Examination request
FZDE Discontinued