CA2086980A1 - Egaliseur adaptatif et recepteur - Google Patents

Egaliseur adaptatif et recepteur

Info

Publication number
CA2086980A1
CA2086980A1 CA2086980A CA2086980A CA2086980A1 CA 2086980 A1 CA2086980 A1 CA 2086980A1 CA 2086980 A CA2086980 A CA 2086980A CA 2086980 A CA2086980 A CA 2086980A CA 2086980 A1 CA2086980 A1 CA 2086980A1
Authority
CA
Canada
Prior art keywords
output
detector
memory
frame synchronization
synchronization control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2086980A
Other languages
English (en)
Other versions
CA2086980C (fr
Inventor
Fumio Ishizu
Kouji Ueda
Keishi Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to CA002232283A priority Critical patent/CA2232283C/fr
Publication of CA2086980A1 publication Critical patent/CA2086980A1/fr
Application granted granted Critical
Publication of CA2086980C publication Critical patent/CA2086980C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/233—Demodulator circuits; Receiver circuits using non-coherent demodulation
    • H04L27/2332—Demodulator circuits; Receiver circuits using non-coherent demodulation using a non-coherent carrier
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0024—Carrier regulation at the receiver end
    • H04L2027/0026—Correction of carrier offset
    • H04L2027/003—Correction of carrier offset at baseband only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0044—Control loops for carrier regulation
    • H04L2027/0053—Closed loops
    • H04L2027/0057—Closed loops quadrature phase
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0083—Signalling arrangements
    • H04L2027/0089—In-band signals
    • H04L2027/0093—Intermittant signals
    • H04L2027/0095—Intermittant signals in a preamble or similar structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Circuits Of Receivers In General (AREA)
  • Lock And Its Accessories (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Networks Using Active Elements (AREA)
CA002086980A 1992-01-10 1993-01-08 Egaliseur adaptatif et recepteur Expired - Fee Related CA2086980C (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA002232283A CA2232283C (fr) 1992-01-10 1993-01-08 Egaliseur adaptable et recepteur

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP003276/1992 1992-01-10
JP04003276A JP3100447B2 (ja) 1992-01-10 1992-01-10 適応等化器および受信機

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CA002232283A Division CA2232283C (fr) 1992-01-10 1993-01-08 Egaliseur adaptable et recepteur

Publications (2)

Publication Number Publication Date
CA2086980A1 true CA2086980A1 (fr) 1993-07-11
CA2086980C CA2086980C (fr) 1999-04-27

Family

ID=11552914

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002086980A Expired - Fee Related CA2086980C (fr) 1992-01-10 1993-01-08 Egaliseur adaptatif et recepteur

Country Status (8)

Country Link
US (1) US5475710A (fr)
EP (2) EP0860962A3 (fr)
JP (1) JP3100447B2 (fr)
AU (1) AU657384B2 (fr)
CA (1) CA2086980C (fr)
DE (1) DE69331353T2 (fr)
FI (1) FI105863B (fr)
NO (3) NO311599B1 (fr)

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US6901116B1 (en) * 2001-04-02 2005-05-31 Cisco Technology, Inc. Method and system for reducing false detections of access signals
US7099386B2 (en) * 2001-07-09 2006-08-29 Intel Corporation Channel tracking using channel covariance estimation
US6944244B2 (en) * 2001-09-18 2005-09-13 Thomson Licensing S.A. Mechanism for OFDM equalizer tap initialization using an adaptive algorithm
US20030161415A1 (en) * 2002-02-26 2003-08-28 Eyal Krupka Iterative channel tracking
US7103098B2 (en) * 2002-03-15 2006-09-05 Intel Corporation Adaptive receiver for multiplex/multi-access communications
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US7408981B2 (en) * 2003-05-20 2008-08-05 Rambus Inc. Methods and circuits for performing margining tests in the presence of a decision feedback equalizer
JP4263553B2 (ja) * 2003-08-19 2009-05-13 パイオニア株式会社 マルチパスひずみ除去フィルタ
US7286006B2 (en) * 2004-06-28 2007-10-23 Intel Corporation Sign-sign least means square filter
US7483479B2 (en) * 2004-09-16 2009-01-27 Keyeye Communications Scaled signal processing elements for reduced filter tap noise
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US7596323B1 (en) * 2005-06-27 2009-09-29 Broadwing Corporation Optical communications systems, devices, and methods
JP4945747B2 (ja) * 2006-05-30 2012-06-06 国立大学法人京都工芸繊維大学 非同期符号変調信号受信装置
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US7979032B2 (en) * 2007-12-18 2011-07-12 Intel Corporation Estimating statistical properties of noise in modulated data carrier signals
US8189720B2 (en) * 2008-11-21 2012-05-29 Telefonaktiebolaget L M Ericsson (Publ) Blind frequency-offset estimation for temporally and/or spatially correlated signal
EP2280510B1 (fr) * 2009-07-09 2016-05-04 STMicroelectronics S.r.l. Procédé de détection d'un motif de synchronisation de cadre ou d'un mot unique dans un signal numérique reçu
US10115386B2 (en) * 2009-11-18 2018-10-30 Qualcomm Incorporated Delay techniques in active noise cancellation circuits or other circuits that perform filtering of decimated coefficients
BR112012010343B1 (pt) 2010-03-04 2021-04-13 Huawei Technologies Co.,Ltd Dispositivo de filtro e método de filtrar um sinal de entrada
JP5700546B2 (ja) 2010-06-03 2015-04-15 富士通株式会社 受信装置および受信方法
US8638843B2 (en) * 2010-06-03 2014-01-28 Fujitsu Limited Receiving device and receiving method
US8982982B2 (en) * 2011-06-08 2015-03-17 Telefonaktiebolaget L M Ericsson (Publ) Joint carrier recovery for MIMO systems
JP6390244B2 (ja) * 2014-07-31 2018-09-19 株式会社デンソー 波形等化装置
JP6592558B1 (ja) * 2018-06-07 2019-10-16 Ｎｔｔエレクトロニクス株式会社 フレーム同期装置、光通信装置およびフレーム同期方法
US11171815B2 (en) * 2020-01-21 2021-11-09 Credo Technology Group Limited Digital equalizer with overlappable filter taps

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Also Published As

Publication number Publication date
NO930034L (no) 1993-07-12
NO984776D0 (no) 1998-10-13
CA2086980C (fr) 1999-04-27
EP0551081A2 (fr) 1993-07-14
DE69331353D1 (de) 2002-01-31
JP3100447B2 (ja) 2000-10-16
US5475710A (en) 1995-12-12
NO311600B1 (no) 2001-12-10
EP0551081A3 (en) 1994-05-11
NO984775L (no) 1993-07-12
FI930064A0 (fi) 1993-01-08
AU3048992A (en) 1993-07-15
FI105863B (fi) 2000-10-13
NO311630B1 (no) 2001-12-17
JPH05191208A (ja) 1993-07-30
NO984776L (no) 1993-07-12
NO311599B1 (no) 2001-12-10
EP0860962A2 (fr) 1998-08-26
EP0551081B1 (fr) 2001-12-19
NO930034D0 (no) 1993-01-07
DE69331353T2 (de) 2002-09-26
EP0860962A3 (fr) 2004-12-22
FI930064A (fi) 1993-07-11
AU657384B2 (en) 1995-03-09
NO984775D0 (no) 1998-10-13

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