CA1175939A - Folded bit line - shared sense amplifiers - Google Patents
Folded bit line - shared sense amplifiersInfo
- Publication number
- CA1175939A CA1175939A CA000373225A CA373225A CA1175939A CA 1175939 A CA1175939 A CA 1175939A CA 000373225 A CA000373225 A CA 000373225A CA 373225 A CA373225 A CA 373225A CA 1175939 A CA1175939 A CA 1175939A
- Authority
- CA
- Canada
- Prior art keywords
- coupled
- node
- transistor
- signal
- sense amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 37
- 238000002955 isolation Methods 0.000 claims abstract description 19
- 230000008878 coupling Effects 0.000 claims description 9
- 238000010168 coupling process Methods 0.000 claims description 9
- 238000005859 coupling reaction Methods 0.000 claims description 9
- 230000003213 activating effect Effects 0.000 claims 1
- 230000000295 complement effect Effects 0.000 claims 1
- 230000003750 conditioning effect Effects 0.000 claims 1
- 230000004075 alteration Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 244000187656 Eucalyptus cornuta Species 0.000 description 1
- 241000219171 Malpighiales Species 0.000 description 1
- 101001125556 Mycobacterium tuberculosis (strain ATCC 25618 / H37Rv) HTH-type transcriptional regulator PrpR Proteins 0.000 description 1
- 241000193803 Therea Species 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US195,728 | 1980-10-10 | ||
| US06/195,728 US4351034A (en) | 1980-10-10 | 1980-10-10 | Folded bit line-shared sense amplifiers |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1175939A true CA1175939A (en) | 1984-10-09 |
Family
ID=22722538
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000373225A Expired CA1175939A (en) | 1980-10-10 | 1981-03-17 | Folded bit line - shared sense amplifiers |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4351034A (enExample) |
| EP (1) | EP0049990B1 (enExample) |
| JP (1) | JPS5792486A (enExample) |
| CA (1) | CA1175939A (enExample) |
| DE (1) | DE3176224D1 (enExample) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5745267A (en) * | 1980-09-01 | 1982-03-15 | Nec Corp | Semiconductor device |
| US4413329A (en) * | 1980-12-24 | 1983-11-01 | International Business Machines Corporation | Dynamic memory cell |
| US4739497A (en) * | 1981-05-29 | 1988-04-19 | Hitachi, Ltd. | Semiconductor memory |
| US4442508A (en) * | 1981-08-05 | 1984-04-10 | General Instrument Corporation | Storage cells for use in two conductor data column storage logic arrays |
| US4402063A (en) * | 1981-09-28 | 1983-08-30 | Bell Telephone Laboratories, Incorporated | Flip-flop detector array for minimum geometry semiconductor memory apparatus |
| US4494220A (en) * | 1982-11-24 | 1985-01-15 | At&T Bell Laboratories | Folded bit line memory with one decoder per pair of spare rows |
| USRE33266E (en) * | 1982-11-24 | 1990-07-17 | American Telephone And Telegraph Company, At&T Bell Laboratories | Folded bit line memory with one decoder per pair of spare rows |
| US4584672A (en) * | 1984-02-22 | 1986-04-22 | Intel Corporation | CMOS dynamic random-access memory with active cycle one half power supply potential bit line precharge |
| US4961166A (en) * | 1984-05-07 | 1990-10-02 | Hitachi, Ltd. | Dynamic RAM having a full size dummy cell |
| JPS6150284A (ja) * | 1984-08-17 | 1986-03-12 | Mitsubishi Electric Corp | シエアドセンスアンプ回路の駆動方法 |
| JPS6150283A (ja) * | 1984-08-17 | 1986-03-12 | Mitsubishi Electric Corp | シエアドセンスアンプの駆動回路 |
| JPH0793009B2 (ja) * | 1984-12-13 | 1995-10-09 | 株式会社東芝 | 半導体記憶装置 |
| ATE66314T1 (de) * | 1985-08-30 | 1991-08-15 | Sgs Thomson Microelectronics | Parallele zeile pro zeile datenuebertragung in ram-speichern. |
| JPS6280897A (ja) * | 1985-10-04 | 1987-04-14 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US4807195A (en) * | 1987-05-18 | 1989-02-21 | International Business Machines Corporation | Apparatus and method for providing a dual sense amplifier with divided bit line isolation |
| JPH01184787A (ja) * | 1988-01-19 | 1989-07-24 | Toshiba Corp | 半導体メモリ |
| DE3937068C2 (de) * | 1988-11-07 | 1994-10-06 | Toshiba Kawasaki Kk | Dynamische Halbleiterspeicheranordnung |
| JPH02201797A (ja) * | 1989-01-31 | 1990-08-09 | Toshiba Corp | 半導体メモリ装置 |
| JP2742719B2 (ja) * | 1990-02-16 | 1998-04-22 | 三菱電機株式会社 | 半導体記憶装置 |
| US5046050A (en) * | 1990-04-10 | 1991-09-03 | National Semiconductor Corporation | Shared BiCMOS sense amplifier |
| US5241503A (en) * | 1991-02-25 | 1993-08-31 | Motorola, Inc. | Dynamic random access memory with improved page-mode performance and method therefor having isolator between memory cells and sense amplifiers |
| JPH06195973A (ja) * | 1992-10-12 | 1994-07-15 | Nec Corp | ダイナミックram |
| US5572459A (en) * | 1994-09-16 | 1996-11-05 | Ramtron International Corporation | Voltage reference for a ferroelectric 1T/1C based memory |
| US5836007A (en) * | 1995-09-14 | 1998-11-10 | International Business Machines Corporation | Methods and systems for improving memory component size and access speed including splitting bit lines and alternate pre-charge/access cycles |
| US5636170A (en) * | 1995-11-13 | 1997-06-03 | Micron Technology, Inc. | Low voltage dynamic memory |
| US5999459A (en) | 1998-05-27 | 1999-12-07 | Winbond Electronics Corporation | High-performance pass-gate isolation circuitry |
| JP2007095264A (ja) * | 2005-09-29 | 2007-04-12 | Hynix Semiconductor Inc | 共有ビットライン感知増幅器構造を有する半導体メモリ素子及びその駆動方法 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3560940A (en) * | 1968-07-15 | 1971-02-02 | Ibm | Time shared interconnection apparatus |
| DE2647394C2 (de) * | 1976-10-20 | 1978-11-16 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | MOS-Halbleiterspeicherbaustein |
| DE2919166C2 (de) * | 1978-05-12 | 1986-01-02 | Nippon Electric Co., Ltd., Tokio/Tokyo | Speichervorrichtung |
| JPS54148340A (en) * | 1978-05-12 | 1979-11-20 | Nec Corp | Memory circuit |
| US4279023A (en) * | 1979-12-19 | 1981-07-14 | International Business Machines Corporation | Sense latch |
-
1980
- 1980-10-10 US US06/195,728 patent/US4351034A/en not_active Ceased
-
1981
- 1981-03-17 CA CA000373225A patent/CA1175939A/en not_active Expired
- 1981-10-05 EP EP81304614A patent/EP0049990B1/en not_active Expired
- 1981-10-05 DE DE8181304614T patent/DE3176224D1/de not_active Expired
- 1981-10-05 JP JP56158569A patent/JPS5792486A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| EP0049990A3 (en) | 1982-10-13 |
| JPH0115957B2 (enExample) | 1989-03-22 |
| EP0049990B1 (en) | 1987-05-27 |
| JPS5792486A (en) | 1982-06-09 |
| EP0049990A2 (en) | 1982-04-21 |
| DE3176224D1 (en) | 1987-07-02 |
| US4351034A (en) | 1982-09-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA1175939A (en) | Folded bit line - shared sense amplifiers | |
| US5241503A (en) | Dynamic random access memory with improved page-mode performance and method therefor having isolator between memory cells and sense amplifiers | |
| USRE39227E1 (en) | Content addressable memory (CAM) arrays and cells having low power requirements | |
| US4363111A (en) | Dummy cell arrangement for an MOS memory | |
| US4070590A (en) | Sensing circuit for memory cells | |
| US6438049B1 (en) | Variable equilibrate voltage circuit for paired digit lines | |
| US4112512A (en) | Semiconductor memory read/write access circuit and method | |
| US4555777A (en) | Sense amplifier circuit for dynamic read/write memory | |
| JPH05166365A (ja) | ダイナミック型半導体記憶装置 | |
| US4397003A (en) | Dynamic random access memory | |
| JPH0762955B2 (ja) | ダイナミック型ランダムアクセスメモリ | |
| US4458336A (en) | Semiconductor memory circuit | |
| US4622655A (en) | Semiconductor memory | |
| EP0089720B1 (en) | Single transistor, single capacitor mos random access memory | |
| EP0048464B1 (en) | Semiconductor memory device | |
| US4802128A (en) | Bit line driver | |
| US6275409B1 (en) | Methods of operating a dynamic random access memory | |
| US6292417B1 (en) | Memory device with reduced bit line pre-charge voltage | |
| US5402379A (en) | Precharge device for an integrated circuit internal bus | |
| US5473562A (en) | Method and apparatus for minimizing power-up crowbar current in a retargetable SRAM memory system | |
| USRE32682E (en) | Folded bit line-shared sense amplifiers | |
| JPH0421277B2 (enExample) | ||
| US5949730A (en) | Method and apparatus for quickly restoring digit I/O lines | |
| US5835433A (en) | Floating isolation gate from DRAM sensing | |
| JP3182155B2 (ja) | 半導体集積回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |