JPS5792486A - Folded bit line-common use sensing amplifier structure in mos memory - Google Patents

Folded bit line-common use sensing amplifier structure in mos memory

Info

Publication number
JPS5792486A
JPS5792486A JP56158569A JP15856981A JPS5792486A JP S5792486 A JPS5792486 A JP S5792486A JP 56158569 A JP56158569 A JP 56158569A JP 15856981 A JP15856981 A JP 15856981A JP S5792486 A JPS5792486 A JP S5792486A
Authority
JP
Japan
Prior art keywords
bit line
common use
sensing amplifier
amplifier structure
folded bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56158569A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0115957B2 (enExample
Inventor
Shiefuiirudo Iiton J Saajiento
Rudorufu Uuten Deibitsudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inmos Corp
Original Assignee
Inmos Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inmos Corp filed Critical Inmos Corp
Publication of JPS5792486A publication Critical patent/JPS5792486A/ja
Publication of JPH0115957B2 publication Critical patent/JPH0115957B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP56158569A 1980-10-10 1981-10-05 Folded bit line-common use sensing amplifier structure in mos memory Granted JPS5792486A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/195,728 US4351034A (en) 1980-10-10 1980-10-10 Folded bit line-shared sense amplifiers

Publications (2)

Publication Number Publication Date
JPS5792486A true JPS5792486A (en) 1982-06-09
JPH0115957B2 JPH0115957B2 (enExample) 1989-03-22

Family

ID=22722538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56158569A Granted JPS5792486A (en) 1980-10-10 1981-10-05 Folded bit line-common use sensing amplifier structure in mos memory

Country Status (5)

Country Link
US (1) US4351034A (enExample)
EP (1) EP0049990B1 (enExample)
JP (1) JPS5792486A (enExample)
CA (1) CA1175939A (enExample)
DE (1) DE3176224D1 (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60242592A (ja) * 1984-02-22 1985-12-02 インテル・コ−ポレ−シヨン 金属酸化膜半導体ダイナミック・ランダム　アクセス・メモリ
JPS6150283A (ja) * 1984-08-17 1986-03-12 Mitsubishi Electric Corp シエアドセンスアンプの駆動回路
JPS6150284A (ja) * 1984-08-17 1986-03-12 Mitsubishi Electric Corp シエアドセンスアンプ回路の駆動方法
JPH06195973A (ja) * 1992-10-12 1994-07-15 Nec Corp ダイナミックｒａｍ

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745267A (en) * 1980-09-01 1982-03-15 Nec Corp Semiconductor device
US4413329A (en) * 1980-12-24 1983-11-01 International Business Machines Corporation Dynamic memory cell
US4739497A (en) * 1981-05-29 1988-04-19 Hitachi, Ltd. Semiconductor memory
US4442508A (en) * 1981-08-05 1984-04-10 General Instrument Corporation Storage cells for use in two conductor data column storage logic arrays
US4402063A (en) * 1981-09-28 1983-08-30 Bell Telephone Laboratories, Incorporated Flip-flop detector array for minimum geometry semiconductor memory apparatus
US4494220A (en) * 1982-11-24 1985-01-15 At&T Bell Laboratories Folded bit line memory with one decoder per pair of spare rows
USRE33266E (en) * 1982-11-24 1990-07-17 American Telephone And Telegraph Company, At&T Bell Laboratories Folded bit line memory with one decoder per pair of spare rows
US4961166A (en) * 1984-05-07 1990-10-02 Hitachi, Ltd. Dynamic RAM having a full size dummy cell
JPH0793009B2 (ja) * 1984-12-13 1995-10-09 株式会社東芝 半導体記憶装置
ATE66314T1 (de) * 1985-08-30 1991-08-15 Sgs Thomson Microelectronics Parallele zeile pro zeile datenuebertragung in ram-speichern.
JPS6280897A (ja) * 1985-10-04 1987-04-14 Mitsubishi Electric Corp 半導体記憶装置
US4807195A (en) * 1987-05-18 1989-02-21 International Business Machines Corporation Apparatus and method for providing a dual sense amplifier with divided bit line isolation
JPH01184787A (ja) * 1988-01-19 1989-07-24 Toshiba Corp 半導体メモリ
DE3937068C2 (de) * 1988-11-07 1994-10-06 Toshiba Kawasaki Kk Dynamische Halbleiterspeicheranordnung
JPH02201797A (ja) * 1989-01-31 1990-08-09 Toshiba Corp 半導体メモリ装置
JP2742719B2 (ja) * 1990-02-16 1998-04-22 三菱電機株式会社 半導体記憶装置
US5046050A (en) * 1990-04-10 1991-09-03 National Semiconductor Corporation Shared BiCMOS sense amplifier
US5241503A (en) * 1991-02-25 1993-08-31 Motorola, Inc. Dynamic random access memory with improved page-mode performance and method therefor having isolator between memory cells and sense amplifiers
US5572459A (en) * 1994-09-16 1996-11-05 Ramtron International Corporation Voltage reference for a ferroelectric 1T/1C based memory
US5836007A (en) * 1995-09-14 1998-11-10 International Business Machines Corporation Methods and systems for improving memory component size and access speed including splitting bit lines and alternate pre-charge/access cycles
US5636170A (en) * 1995-11-13 1997-06-03 Micron Technology, Inc. Low voltage dynamic memory
US5999459A (en) 1998-05-27 1999-12-07 Winbond Electronics Corporation High-performance pass-gate isolation circuitry
JP2007095264A (ja) * 2005-09-29 2007-04-12 Hynix Semiconductor Inc 共有ビットライン感知増幅器構造を有する半導体メモリ素子及びその駆動方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54148340A (en) * 1978-05-12 1979-11-20 Nec Corp Memory circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3560940A (en) * 1968-07-15 1971-02-02 Ibm Time shared interconnection apparatus
DE2647394C2 (de) * 1976-10-20 1978-11-16 Siemens Ag, 1000 Berlin Und 8000 Muenchen MOS-Halbleiterspeicherbaustein
DE2919166C2 (de) * 1978-05-12 1986-01-02 Nippon Electric Co., Ltd., Tokio/Tokyo Speichervorrichtung
US4279023A (en) * 1979-12-19 1981-07-14 International Business Machines Corporation Sense latch

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54148340A (en) * 1978-05-12 1979-11-20 Nec Corp Memory circuit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60242592A (ja) * 1984-02-22 1985-12-02 インテル・コ−ポレ−シヨン 金属酸化膜半導体ダイナミック・ランダム　アクセス・メモリ
JPS6150283A (ja) * 1984-08-17 1986-03-12 Mitsubishi Electric Corp シエアドセンスアンプの駆動回路
JPS6150284A (ja) * 1984-08-17 1986-03-12 Mitsubishi Electric Corp シエアドセンスアンプ回路の駆動方法
US4710901A (en) * 1984-08-17 1987-12-01 Mitsubishi Denki Kabushiki Kaisha Driving circuit for a shared sense amplifier
US4719597A (en) * 1984-08-17 1988-01-12 Mitsubishi Denki Kabushiki Kaisha Driving circuit for a shared sense amplifier with increased speed clock generation circuit for reading addressed memory cells
JPH06195973A (ja) * 1992-10-12 1994-07-15 Nec Corp ダイナミックｒａｍ

Also Published As

Publication number Publication date
EP0049990A3 (en) 1982-10-13
JPH0115957B2 (enExample) 1989-03-22
EP0049990B1 (en) 1987-05-27
EP0049990A2 (en) 1982-04-21
DE3176224D1 (en) 1987-07-02
CA1175939A (en) 1984-10-09
US4351034A (en) 1982-09-21

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