CA1129110A - Appareil et methode pouvant effectuer des transferts d'information compatibles - Google Patents

Appareil et methode pouvant effectuer des transferts d'information compatibles

Info

Publication number
CA1129110A
CA1129110A CA327,297A CA327297A CA1129110A CA 1129110 A CA1129110 A CA 1129110A CA 327297 A CA327297 A CA 327297A CA 1129110 A CA1129110 A CA 1129110A
Authority
CA
Canada
Prior art keywords
bus
local
circuit
coupled
selectively
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA327,297A
Other languages
English (en)
Inventor
D. Craig Kinnie
Richard W. Boberg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of CA1129110A publication Critical patent/CA1129110A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
CA327,297A 1978-05-30 1979-05-09 Appareil et methode pouvant effectuer des transferts d'information compatibles Expired CA1129110A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US91010378A 1978-05-30 1978-05-30
US910,103 1978-05-30

Publications (1)

Publication Number Publication Date
CA1129110A true CA1129110A (fr) 1982-08-03

Family

ID=25428316

Family Applications (1)

Application Number Title Priority Date Filing Date
CA327,297A Expired CA1129110A (fr) 1978-05-30 1979-05-09 Appareil et methode pouvant effectuer des transferts d'information compatibles

Country Status (7)

Country Link
JP (2) JPS54157048A (fr)
CA (1) CA1129110A (fr)
DE (1) DE2921419A1 (fr)
FR (1) FR2427648A1 (fr)
GB (1) GB2021823B (fr)
HK (1) HK14285A (fr)
SG (1) SG61084G (fr)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1121031B (it) * 1979-09-19 1986-03-26 Olivetti & Co Spa Sistema di elaborazione di dati multiprocessore
JPS56132624A (en) * 1980-03-19 1981-10-17 Toshiba Corp Information processor
US4371928A (en) * 1980-04-15 1983-02-01 Honeywell Information Systems Inc. Interface for controlling information transfers between main data processing systems units and a central subsystem
JPS5779551A (en) * 1980-11-06 1982-05-18 Nec Corp Information transfer device
JPS57121746A (en) * 1981-01-22 1982-07-29 Nec Corp Information processing device
US4500958A (en) * 1982-04-21 1985-02-19 Digital Equipment Corporation Memory controller with data rotation arrangement
DE3241356A1 (de) * 1982-11-09 1984-05-10 Siemens AG, 1000 Berlin und 8000 München Vorrichtung zur mikroprogramm-steuerung eines informationstransfers und verfahren zu ihrem betrieb
JPS59226923A (ja) * 1983-05-27 1984-12-20 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン バスインタ−フエ−ス装置
FR2548489B1 (fr) * 1983-06-30 1986-12-05 Num Sa Circuit de comptage destine en particulier a etre associe a un capteur incremental et apte a cooperer avec un calculateur a huit ou seize caracteres binaires
DE3400673A1 (de) * 1984-01-11 1985-07-18 Robert Bosch Gmbh, 7000 Stuttgart Mikrocomputer
JPS60160425A (ja) * 1984-02-01 1985-08-22 Hitachi Ltd 接続回路
US4621341A (en) * 1984-08-24 1986-11-04 Advanced Micro Devices, Inc. Method and apparatus for transferring data in parallel from a smaller to a larger register
US4716527A (en) * 1984-12-10 1987-12-29 Ing. C. Olivetti Bus converter
JPS61139866A (ja) * 1984-12-11 1986-06-27 Toshiba Corp マイクロプロセツサ
JPS61175845A (ja) * 1985-01-31 1986-08-07 Toshiba Corp マイクロプロセツサシステム
BG45007A1 (fr) * 1987-03-19 1989-03-15 Khristo A Turlakov
GB2211326B (en) * 1987-10-16 1991-12-11 Hitachi Ltd Address bus control apparatus
JPH01300361A (ja) * 1988-05-28 1989-12-04 Nec Eng Ltd マイクロプロセッサシステム
GB2222471B (en) * 1988-08-29 1992-12-09 Mitsubishi Electric Corp Ic card with switchable bus structure
JP2539012B2 (ja) * 1988-09-28 1996-10-02 富士通株式会社 メモリカ―ド
DE3900348A1 (de) * 1989-01-07 1990-07-12 Diehl Gmbh & Co Universelles bus-system
JPH0648774Y2 (ja) * 1989-09-21 1994-12-12 沖電気工業株式会社 カード型集積回路、並びにコネクタの端子構造
US5115411A (en) * 1990-06-06 1992-05-19 Ncr Corporation Dual port memory system
JP2568510Y2 (ja) * 1992-01-13 1998-04-15 日産ディーゼル工業株式会社 パーティキュレートトラップフィルタ再生装置
JP3226055B2 (ja) * 1992-09-16 2001-11-05 松下電器産業株式会社 情報処理装置
KR19980033054A (ko) 1996-10-23 1998-07-25 윌리엄비.켐플러 프로그램 가능 메모리 액세스

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1254929A (en) * 1969-03-26 1971-11-24 Standard Telephones Cables Ltd Improvements in or relating to digital computers
JPS5846727B2 (ja) * 1975-02-20 1983-10-18 パナフアコム カブシキガイシヤ チヨクセツメモリ アクセスセイギヨホウシキ
CA1120123A (fr) * 1976-11-11 1982-03-16 Richard P. Kelly Mecanisme automatique de guidage et de mise en forme des donnees

Also Published As

Publication number Publication date
HK14285A (en) 1985-03-08
DE2921419C2 (fr) 1990-12-20
JPS6335152U (fr) 1988-03-07
FR2427648B1 (fr) 1985-03-01
JPS54157048A (en) 1979-12-11
DE2921419A1 (de) 1979-12-13
GB2021823B (en) 1983-04-27
SG61084G (en) 1985-03-15
FR2427648A1 (fr) 1979-12-28
GB2021823A (en) 1979-12-05

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