CA1042519A - High speed-low cost, clock controlled cmos logic implementation - Google Patents

High speed-low cost, clock controlled cmos logic implementation

Info

Publication number
CA1042519A
CA1042519A CA235,949A CA235949A CA1042519A CA 1042519 A CA1042519 A CA 1042519A CA 235949 A CA235949 A CA 235949A CA 1042519 A CA1042519 A CA 1042519A
Authority
CA
Canada
Prior art keywords
source
data node
circuit
current
reference potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA235,949A
Other languages
English (en)
French (fr)
Other versions
CA235949S (en
Inventor
Clarence W. Padgett
Dana C. Street
James A. Luisi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing North American Inc
Original Assignee
Rockwell International Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rockwell International Corp filed Critical Rockwell International Corp
Application granted granted Critical
Publication of CA1042519A publication Critical patent/CA1042519A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
CA235,949A 1974-10-09 1975-09-22 High speed-low cost, clock controlled cmos logic implementation Expired CA1042519A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/513,368 US3982138A (en) 1974-10-09 1974-10-09 High speed-low cost, clock controlled CMOS logic implementation

Publications (1)

Publication Number Publication Date
CA1042519A true CA1042519A (en) 1978-11-14

Family

ID=24042971

Family Applications (1)

Application Number Title Priority Date Filing Date
CA235,949A Expired CA1042519A (en) 1974-10-09 1975-09-22 High speed-low cost, clock controlled cmos logic implementation

Country Status (7)

Country Link
US (1) US3982138A (OSRAM)
JP (1) JPS5316271B2 (OSRAM)
CA (1) CA1042519A (OSRAM)
DE (1) DE2544974C3 (OSRAM)
GB (1) GB1479551A (OSRAM)
IT (1) IT1047658B (OSRAM)
NL (1) NL7511792A (OSRAM)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4103182A (en) * 1976-09-01 1978-07-25 Hewlett-Packard Company Programmable transfer gate array
JPS5447468A (en) * 1977-09-21 1979-04-14 Nec Corp Pulse signal control circuit
US4207616A (en) * 1978-11-29 1980-06-10 Teletype Corporation Logic array having improved speed characteristics
DE3001389A1 (de) * 1980-01-16 1981-07-23 Philips Patentverwaltung Gmbh, 2000 Hamburg Schaltungsanordnung in integrierter schaltungstechnik mit feldeffekttransistoren
US4500799A (en) * 1980-07-28 1985-02-19 Inmos Corporation Bootstrap driver circuits for an MOS memory
US4570244A (en) * 1980-07-28 1986-02-11 Inmos Corporation Bootstrap driver for a static RAM
US4330722A (en) * 1980-08-18 1982-05-18 Bell Telephone Laboratories, Incorporated Clocked IGFET logic circuit
US4345170A (en) * 1980-08-18 1982-08-17 Bell Telephone Laboratories, Incorporated Clocked IGFET logic circuit
DE3047222A1 (de) * 1980-12-15 1982-07-15 Naamloze Vennootschap Philips' Gloeilampenfabrieken, 5621 Eindhoven Verknuepfungsschaltung in 2-phasen-mos-technik
US4430583A (en) 1981-10-30 1984-02-07 Bell Telephone Laboratories, Incorporated Apparatus for increasing the speed of a circuit having a string of IGFETs
USRE32515E (en) * 1981-10-30 1987-10-06 American Telephone And Telegraph Company At&T Bell Laboratories Apparatus for increasing the speed of a circuit having a string of IGFETS
EP0107712A4 (en) * 1982-05-10 1984-09-14 Western Electric Co CMOS INTEGRATED CIRCUIT.
GB2131242A (en) * 1982-11-10 1984-06-13 Philips Electronic Associated Logic circuit array
US4613772A (en) * 1984-04-11 1986-09-23 Harris Corporation Current compensation for logic gates
US4782247A (en) * 1984-08-08 1988-11-01 Fujitsu Limited Decoder circuit having a variable power supply
JPS60103939U (ja) * 1984-10-08 1985-07-16 シャープ株式会社 Ｃ−ｍｏｓレシオレス回路
US4687989A (en) * 1984-11-01 1987-08-18 Thomson Components-Mostek Corp. CMOS powerless rom code mask option select
US4639622A (en) * 1984-11-19 1987-01-27 International Business Machines Corporation Boosting word-line clock circuit for semiconductor memory
US4678941A (en) * 1985-04-25 1987-07-07 International Business Machines Corporation Boost word-line clock and decoder-driver circuits in semiconductor memories
JPS6238291U (OSRAM) * 1985-08-21 1987-03-06
US4686392A (en) * 1985-10-30 1987-08-11 International Business Machines Corporation Multi-functional differential cascode voltage switch logic
FR2596595B1 (fr) * 1986-03-28 1988-05-13 Radiotechnique Compelec Porte logique mos du type domino
JPS63228494A (ja) * 1987-03-18 1988-09-22 Fujitsu Ltd ダイナミツク型デコ−ダ回路
US4954731A (en) * 1989-04-26 1990-09-04 International Business Machines Corporation Wordline voltage boosting circuits for complementary MOSFET dynamic memories
DE4141885C1 (OSRAM) * 1991-12-18 1992-12-24 Siemens Ag, 8000 Muenchen, De
US5714904A (en) * 1994-06-06 1998-02-03 Sun Microsystems, Inc. High speed serial link for fully duplexed data communication
JPH1092946A (ja) * 1996-09-12 1998-04-10 Nec Ic Microcomput Syst Ltd 半導体集積回路
US5903170A (en) * 1997-06-03 1999-05-11 The Regents Of The University Of Michigan Digital logic design using negative differential resistance diodes and field-effect transistors
KR100635924B1 (ko) * 2004-11-17 2006-10-18 삼성전자주식회사 플래시 메모리 장치의 동작 방법
US7895560B2 (en) * 2006-10-02 2011-02-22 William Stuart Lovell Continuous flow instant logic binary circuitry actively structured by code-generated pass transistor interconnects
US7779372B2 (en) * 2007-01-26 2010-08-17 Apple Inc. Clock gater with test features and low setup time
GB2529862A (en) * 2014-09-04 2016-03-09 Ibm Current-mode sense amplifier and reference current circuitry

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1465699A (fr) * 1965-12-03 1967-01-13 Csf Circuits logiques à transistors à effet de champ
US3479523A (en) * 1966-09-26 1969-11-18 Ibm Integrated nor logic circuit
US3536936A (en) * 1968-10-10 1970-10-27 Gen Instrument Corp Clock generator
AT307092B (de) * 1969-05-31 1973-05-10 Licentia Gmbh Logische Verknüpfung
US3676705A (en) * 1970-05-11 1972-07-11 Rca Corp Logic circuits employing switches such as field-effect devices
US3740576A (en) * 1970-08-04 1973-06-19 Licentia Gmbh Dynamic logic interconnection
US3825888A (en) * 1971-06-23 1974-07-23 Hitachi Ltd Decoder circuit
US3774055A (en) * 1972-01-24 1973-11-20 Nat Semiconductor Corp Clocked bootstrap inverter circuit
JPS5317022B2 (OSRAM) * 1972-05-29 1978-06-05

Also Published As

Publication number Publication date
DE2544974B2 (de) 1978-06-15
USB513368I5 (OSRAM) 1976-02-03
DE2544974A1 (de) 1976-04-15
US3982138A (en) 1976-09-21
DE2544974C3 (de) 1979-02-01
JPS5162652A (OSRAM) 1976-05-31
IT1047658B (it) 1980-10-20
NL7511792A (nl) 1976-04-13
GB1479551A (en) 1977-07-13
JPS5316271B2 (OSRAM) 1978-05-31

Similar Documents

Publication Publication Date Title
CA1042519A (en) High speed-low cost, clock controlled cmos logic implementation
US6031778A (en) Semiconductor integrated circuit
US4185321A (en) Semiconductor memory with pulse controlled column load circuit
JP3239867B2 (ja) 半導体装置
US4849935A (en) Semiconductor memory including transparent latch circuits
KR100363142B1 (ko) 3상태논리게이트회로를갖는반도체집적회로
US4275312A (en) MOS decoder logic circuit having reduced power consumption
US4176289A (en) Driving circuit for integrated circuit semiconductor memory
US6285213B1 (en) Semiconductor integrated circuit device
KR850006234A (ko) 반도체 집적회로
KR100287545B1 (ko) 불 휘발성 반도체 메모리 장치
GB1589414A (en) Fet driver circuits
JPH08251014A (ja) ダイナミック論理回路を有する装置及びその装置の製造方法並びに信号の処理方法
EP0110060B1 (en) Fet voltage level shift circuitry
US6633992B1 (en) Generalized pre-charge clock circuit for pulsed domino gates
US3852625A (en) Semiconductor circuit
US4112296A (en) Data latch
US5355028A (en) Lower power CMOS buffer amplifier for use in integrated circuit substrate bias generators
US5602497A (en) Precharged adiabatic pipelined logic
US3986042A (en) CMOS Boolean logic mechanization
US6385099B1 (en) Reducing level shifter standby power consumption
US4093875A (en) Field effect transistor (FET) circuit utilizing substrate potential for turning off depletion mode devices
EP0063357B1 (en) Drive circuit
EP0061844A2 (en) Flip-flop circuit
KR0159324B1 (ko) 데이터 출력회로