AT307092B - Logische Verknüpfung - Google Patents

Logische Verknüpfung

Info

Publication number
AT307092B
AT307092B AT421770A AT421770A AT307092B AT 307092 B AT307092 B AT 307092B AT 421770 A AT421770 A AT 421770A AT 421770 A AT421770 A AT 421770A AT 307092 B AT307092 B AT 307092B
Authority
AT
Austria
Prior art keywords
logical connection
logical
connection
Prior art date
Application number
AT421770A
Other languages
English (en)
Original Assignee
Licentia Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19691927873 external-priority patent/DE1927873C/de
Application filed by Licentia Gmbh filed Critical Licentia Gmbh
Application granted granted Critical
Publication of AT307092B publication Critical patent/AT307092B/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01728—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
AT421770A 1969-05-31 1970-05-11 Logische Verknüpfung AT307092B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691927873 DE1927873C (de) 1969-05-31 Dynamische, mit periodisch sich wiederholenden Phasentaktimpulsen betriebene logische Verknupfungs schaltung

Publications (1)

Publication Number Publication Date
AT307092B true AT307092B (de) 1973-05-10

Family

ID=5735773

Family Applications (1)

Application Number Title Priority Date Filing Date
AT421770A AT307092B (de) 1969-05-31 1970-05-11 Logische Verknüpfung

Country Status (6)

Country Link
US (1) US3683201A (de)
AT (1) AT307092B (de)
FR (1) FR2048940A5 (de)
GB (1) GB1291184A (de)
NL (1) NL7007729A (de)
SE (1) SE359419B (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3878405A (en) * 1972-07-13 1975-04-15 Teradyne Inc Switching circuitry for logical testing of network connections
JPS5931253B2 (ja) * 1972-08-25 1984-08-01 株式会社日立製作所 デプレツシヨン型負荷トランジスタを有するｍｉｓｆｅｔ論理回路
JPS5242507B2 (de) * 1972-08-31 1977-10-25
US3825771A (en) * 1972-12-04 1974-07-23 Bell Telephone Labor Inc Igfet inverter circuit
US3982138A (en) * 1974-10-09 1976-09-21 Rockwell International Corporation High speed-low cost, clock controlled CMOS logic implementation
US4185209A (en) * 1978-02-02 1980-01-22 Rockwell International Corporation CMOS boolean logic circuit
US4449224A (en) * 1980-12-29 1984-05-15 Eliyahou Harari Dynamic merged load logic (MLL) and merged load memory (MLM)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3153154A (en) * 1962-02-13 1964-10-13 James J Murray Grid controlled transistor device
US3497715A (en) * 1967-06-09 1970-02-24 Ncr Co Three-phase metal-oxide-semiconductor logic circuit
US3524077A (en) * 1968-02-28 1970-08-11 Rca Corp Translating information with multi-phase clock signals
US3517210A (en) * 1968-03-15 1970-06-23 Gen Instrument Corp Fet dynamic data inverter
US3515901A (en) * 1968-04-01 1970-06-02 North American Rockwell Nand/nor circuit

Also Published As

Publication number Publication date
SE359419B (de) 1973-08-27
US3683201A (en) 1972-08-08
FR2048940A5 (de) 1971-03-19
NL7007729A (de) 1970-12-02
DE1927873B2 (de) 1972-11-09
GB1291184A (en) 1972-10-04
DE1927873A1 (de) 1970-12-17
SU374878A3 (de) 1973-03-20

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee