BRPI1007604A2 - "estrutura de semicondutor com ajuste de tensão de limiar através de modificação em empilhamento de portas dielétricas e método de formação de tal estrutura" - Google Patents

"estrutura de semicondutor com ajuste de tensão de limiar através de modificação em empilhamento de portas dielétricas e método de formação de tal estrutura"

Info

Publication number
BRPI1007604A2
BRPI1007604A2 BRPI1007604A BRPI1007604A BRPI1007604A2 BR PI1007604 A2 BRPI1007604 A2 BR PI1007604A2 BR PI1007604 A BRPI1007604 A BR PI1007604A BR PI1007604 A BRPI1007604 A BR PI1007604A BR PI1007604 A2 BRPI1007604 A2 BR PI1007604A2
Authority
BR
Brazil
Prior art keywords
forming
threshold voltage
gate stack
voltage adjustment
dielectric gate
Prior art date
Application number
BRPI1007604A
Other languages
English (en)
Inventor
Brian J Greene
Edward J Nowak
Edward P Maciejewski
Michael P Chudzik
Myung-Hee Na
Shu-Jen Han
William K Henson
Xiaojun Yu
Yue Liang
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BRPI1007604A2 publication Critical patent/BRPI1007604A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/0135—Making the insulator by deposition of a layer, e.g. metal, metal compound or polysilicon, followed by transformation thereof into the insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H10D84/014—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/8314—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having gate insulating layers with different properties
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
BRPI1007604A 2009-04-30 2010-04-22 "estrutura de semicondutor com ajuste de tensão de limiar através de modificação em empilhamento de portas dielétricas e método de formação de tal estrutura" BRPI1007604A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/432,927 US8106455B2 (en) 2009-04-30 2009-04-30 Threshold voltage adjustment through gate dielectric stack modification
PCT/US2010/031998 WO2010126768A1 (en) 2009-04-30 2010-04-22 Threshold voltage adjustment through gate dielectric stack modification

Publications (1)

Publication Number Publication Date
BRPI1007604A2 true BRPI1007604A2 (pt) 2016-02-16

Family

ID=43029749

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI1007604A BRPI1007604A2 (pt) 2009-04-30 2010-04-22 "estrutura de semicondutor com ajuste de tensão de limiar através de modificação em empilhamento de portas dielétricas e método de formação de tal estrutura"

Country Status (11)

Country Link
US (2) US8106455B2 (pt)
EP (1) EP2404316B1 (pt)
JP (1) JP5698732B2 (pt)
CN (1) CN102439700B (pt)
BR (1) BRPI1007604A2 (pt)
CA (1) CA2750215A1 (pt)
MX (1) MX2011008993A (pt)
RU (1) RU2538356C2 (pt)
SG (1) SG174853A1 (pt)
TW (1) TWI473250B (pt)
WO (1) WO2010126768A1 (pt)

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CN108122851B (zh) * 2016-11-30 2020-09-08 中芯国际集成电路制造(上海)有限公司 多阈值电压晶体管及其形成方法
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Also Published As

Publication number Publication date
MX2011008993A (es) 2011-09-21
EP2404316A4 (en) 2016-04-06
US8106455B2 (en) 2012-01-31
WO2010126768A1 (en) 2010-11-04
SG174853A1 (en) 2011-11-28
CN102439700A (zh) 2012-05-02
JP2012525707A (ja) 2012-10-22
TW201104836A (en) 2011-02-01
EP2404316B1 (en) 2021-06-23
CN102439700B (zh) 2015-01-28
US20100276753A1 (en) 2010-11-04
US8354309B2 (en) 2013-01-15
TWI473250B (zh) 2015-02-11
CA2750215A1 (en) 2010-11-04
US20120108017A1 (en) 2012-05-03
RU2538356C2 (ru) 2015-01-10
RU2011148253A (ru) 2013-06-10
JP5698732B2 (ja) 2015-04-08
EP2404316A1 (en) 2012-01-11

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B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]
B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]