BR0212570A - Limitador de largura de banda programável utilizando supressão de intercâmbio de sinais mediante estabelecimento de comunicação - Google Patents

Limitador de largura de banda programável utilizando supressão de intercâmbio de sinais mediante estabelecimento de comunicação

Info

Publication number
BR0212570A
BR0212570A BR0212570-6A BR0212570A BR0212570A BR 0212570 A BR0212570 A BR 0212570A BR 0212570 A BR0212570 A BR 0212570A BR 0212570 A BR0212570 A BR 0212570A
Authority
BR
Brazil
Prior art keywords
handshake
signal
reset signal
generate
signal exchange
Prior art date
Application number
BR0212570-6A
Other languages
English (en)
Inventor
David Leon Simpson
Didier Joseph Marie Velez
Original Assignee
Thomson Licensing Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing Sa filed Critical Thomson Licensing Sa
Publication of BR0212570A publication Critical patent/BR0212570A/pt

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/405Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G06F13/4054Coupling between buses using bus bridges where the bridge performs a synchronising function where the function is bus cycle extension, e.g. to meet the timing requirements of the target bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4286Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • H04L12/40032Details regarding a bus interface enhancer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/4013Management of data rate on the bus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Small-Scale Networks (AREA)

Abstract

"LIMITADOR DE LARGURA DE BANDA PROGRAMáVEL UTILIZANDO SUPRESSãO DE INTERCâMBIO DE SINAIS MEDIANTE ESTABELECIMENTO DE COMUNICAçãO". Um aparelho (62) para limitar uma largura de banda de transferência de dados através da supressão de handshake é configurado para gerar um primeiro sinal de reconfiguração, gerar um segundo sinal de reconfiguração um número predeterminado de ciclos de relógio após a geração do primeiro sinal de reconfiguração, gerar uma contagem de handshake representando um número de recepções, entre o primeiro sinal de reconfiguração e o segundo sinal de reconfiguração, de um primeiro sinal de handshake Pronto para Enviar ("RTS") e um primeiro sinal de handshake Pronto para Receber ("RTR"), e desativar um segundo sinal de handshake RTR e o primeiro sinal de handshake RTS com base em uma comparação da contagem de handshake com um valor máximo.
BR0212570-6A 2001-09-19 2002-09-19 Limitador de largura de banda programável utilizando supressão de intercâmbio de sinais mediante estabelecimento de comunicação BR0212570A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US32327201P 2001-09-19 2001-09-19
PCT/US2002/029755 WO2003034194A1 (en) 2001-09-19 2002-09-19 Programmable bandwidth limiter using handshake suppression

Publications (1)

Publication Number Publication Date
BR0212570A true BR0212570A (pt) 2004-10-13

Family

ID=23258446

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0212570-6A BR0212570A (pt) 2001-09-19 2002-09-19 Limitador de largura de banda programável utilizando supressão de intercâmbio de sinais mediante estabelecimento de comunicação

Country Status (9)

Country Link
US (1) US6839779B2 (pt)
EP (1) EP1428109B1 (pt)
JP (1) JP4009594B2 (pt)
KR (1) KR100903905B1 (pt)
CN (1) CN100392561C (pt)
BR (1) BR0212570A (pt)
DE (1) DE60229863D1 (pt)
MX (1) MXPA04002479A (pt)
WO (1) WO2003034194A1 (pt)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7822009B2 (en) * 2005-05-09 2010-10-26 Industrial Technology Research Institute Distributed medium access protocol for wireless mesh networks
US7831795B2 (en) * 2005-11-28 2010-11-09 Commvault Systems, Inc. Systems and methods for classifying and transferring information in a storage network
CN101430645B (zh) * 2007-11-06 2012-07-04 上海摩波彼克半导体有限公司 基于计算机实现数据卡软件下载和升级的方法
US8578078B1 (en) * 2008-03-21 2013-11-05 Altera Corporation Valid latency for programmable chip components
CN110381596B (zh) * 2019-09-02 2023-04-18 北京百佑科技有限公司 点对点无线通信控制方法、装置、终端及可读存储介质

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4873703A (en) * 1985-09-27 1989-10-10 Hewlett-Packard Company Synchronizing system
JPH0744567B2 (ja) 1986-08-27 1995-05-15 日産自動車株式会社 通信インタ−フエイス装置
JPH077375B2 (ja) * 1988-06-17 1995-01-30 日本電気株式会社 バス制御方式
WO1991015069A1 (en) * 1990-03-29 1991-10-03 Sf2 Corporation Method and apparatus for scheduling access to a csma communication medium
US5485455A (en) 1994-01-28 1996-01-16 Cabletron Systems, Inc. Network having secure fast packet switching and guaranteed quality of service
US5619544A (en) * 1994-06-03 1997-04-08 Texas Instruments Incorporated Universal asynchronous receive/transmit circuit with flow control
US5862352A (en) * 1997-02-06 1999-01-19 Lsi Logic Corporation Variable period and assertion width REQ/ACK pulse generator for synchronous SCSI data transfers
US5881248A (en) * 1997-03-06 1999-03-09 Advanced Micro Devices, Inc. System and method for optimizing system bus bandwidth in an embedded communication system
US6105083A (en) 1997-06-20 2000-08-15 Avid Technology, Inc. Apparatus and method for controlling transfer of data between and processing of data by interconnected data processing elements
JPH1155084A (ja) * 1997-07-29 1999-02-26 Matsushita Electric Works Ltd 出力遅延回路
JPH1185632A (ja) * 1997-09-12 1999-03-30 Hitachi Ltd データ通信方法
KR100257712B1 (ko) 1997-12-31 2000-06-01 서평원 인터넷을 이용한 프로세스 간의 정보교환 장치
JPH11250005A (ja) * 1998-03-05 1999-09-17 Nec Corp バス制御方法、バス制御装置及びバス制御プログラムを記憶した記憶媒体
US6141691A (en) 1998-04-03 2000-10-31 Avid Technology, Inc. Apparatus and method for controlling transfer of data between and processing of data by interconnected data processing elements
US6415347B1 (en) * 1999-06-30 2002-07-02 Adaptec, Inc. Hardware attention management circuit and method for parallel SCSI host adapters
US6363444B1 (en) * 1999-07-15 2002-03-26 3Com Corporation Slave processor to slave memory data transfer with master processor writing address to slave memory and providing control input to slave processor and slave memory
US6438633B1 (en) 2000-04-20 2002-08-20 Sony Corporation System for providing deterministic performance from a non-deterministic device

Also Published As

Publication number Publication date
US20040236882A1 (en) 2004-11-25
KR100903905B1 (ko) 2009-06-19
US6839779B2 (en) 2005-01-04
EP1428109A4 (en) 2006-05-24
EP1428109B1 (en) 2008-11-12
CN100392561C (zh) 2008-06-04
MXPA04002479A (es) 2004-05-31
WO2003034194A1 (en) 2003-04-24
JP4009594B2 (ja) 2007-11-14
JP2005506015A (ja) 2005-02-24
DE60229863D1 (de) 2008-12-24
EP1428109A1 (en) 2004-06-16
KR20040041162A (ko) 2004-05-14
CN1556945A (zh) 2004-12-22

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 11A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2259 DE 22/04/2014.