BR0015907A - Disposição de microprocessador com codificação - Google Patents

Disposição de microprocessador com codificação

Info

Publication number
BR0015907A
BR0015907A BR0015907-7A BR0015907A BR0015907A BR 0015907 A BR0015907 A BR 0015907A BR 0015907 A BR0015907 A BR 0015907A BR 0015907 A BR0015907 A BR 0015907A
Authority
BR
Brazil
Prior art keywords
coding
data
bus
microprocessor
data bus
Prior art date
Application number
BR0015907-7A
Other languages
English (en)
Inventor
Berndt Gammel
Olivier Kniffler
Holger Sedlak
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Publication of BR0015907A publication Critical patent/BR0015907A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/582—Pseudo-random number generators
    • G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/82—Protecting input, output or interconnection devices
    • G06F21/85—Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/10—Protecting distributed programs or content, e.g. vending or licensing of copyrighted material ; Digital rights management [DRM]
    • G06F21/12—Protecting executable software
    • G06F21/121—Restricting unauthorised execution of programs
    • G06F21/123—Restricting unauthorised execution of programs by using dedicated hardware, e.g. dongles, smart cards, cryptographic processors, global positioning systems [GPS] devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/602—Providing cryptographic facilities or services
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
    • G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • General Health & Medical Sciences (AREA)
  • Bioethics (AREA)
  • Health & Medical Sciences (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Multimedia (AREA)
  • Technology Law (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Storage Device Security (AREA)
  • Microcomputers (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

"DISPOSIçãO DE MICROPROCESSADOR COM CODIFICAçãO". A invenção refere-se a uma disposição de microprocessador que abrange um coletor de dados (4), para a transmissão de dados entre unidades funcionais (1, 2, 3). Cada unidade contém no lado do coletor, um dispositivo de codificação e de decodificação (11, 21, 31), que são comandados por um gerador de valores aleatórios (6) de forma síncrona. A disposição possibilita uma segurança de escuta relativamente alta dos dados transmitidos através do coletor de dados, com dispêndio de ligação adicional substituível.
BR0015907-7A 1999-12-02 2000-11-30 Disposição de microprocessador com codificação BR0015907A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP99124134 1999-12-02
PCT/EP2000/012065 WO2001040950A2 (de) 1999-12-02 2000-11-30 Mikroprozessoranordnung mit verschlüsselung

Publications (1)

Publication Number Publication Date
BR0015907A true BR0015907A (pt) 2002-08-06

Family

ID=8239520

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0015907-7A BR0015907A (pt) 1999-12-02 2000-11-30 Disposição de microprocessador com codificação

Country Status (12)

Country Link
US (1) US7036017B2 (pt)
EP (1) EP1234239B1 (pt)
JP (1) JP3866105B2 (pt)
KR (1) KR100490114B1 (pt)
CN (1) CN1168011C (pt)
AT (1) ATE454670T1 (pt)
BR (1) BR0015907A (pt)
DE (1) DE50015839D1 (pt)
MX (1) MXPA02005352A (pt)
RU (1) RU2251726C2 (pt)
UA (1) UA72944C2 (pt)
WO (1) WO2001040950A2 (pt)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
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KR100428786B1 (ko) * 2001-08-30 2004-04-30 삼성전자주식회사 내부 버스 입출력 데이터를 보호할 수 있는 집적 회로
KR100445406B1 (ko) * 2001-11-30 2004-08-25 주식회사 하이닉스반도체 데이터 암호화 장치 및 그 방법
DE10201450B4 (de) * 2002-01-16 2004-09-02 Infineon Technologies Ag Carry-Skip-Addierer für verschlüsselte Daten
DE10201442C1 (de) * 2002-01-16 2003-07-31 Infineon Technologies Ag Vorrichtung und Verfahren zum Multiplizieren oder Dividieren eines ersten Operanden mit bzw. durch einen zweiten Operanden
DE10201449C1 (de) 2002-01-16 2003-08-14 Infineon Technologies Ag Rechenwerk, Verfahren zum Ausführen einer Operation mit einem verschlüsselten Operanden, Carry-Select-Addierer und Kryptographieprozessor
DE10201443B4 (de) * 2002-01-16 2004-08-12 Infineon Technologies Ag Carry-Save-Multiplizierer für verschlüsselte Daten
DE10201441A1 (de) 2002-01-16 2003-08-14 Infineon Technologies Ag Schiebevorrichtung und Verfahren zum Verschieben
DE10205316B4 (de) 2002-02-08 2008-01-17 Infineon Technologies Ag Schlüsselmanagementeinrichtung und Verfahren zur verschlüsselten Ablage von digitalen Datenwörtern
US7248696B2 (en) * 2002-09-12 2007-07-24 International Business Machines Corporation Dynamic system bus encryption using improved differential transitional encoding
JP3880933B2 (ja) * 2003-01-21 2007-02-14 株式会社東芝 耐タンパマイクロプロセッサ及びキャッシュメモリ搭載プロセッサによるデータアクセス制御方法
FR2857534B1 (fr) * 2003-07-09 2005-10-28 Innova Card Circuit integre comportant un module ordinaire et un module securise raccordes par une liaison protegee
FR2862150B1 (fr) * 2003-11-12 2006-08-11 Innova Card Circuit integre a bus de donnees protege par un brouillage
DE102004013480B4 (de) * 2004-03-18 2013-01-24 Infineon Technologies Ag Zufallszahlengenerator und Verfahren zum Erzeugen von Zufallszahlen
US7636857B2 (en) * 2004-05-24 2009-12-22 Interdigital Technology Corporation Data-mover controller with plural registers for supporting ciphering operations
US8065532B2 (en) * 2004-06-08 2011-11-22 Hrl Laboratories, Llc Cryptographic architecture with random instruction masking to thwart differential power analysis
EP1605359A1 (en) * 2004-06-11 2005-12-14 Axalto SA Hiding information transmitted on a data bus
JP4664655B2 (ja) * 2004-11-29 2011-04-06 ルネサスエレクトロニクス株式会社 情報処理装置、および、そのアドレス制御方法
DE102005013830B4 (de) * 2005-03-24 2008-11-20 Infineon Technologies Ag Vorrichtung und Verfahren zum verschlüsselten Übertragen von Daten
US7881465B2 (en) * 2005-08-08 2011-02-01 Infineon Technologies Ag Circuit and method for calculating a logic combination of two encrypted input operands
DE102005037357B3 (de) * 2005-08-08 2007-02-01 Infineon Technologies Ag Logikschaltung und Verfahren zum Berechnen eines maskierten Ergebnisoperanden
DE102006006057B4 (de) 2006-02-09 2007-12-27 Infineon Technologies Ag Datenverschlüsselungsvorrichtung und Verfahren zum Verschlüsseln von Daten
US8560863B2 (en) 2006-06-27 2013-10-15 Intel Corporation Systems and techniques for datapath security in a system-on-a-chip device
DE102007007699A1 (de) * 2007-02-09 2008-08-14 IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik Reduktion von Seiten-Kanal-Informationen durch interagierende Krypto-Blocks
KR101370829B1 (ko) * 2007-05-08 2014-03-10 삼성전자주식회사 데이터의 암호화/복호화 방법 및 이를 적용한 버스 시스템
EP2181504A4 (en) * 2008-08-15 2010-07-28 Lsi Corp DECODING LIST OF CODED WORDS CLOSE IN A ROM MEMORY
DE102010014748B4 (de) 2009-09-30 2019-01-17 Infineon Technologies Ag Vorrichtung zum Protokollieren einer Konfiguration eines Mikroprozessorsystems sowie Verfahren zum Protokollieren einer Konfiguration eines Mikroprozessorsystems
US8379847B2 (en) 2010-06-30 2013-02-19 International Business Machines Corporation Data and control encryption
CN105095795B (zh) * 2014-05-14 2020-04-17 国民技术股份有限公司 防探针攻击的芯片信号处理方法和处理系统
JP6467246B2 (ja) * 2015-02-26 2019-02-06 株式会社メガチップス データ処理システム
US9990503B2 (en) * 2015-08-04 2018-06-05 Ge Aviation Systems, Llc Cryptographic key server embedded in data transfer system
TW202240012A (zh) * 2021-03-05 2022-10-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 膜沉積系統及方法

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Also Published As

Publication number Publication date
DE50015839D1 (pt) 2010-02-25
WO2001040950A2 (de) 2001-06-07
RU2002117437A (ru) 2004-02-20
MXPA02005352A (es) 2003-01-28
EP1234239A2 (de) 2002-08-28
JP2003516071A (ja) 2003-05-07
WO2001040950A3 (de) 2001-12-20
US7036017B2 (en) 2006-04-25
UA72944C2 (uk) 2005-05-16
US20020169968A1 (en) 2002-11-14
CN1402848A (zh) 2003-03-12
ATE454670T1 (de) 2010-01-15
KR100490114B1 (ko) 2005-05-16
CN1168011C (zh) 2004-09-22
JP3866105B2 (ja) 2007-01-10
RU2251726C2 (ru) 2005-05-10
EP1234239B1 (de) 2010-01-06
KR20020059834A (ko) 2002-07-13

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 9A E 10A ANUIDADE(S).

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2112 DE 28/06/2011.