FR2862150B1 - Circuit integre a bus de donnees protege par un brouillage - Google Patents

Circuit integre a bus de donnees protege par un brouillage

Info

Publication number
FR2862150B1
FR2862150B1 FR0313228A FR0313228A FR2862150B1 FR 2862150 B1 FR2862150 B1 FR 2862150B1 FR 0313228 A FR0313228 A FR 0313228A FR 0313228 A FR0313228 A FR 0313228A FR 2862150 B1 FR2862150 B1 FR 2862150B1
Authority
FR
France
Prior art keywords
interference
data bus
integrated data
bus circuit
circuit protected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0313228A
Other languages
English (en)
Other versions
FR2862150A1 (fr
Inventor
Frank Lhermet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Innova Card SARL
Original Assignee
Innova Card SARL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Innova Card SARL filed Critical Innova Card SARL
Priority to FR0313228A priority Critical patent/FR2862150B1/fr
Publication of FR2862150A1 publication Critical patent/FR2862150A1/fr
Application granted granted Critical
Publication of FR2862150B1 publication Critical patent/FR2862150B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/82—Protecting input, output or interconnection devices
    • G06F21/85—Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
    • G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)
FR0313228A 2003-11-12 2003-11-12 Circuit integre a bus de donnees protege par un brouillage Expired - Lifetime FR2862150B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR0313228A FR2862150B1 (fr) 2003-11-12 2003-11-12 Circuit integre a bus de donnees protege par un brouillage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0313228A FR2862150B1 (fr) 2003-11-12 2003-11-12 Circuit integre a bus de donnees protege par un brouillage

Publications (2)

Publication Number Publication Date
FR2862150A1 FR2862150A1 (fr) 2005-05-13
FR2862150B1 true FR2862150B1 (fr) 2006-08-11

Family

ID=34508402

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0313228A Expired - Lifetime FR2862150B1 (fr) 2003-11-12 2003-11-12 Circuit integre a bus de donnees protege par un brouillage

Country Status (1)

Country Link
FR (1) FR2862150B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7949883B2 (en) * 2004-06-08 2011-05-24 Hrl Laboratories, Llc Cryptographic CPU architecture with random instruction masking to thwart differential power analysis
US7961885B2 (en) 2005-04-20 2011-06-14 Honeywell International Inc. Encrypted JTAG interface
US7900064B2 (en) 2005-04-20 2011-03-01 Honeywell International Inc. Encrypted debug interface
US8011005B2 (en) 2005-04-20 2011-08-30 Honeywell International Inc. Hardware encryption key for use in anti-tamper system
US7509250B2 (en) 2005-04-20 2009-03-24 Honeywell International Inc. Hardware key control of debug interface
US8560863B2 (en) 2006-06-27 2013-10-15 Intel Corporation Systems and techniques for datapath security in a system-on-a-chip device
FR2998693B1 (fr) * 2012-11-29 2015-03-13 Spirtech Procede de derivation de cles cryptographiques multiples a partir d'une cle maitresse dans un microprocesseur de securite

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3866105B2 (ja) * 1999-12-02 2007-01-10 インフィネオン テクノロジーズ アクチエンゲゼルシャフト 暗号化機能を備えるマイクロプロセッサ装置
DE50003679D1 (de) * 2000-01-18 2003-10-16 Infineon Technologies Ag Mikroprozessoranordnung mit verschlüsselung
JP2002328845A (ja) * 2001-05-07 2002-11-15 Fujitsu Ltd 半導体集積回路及びｉｃカードのセキュリティー保護方法
KR100428786B1 (ko) * 2001-08-30 2004-04-30 삼성전자주식회사 내부 버스 입출력 데이터를 보호할 수 있는 집적 회로

Also Published As

Publication number Publication date
FR2862150A1 (fr) 2005-05-13

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