AU594518B2 - Planarization through silylation - Google Patents

Planarization through silylation Download PDF

Info

Publication number
AU594518B2
AU594518B2 AU80131/87A AU8013187A AU594518B2 AU 594518 B2 AU594518 B2 AU 594518B2 AU 80131/87 A AU80131/87 A AU 80131/87A AU 8013187 A AU8013187 A AU 8013187A AU 594518 B2 AU594518 B2 AU 594518B2
Authority
AU
Australia
Prior art keywords
insulator
photoresist
silylation
etching
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU80131/87A
Other languages
English (en)
Other versions
AU8013187A (en
Inventor
Garth Alwyn Brooks
Nancy Anne Greco
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of AU8013187A publication Critical patent/AU8013187A/en
Application granted granted Critical
Publication of AU594518B2 publication Critical patent/AU594518B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H10P14/69215—
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16—Coating processes; Apparatus therefor
    • G03F7/162—Coating on a rotating support, e.g. using a whirler or a spinner
    • H10P14/6922—
    • H10P95/06—
    • H10W20/092—

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
AU80131/87A 1986-10-27 1987-10-26 Planarization through silylation Ceased AU594518B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/923,779 US4816112A (en) 1986-10-27 1986-10-27 Planarization process through silylation
US923779 1986-10-27

Publications (2)

Publication Number Publication Date
AU8013187A AU8013187A (en) 1988-05-05
AU594518B2 true AU594518B2 (en) 1990-03-08

Family

ID=25449260

Family Applications (1)

Application Number Title Priority Date Filing Date
AU80131/87A Ceased AU594518B2 (en) 1986-10-27 1987-10-26 Planarization through silylation

Country Status (7)

Country Link
US (1) US4816112A (enExample)
EP (1) EP0265619B1 (enExample)
JP (1) JPS63115341A (enExample)
AU (1) AU594518B2 (enExample)
BR (1) BR8705230A (enExample)
CA (1) CA1308609C (enExample)
DE (1) DE3779043D1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4986876A (en) * 1990-05-07 1991-01-22 The United States Of America As Represented By The Secretary Of The Army Method of smoothing patterned transparent electrode stripes in thin film electroluminescent display panel manufacture
US5139608A (en) * 1991-04-01 1992-08-18 Motorola, Inc. Method of planarizing a semiconductor device surface
JPH05243223A (ja) * 1992-02-28 1993-09-21 Fujitsu Ltd 集積回路装置の製造方法
KR0170253B1 (ko) * 1992-11-18 1999-03-20 김광호 실리레이션을 이용한 사진식각방법
US5981143A (en) * 1997-11-26 1999-11-09 Trw Inc. Chemically treated photoresist for withstanding ion bombarded processing

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985000685A1 (en) * 1983-07-20 1985-02-14 Don Marketing Management Limited A label
EP0223920A2 (en) * 1985-10-28 1987-06-03 International Business Machines Corporation Chem-mech polishing method for producing coplanar metal/insulator films on a substrate

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2547792C3 (de) * 1974-10-25 1978-08-31 Hitachi, Ltd., Tokio Verfahren zur Herstellung eines Halbleiterbauelementes
US4004044A (en) * 1975-05-09 1977-01-18 International Business Machines Corporation Method for forming patterned films utilizing a transparent lift-off mask
EP0117258B1 (de) * 1983-02-23 1987-05-20 Ibm Deutschland Gmbh Verfahren zur Herstellung von haftfesten Metallschichten auf Kunststoffsubstraten
US4511430A (en) * 1984-01-30 1985-04-16 International Business Machines Corporation Control of etch rate ratio of SiO2 /photoresist for quartz planarization etch back process
US4552833A (en) * 1984-05-14 1985-11-12 International Business Machines Corporation Radiation sensitive and oxygen plasma developable resist
JPS60262150A (ja) * 1984-06-11 1985-12-25 Nippon Telegr & Teleph Corp <Ntt> 三層レジスト用中間層材料及びそれを用いた三層レジストパタン形成方法
US4541169A (en) * 1984-10-29 1985-09-17 International Business Machines Corporation Method for making studs for interconnecting metallization layers at different levels in a semiconductor chip
US4541168A (en) * 1984-10-29 1985-09-17 International Business Machines Corporation Method for making metal contact studs between first level metal and regions of a semiconductor device compatible with polyimide-filled deep trench isolation schemes
US4613398A (en) * 1985-06-06 1986-09-23 International Business Machines Corporation Formation of etch-resistant resists through preferential permeation
US4702792A (en) * 1985-10-28 1987-10-27 International Business Machines Corporation Method of forming fine conductive lines, patterns and connectors
US4723978A (en) * 1985-10-31 1988-02-09 International Business Machines Corporation Method for a plasma-treated polysiloxane coating
US4676868A (en) * 1986-04-23 1987-06-30 Fairchild Semiconductor Corporation Method for planarizing semiconductor substrates

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985000685A1 (en) * 1983-07-20 1985-02-14 Don Marketing Management Limited A label
EP0223920A2 (en) * 1985-10-28 1987-06-03 International Business Machines Corporation Chem-mech polishing method for producing coplanar metal/insulator films on a substrate

Also Published As

Publication number Publication date
JPH0565049B2 (enExample) 1993-09-16
US4816112A (en) 1989-03-28
AU8013187A (en) 1988-05-05
CA1308609C (en) 1992-10-13
JPS63115341A (ja) 1988-05-19
EP0265619B1 (en) 1992-05-13
EP0265619A2 (en) 1988-05-04
BR8705230A (pt) 1988-05-24
EP0265619A3 (en) 1988-10-26
DE3779043D1 (de) 1992-06-17

Similar Documents

Publication Publication Date Title
US4487652A (en) Slope etch of polyimide
US4944836A (en) Chem-mech polishing method for producing coplanar metal/insulator films on a substrate
KR100271769B1 (ko) 반도체소자의 제조방법, 이를 위한 반도체소자 제조용 식각액조성물 및 반도체소자
US6696759B2 (en) Semiconductor device with diamond-like carbon layer as a polish-stop layer
JPH01290236A (ja) 幅の広いトレンチを平坦化する方法
JP2874486B2 (ja) ポリッシュ工程を備えたトレンチアイソレーションの形成方法及び半導体装置の製造方法
KR0179289B1 (ko) 금속배선 형성방법
US4867838A (en) Planarization through silylation
JPH0779129B2 (ja) 誘電体充填分離トレンチ形成方法
AU594518B2 (en) Planarization through silylation
JPS63272038A (ja) ＳｉＯ↓２絶縁層に傾斜側面を持つ接触孔の形成方法
CN1103492C (zh) 形成平坦内金属介电层的方法
JPH03295239A (ja) 半導体装置の製造方法
US6080653A (en) Method for making an electrical contact to a node location and process for forming a conductive line or other circuit component
US6235071B1 (en) Chemical mechanical polishing method for highly accurate in-plane uniformity in polishing rate over position
US6274480B1 (en) Method of Fabricating semiconductor device
JP3355835B2 (ja) 絶縁膜の形成方法
KR0151382B1 (ko) 반도체 소자의 배선 형성공정
US20040142553A1 (en) Methods of manufacturing semiconductor devices
JPH0194623A (ja) 多層配線半導体装置の製造方法
KR100214848B1 (ko) 반도체 소자의 금속배선 형성방법
KR100197662B1 (ko) 반도체 소자의 절연막 평탄화방법
JP2795029B2 (ja) 多層配線の形成方法
JPH08236502A (ja) 層間絶縁膜の平坦化方法及び半導体装置の製造方法
JPS61260638A (ja) 半導体装置の製造方法