AU2003295406A1 - Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers - Google Patents

Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers

Info

Publication number
AU2003295406A1
AU2003295406A1 AU2003295406A AU2003295406A AU2003295406A1 AU 2003295406 A1 AU2003295406 A1 AU 2003295406A1 AU 2003295406 A AU2003295406 A AU 2003295406A AU 2003295406 A AU2003295406 A AU 2003295406A AU 2003295406 A1 AU2003295406 A1 AU 2003295406A1
Authority
AU
Australia
Prior art keywords
drain
field effect
effect transistor
transistor including
sidewall spacers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003295406A
Other languages
English (en)
Inventor
Thomas Feudel
Manfred Horstmann
Stephan Kruegel
Karsten Wieczorek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE10255849A external-priority patent/DE10255849B4/de
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of AU2003295406A1 publication Critical patent/AU2003295406A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
AU2003295406A 2002-11-29 2003-11-06 Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers Abandoned AU2003295406A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE10255849.3 2002-11-29
DE10255849A DE10255849B4 (de) 2002-11-29 2002-11-29 Verbesserte Drain/Source-Erweiterungsstruktur eines Feldeffekttransistors mit dotierten Seitenwandabstandselementen mit hoher Permittivität und Verfahren zu deren Herstellung
US10/442,745 2003-05-21
US10/442,745 US6849516B2 (en) 2002-11-29 2003-05-21 Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer
PCT/US2003/035355 WO2004051728A1 (en) 2002-11-29 2003-11-06 Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers

Publications (1)

Publication Number Publication Date
AU2003295406A1 true AU2003295406A1 (en) 2004-06-23

Family

ID=32471483

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003295406A Abandoned AU2003295406A1 (en) 2002-11-29 2003-11-06 Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers

Country Status (6)

Country Link
US (1) US20050098818A1 (enExample)
EP (1) EP1565934A1 (enExample)
JP (1) JP2006508548A (enExample)
KR (1) KR101022854B1 (enExample)
AU (1) AU2003295406A1 (enExample)
WO (1) WO2004051728A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10324657B4 (de) * 2003-05-30 2009-01-22 Advanced Micro Devices, Inc. (n.d.Ges.d. Staates Delaware), Sunnyvale Verfahren zur Herstellung eines Metallsilizids
US8022465B2 (en) * 2005-11-15 2011-09-20 Macronrix International Co., Ltd. Low hydrogen concentration charge-trapping layer structures for non-volatile memory
EP1890322A3 (en) * 2006-08-15 2012-02-15 Kovio, Inc. Printed dopant layers
US8106455B2 (en) * 2009-04-30 2012-01-31 International Business Machines Corporation Threshold voltage adjustment through gate dielectric stack modification
KR101205037B1 (ko) 2011-02-28 2012-11-26 에스케이하이닉스 주식회사 반도체 소자 및 그 형성방법
JP6005401B2 (ja) 2011-06-10 2016-10-12 株式会社半導体エネルギー研究所 半導体装置の作製方法
US8673731B2 (en) * 2012-08-20 2014-03-18 International Business Machines Corporation Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devices
GB2521457A (en) * 2013-12-20 2015-06-24 Isis Innovation Charge stabilized dielectric film for electronic devices
JP2017216258A (ja) * 2014-10-16 2017-12-07 国立研究開発法人科学技術振興機構 電界効果トランジスタ
KR102300071B1 (ko) * 2020-02-12 2021-09-07 포항공과대학교 산학협력단 고 유전율 필드 플레이트를 구비한 드레인 확장형 핀펫 및 이의 제조방법

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61191025A (ja) * 1985-02-20 1986-08-25 Fujitsu Ltd 半導体装置の製造方法
US4994869A (en) * 1989-06-30 1991-02-19 Texas Instruments Incorporated NMOS transistor having inversion layer source/drain contacts
JPH04320036A (ja) * 1991-04-18 1992-11-10 Hitachi Ltd 半導体装置およびその製造方法
DE69224730T2 (de) * 1991-12-31 1998-07-30 Sgs Thomson Microelectronics Seitenwand-Abstandsstruktur für Feldeffekttransistor
US5814869A (en) * 1992-01-28 1998-09-29 Thunderbird Technologies, Inc. Short channel fermi-threshold field effect transistors
JPH05343418A (ja) * 1992-06-09 1993-12-24 Oki Electric Ind Co Ltd 半導体装置の製造方法
JP2515951B2 (ja) * 1992-07-23 1996-07-10 株式会社日立製作所 Ｍｉｓ型電界効果トランジスタ
JPH07130998A (ja) * 1993-11-01 1995-05-19 Nec Corp 半導体装置の製造方法
KR970006262B1 (ko) * 1994-02-04 1997-04-25 금성일렉트론 주식회사 도우핑된 디스포저블층(disposable layer)을 이용한 모스트랜지스터의 제조방법
US5518945A (en) * 1995-05-05 1996-05-21 International Business Machines Corporation Method of making a diffused lightly doped drain device with built in etch stop
US5770490A (en) * 1996-08-29 1998-06-23 International Business Machines Corporation Method for producing dual work function CMOS device
US5926715A (en) * 1997-06-04 1999-07-20 Mosel Vitelic Inc. Method of forming lightly-doped drain by automatic PSG doping
US6333556B1 (en) * 1997-10-09 2001-12-25 Micron Technology, Inc. Insulating materials
US6271563B1 (en) * 1998-07-27 2001-08-07 Advanced Micro Devices, Inc. MOS transistor with high-K spacer designed for ultra-large-scale integration
US6200869B1 (en) * 1998-11-06 2001-03-13 Advanced Micro Devices, Inc. Method of fabricating an integrated circuit with ultra-shallow source/drain extensions
US6630712B2 (en) * 1999-08-11 2003-10-07 Advanced Micro Devices, Inc. Transistor with dynamic source/drain extensions
US6093590A (en) * 1999-09-14 2000-07-25 Worldwide Semiconductor Manufacturing Corp. Method of fabricating transistor having a metal gate and a gate dielectric layer with a high dielectric constant
US6255152B1 (en) * 1999-10-01 2001-07-03 United Microelectronics Corp. Method of fabricating CMOS using Si-B layer to form source/drain extension junction
US6417046B1 (en) * 2000-05-05 2002-07-09 Taiwan Semiconductor Manufacturing Company Modified nitride spacer for solving charge retention issue in floating gate memory cell
KR100439345B1 (ko) * 2000-10-31 2004-07-07 피티플러스(주) 폴리실리콘 활성층을 포함하는 박막트랜지스터 및 제조 방법
KR100397370B1 (ko) * 2001-10-29 2003-09-13 한국전자통신연구원 얕은 접합을 갖는 집적회로의 제조 방법

Also Published As

Publication number Publication date
KR20050084030A (ko) 2005-08-26
JP2006508548A (ja) 2006-03-09
KR101022854B1 (ko) 2011-03-17
EP1565934A1 (en) 2005-08-24
WO2004051728A1 (en) 2004-06-17
US20050098818A1 (en) 2005-05-12

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase