AU2002358269A1 - Semiconductor device comprising a thin oxide liner and method of manufacturing the same - Google Patents

Semiconductor device comprising a thin oxide liner and method of manufacturing the same

Info

Publication number
AU2002358269A1
AU2002358269A1 AU2002358269A AU2002358269A AU2002358269A1 AU 2002358269 A1 AU2002358269 A1 AU 2002358269A1 AU 2002358269 A AU2002358269 A AU 2002358269A AU 2002358269 A AU2002358269 A AU 2002358269A AU 2002358269 A1 AU2002358269 A1 AU 2002358269A1
Authority
AU
Australia
Prior art keywords
manufacturing
semiconductor device
same
thin oxide
oxide liner
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002358269A
Other languages
English (en)
Inventor
James F. Buller
Jon D. Cheek
Daniel Kadosh
Scott Luning
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of AU2002358269A1 publication Critical patent/AU2002358269A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652Through-implantation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
AU2002358269A 2001-12-19 2002-12-19 Semiconductor device comprising a thin oxide liner and method of manufacturing the same Abandoned AU2002358269A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US2103701A 2001-12-19 2001-12-19
US10/021,037 2001-12-19
PCT/US2002/041103 WO2003054951A1 (en) 2001-12-19 2002-12-19 Semiconductor device comprising a thin oxide liner and method of manufacturing the same

Publications (1)

Publication Number Publication Date
AU2002358269A1 true AU2002358269A1 (en) 2003-07-09

Family

ID=21801954

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002358269A Abandoned AU2002358269A1 (en) 2001-12-19 2002-12-19 Semiconductor device comprising a thin oxide liner and method of manufacturing the same

Country Status (7)

Country Link
JP (1) JP2005517285A (enExample)
KR (1) KR20040068269A (enExample)
CN (1) CN1322565C (enExample)
AU (1) AU2002358269A1 (enExample)
DE (1) DE10297582T5 (enExample)
GB (1) GB2399222B (enExample)
WO (1) WO2003054951A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6583016B1 (en) * 2002-03-26 2003-06-24 Advanced Micro Devices, Inc. Doped spacer liner for improved transistor performance
JP2008124441A (ja) * 2006-10-19 2008-05-29 Tokyo Electron Ltd 半導体装置の製造方法
DE102011005641B4 (de) * 2011-03-16 2018-01-04 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Verfahren zur Leistungssteigerung in Transistoren durch Reduzierung der Absenkung aktiver Gebiete und durch Entfernen von Abstandshaltern

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868617A (en) * 1988-04-25 1989-09-19 Elite Semiconductor & Sytems International, Inc. Gate controllable lightly doped drain mosfet devices
US5714413A (en) * 1995-12-11 1998-02-03 Intel Corporation Method of making a transistor having a deposited dual-layer spacer structure
US6472281B2 (en) * 1998-02-03 2002-10-29 Matsushita Electronics Corporation Method for fabricating semiconductor device using a CVD insulator film
US6162692A (en) * 1998-06-26 2000-12-19 Advanced Micro Devices, Inc. Integration of a diffusion barrier layer and a counter dopant region to maintain the dopant level within the junctions of a transistor
US6251764B1 (en) * 1999-11-15 2001-06-26 Chartered Semiconductor Manufacturing Ltd. Method to form an L-shaped silicon nitride sidewall spacer
US6294480B1 (en) * 1999-11-19 2001-09-25 Chartered Semiconductor Manufacturing Ltd. Method for forming an L-shaped spacer with a disposable organic top coating
US6156598A (en) * 1999-12-13 2000-12-05 Chartered Semiconductor Manufacturing Ltd. Method for forming a lightly doped source and drain structure using an L-shaped spacer
US6277700B1 (en) * 2000-01-11 2001-08-21 Chartered Semiconductor Manufacturing Ltd. High selective nitride spacer etch with high ratio of spacer width to deposited nitride thickness

Also Published As

Publication number Publication date
GB2399222A (en) 2004-09-08
CN1322565C (zh) 2007-06-20
DE10297582T5 (de) 2004-11-11
KR20040068269A (ko) 2004-07-30
JP2005517285A (ja) 2005-06-09
GB0412884D0 (en) 2004-07-14
CN1606801A (zh) 2005-04-13
GB2399222B (en) 2005-07-20
WO2003054951A1 (en) 2003-07-03

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase