AU2000225767A1 - Semiconductor integrated circuit and its manufacturing method - Google Patents
Semiconductor integrated circuit and its manufacturing methodInfo
- Publication number
- AU2000225767A1 AU2000225767A1 AU2000225767A AU2576700A AU2000225767A1 AU 2000225767 A1 AU2000225767 A1 AU 2000225767A1 AU 2000225767 A AU2000225767 A AU 2000225767A AU 2576700 A AU2576700 A AU 2576700A AU 2000225767 A1 AU2000225767 A1 AU 2000225767A1
- Authority
- AU
- Australia
- Prior art keywords
- manufacturing
- integrated circuit
- semiconductor integrated
- semiconductor
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2000/001001 WO2001063673A1 (en) | 2000-02-22 | 2000-02-22 | Semiconductor integrated circuit and its manufacturing method |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2000225767A1 true AU2000225767A1 (en) | 2001-09-03 |
Family
ID=11735705
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2000225767A Abandoned AU2000225767A1 (en) | 2000-02-22 | 2000-02-22 | Semiconductor integrated circuit and its manufacturing method |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPWO2001063673A1 (ja) |
AU (1) | AU2000225767A1 (ja) |
WO (1) | WO2001063673A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006028066A1 (ja) * | 2004-09-08 | 2006-03-16 | Matsushita Electric Industrial Co., Ltd. | パターン生成方法 |
US7667332B2 (en) | 2004-11-05 | 2010-02-23 | Kabushiki Kaisha Toshiba | Method for generating pattern, method for manufacturing semiconductor device, semiconductor device, and computer program product |
JP2008258425A (ja) * | 2007-04-05 | 2008-10-23 | Matsushita Electric Ind Co Ltd | 標準セルおよびこれを有する半導体装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2829072B2 (ja) * | 1989-12-18 | 1998-11-25 | 富士通株式会社 | Lsi配線変更方法 |
JPH04329672A (ja) * | 1991-04-30 | 1992-11-18 | Nec Corp | ゲートアレイ半導体装置の製造方法 |
JPH07249065A (ja) * | 1994-03-10 | 1995-09-26 | Fujitsu Ltd | 配線経路探索方法 |
JP3352851B2 (ja) * | 1995-07-31 | 2002-12-03 | 株式会社東芝 | 半導体集積回路装置の配線方法 |
JPH0964186A (ja) * | 1995-08-28 | 1997-03-07 | Fujitsu Ltd | 配線設計方法及び半導体装置 |
-
2000
- 2000-02-22 JP JP2001562760A patent/JPWO2001063673A1/ja active Pending
- 2000-02-22 WO PCT/JP2000/001001 patent/WO2001063673A1/ja active Application Filing
- 2000-02-22 AU AU2000225767A patent/AU2000225767A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2001063673A1 (en) | 2001-08-30 |
JPWO2001063673A1 (ja) | 2004-01-08 |
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