ATE78114T1 - Adapterbusschalter zur verbesserung der verfuegbarkeit einer steuereinheit. - Google Patents

Adapterbusschalter zur verbesserung der verfuegbarkeit einer steuereinheit.

Info

Publication number
ATE78114T1
ATE78114T1 AT87430011T AT87430011T ATE78114T1 AT E78114 T1 ATE78114 T1 AT E78114T1 AT 87430011 T AT87430011 T AT 87430011T AT 87430011 T AT87430011 T AT 87430011T AT E78114 T1 ATE78114 T1 AT E78114T1
Authority
AT
Austria
Prior art keywords
adapters
control unit
switch
bus switch
bus
Prior art date
Application number
AT87430011T
Other languages
English (en)
Inventor
Pierre Austruy
Jean-Marie Munier
Michel Poret
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE78114T1 publication Critical patent/ATE78114T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2005—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication controllers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2017—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where memory access, memory control or I/O control functionality is redundant

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Structure Of Telephone Exchanges (AREA)
  • Small-Scale Networks (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Bus Control (AREA)
  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)
AT87430011T 1987-04-22 1987-04-22 Adapterbusschalter zur verbesserung der verfuegbarkeit einer steuereinheit. ATE78114T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP87430011A EP0288648B1 (de) 1987-04-22 1987-04-22 Adapterbusschalter zur Verbesserung der Verfügbarkeit einer Steuereinheit

Publications (1)

Publication Number Publication Date
ATE78114T1 true ATE78114T1 (de) 1992-07-15

Family

ID=8198301

Family Applications (1)

Application Number Title Priority Date Filing Date
AT87430011T ATE78114T1 (de) 1987-04-22 1987-04-22 Adapterbusschalter zur verbesserung der verfuegbarkeit einer steuereinheit.

Country Status (9)

Country Link
US (1) US5140691A (de)
EP (1) EP0288648B1 (de)
JP (1) JPS63268038A (de)
AT (1) ATE78114T1 (de)
AU (1) AU604873B2 (de)
CA (1) CA1305555C (de)
DE (1) DE3780306T2 (de)
ES (1) ES2032851T3 (de)
MX (1) MX169593B (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69032758T2 (de) * 1989-12-19 1999-06-24 3Com Corp., Santa Clara, Calif. Konfigurationsverfahren für eine Rechnerbus-Adapterkarte ohne Brücken oder Schalter
JP2753123B2 (ja) * 1990-08-28 1998-05-18 富士通株式会社 制御モード選択式通信コントローラ
CA2092631C (en) * 1992-06-19 1997-04-08 Don Steven Keener Physical partitioning of logically continuous bus
US5351019A (en) * 1992-12-15 1994-09-27 Alcatel Network Systems, Inc. Local area network interface and interfacing method for network element
US5784576A (en) * 1996-10-31 1998-07-21 International Business Machines Corp. Method and apparatus for adding and removing components of a data processing system without powering down
US5805836A (en) * 1996-12-10 1998-09-08 International Business Machines Corporation Method and apparatus for equalizing grants of a data bus to primary and secondary devices
FR2762695B1 (fr) 1997-04-29 1999-05-28 Bull Sa Procede et dispositif de connexion de l'unite centrale d'un systeme de traitement de donnees a un sous-systeme de stockage de donnees a redondance
JP3289775B2 (ja) * 1998-02-27 2002-06-10 日本電気株式会社 Ｌｓｉ、該ｌｓｉを備えた電子機器の制御回路および該制御回路の制御方法
US6112271A (en) * 1998-05-14 2000-08-29 Motorola, Inc. Multiconfiguration backplane
US6386985B1 (en) * 1999-07-26 2002-05-14 Guy Jonathan James Rackham Virtual Staging apparatus and method
US6954819B2 (en) * 2002-01-09 2005-10-11 Storcase Technology, Inc. Peripheral bus switch to maintain continuous peripheral bus interconnect system operation
US7134040B2 (en) * 2002-04-17 2006-11-07 International Business Machines Corporation Method, system, and program for selecting a path to a device to use when sending data requests to the device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5549427B2 (de) * 1973-06-30 1980-12-11
US3882455A (en) * 1973-09-14 1975-05-06 Gte Automatic Electric Lab Inc Configuration control circuit for control and maintenance complex of digital communications system
JPS6019540B2 (ja) * 1978-02-24 1985-05-16 株式会社日立製作所 構成切替制御方式
JPS58119057A (ja) * 1981-12-31 1983-07-15 Fujitsu Ltd システム保守方式
US4455601A (en) * 1981-12-31 1984-06-19 International Business Machines Corporation Cross checking among service processors in a multiprocessor system
JPS59161743A (ja) * 1983-03-04 1984-09-12 Hitachi Ltd 構成切替方式
US4610013A (en) * 1983-11-08 1986-09-02 Avco Corporation Remote multiplexer terminal with redundant central processor units
US4607365A (en) * 1983-11-14 1986-08-19 Tandem Computers Incorporated Fault-tolerant communications controller system
JPS60245050A (ja) * 1984-05-18 1985-12-04 Nec Corp 二重化マイクロコンピユ−タシステム切替方式
US4700381A (en) * 1984-05-30 1987-10-13 Siemens Aktiengesellschaft Circuit arrangement for centrally-controlled telecommunications exchange systems, comprising central control units and an alternate circuit arrangement
US4823256A (en) * 1984-06-22 1989-04-18 American Telephone And Telegraph Company, At&T Bell Laboratories Reconfigurable dual processor system
US4633467A (en) * 1984-07-26 1986-12-30 At&T Bell Laboratories Computer system fault recovery based on historical analysis
US4684885A (en) * 1985-11-04 1987-08-04 Get Communication Systems Corporation Arrangement for on-line diagnostic testing of an off-line standby processor in a duplicated processor configuration

Also Published As

Publication number Publication date
ES2032851T3 (es) 1993-03-01
US5140691A (en) 1992-08-18
EP0288648A1 (de) 1988-11-02
MX169593B (es) 1993-07-14
AU604873B2 (en) 1991-01-03
DE3780306T2 (de) 1993-02-11
AU1462388A (en) 1988-10-20
DE3780306D1 (de) 1992-08-13
JPS63268038A (ja) 1988-11-04
EP0288648B1 (de) 1992-07-08
CA1305555C (en) 1992-07-21

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee