JPS5493340A - Duplex processing system - Google Patents

Duplex processing system

Info

Publication number
JPS5493340A
JPS5493340A JP15843377A JP15843377A JPS5493340A JP S5493340 A JPS5493340 A JP S5493340A JP 15843377 A JP15843377 A JP 15843377A JP 15843377 A JP15843377 A JP 15843377A JP S5493340 A JPS5493340 A JP S5493340A
Authority
JP
Japan
Prior art keywords
processor
information
circuits
processors
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15843377A
Other languages
Japanese (ja)
Inventor
Kazumi Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15843377A priority Critical patent/JPS5493340A/en
Publication of JPS5493340A publication Critical patent/JPS5493340A/en
Pending legal-status Critical Current

Links

Landscapes

  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE: To sufficiently perform the function of duplex with a simple constitution, by providing the information processor which is one set with two processors, connecting one input and output to one processor, monitoring the state information of the processor, delivering control information, and selecting the processing under non-operation.
CONSTITUTION: The information processors 1,2 taking one pair with two sets are provided, and the data bus of the processors 1,2 is coupled with the common data bus 7 via the data delivery circuits 3,4, and the information is delivered to the input and output unit 10. Thus, duplex system is constituted. The state information of the transfer circuits 3 and 4 can be monitored with the state monitor circuits 11,13 placed on the data bus selection and control circuits 8,9 corresponded. Further, normally, one processor 1 or 2 is used, delivering information to the input and output unit 10, and if any failure for the processor 1 or 2 used is found out, the selective processing operation is executed by selecting the failed processor to the processor under non-operation with the selection control data delivery 12,14 provided with the control circuits 8 and 9.
COPYRIGHT: (C)1979,JPO&Japio
JP15843377A 1977-12-30 1977-12-30 Duplex processing system Pending JPS5493340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15843377A JPS5493340A (en) 1977-12-30 1977-12-30 Duplex processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15843377A JPS5493340A (en) 1977-12-30 1977-12-30 Duplex processing system

Publications (1)

Publication Number Publication Date
JPS5493340A true JPS5493340A (en) 1979-07-24

Family

ID=15671646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15843377A Pending JPS5493340A (en) 1977-12-30 1977-12-30 Duplex processing system

Country Status (1)

Country Link
JP (1) JPS5493340A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58134359A (en) * 1982-02-05 1983-08-10 Hitachi Ltd Bus switching device
JPS58161002A (en) * 1982-03-19 1983-09-24 Hitachi Ltd Multiplexing controller
JPS61134846A (en) * 1984-12-04 1986-06-21 Omron Tateisi Electronics Co Electronic computer system
JPS61160551U (en) * 1985-03-25 1986-10-04

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5058954A (en) * 1973-09-26 1975-05-22
JPS5111537A (en) * 1974-07-19 1976-01-29 Fuji Electric Co Ltd
JPS5284935A (en) * 1976-01-07 1977-07-14 Hitachi Ltd Data processing system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5058954A (en) * 1973-09-26 1975-05-22
JPS5111537A (en) * 1974-07-19 1976-01-29 Fuji Electric Co Ltd
JPS5284935A (en) * 1976-01-07 1977-07-14 Hitachi Ltd Data processing system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58134359A (en) * 1982-02-05 1983-08-10 Hitachi Ltd Bus switching device
JPS6330660B2 (en) * 1982-02-05 1988-06-20 Hitachi Ltd
JPS58161002A (en) * 1982-03-19 1983-09-24 Hitachi Ltd Multiplexing controller
JPS61134846A (en) * 1984-12-04 1986-06-21 Omron Tateisi Electronics Co Electronic computer system
JPS61160551U (en) * 1985-03-25 1986-10-04

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