ATE555505T1 - Verfahren zur herstellung eines halbleitersubstrats - Google Patents

Verfahren zur herstellung eines halbleitersubstrats

Info

Publication number
ATE555505T1
ATE555505T1 AT09715749T AT09715749T ATE555505T1 AT E555505 T1 ATE555505 T1 AT E555505T1 AT 09715749 T AT09715749 T AT 09715749T AT 09715749 T AT09715749 T AT 09715749T AT E555505 T1 ATE555505 T1 AT E555505T1
Authority
AT
Austria
Prior art keywords
semiconductor layer
modified
semiconductor substrate
producing
providing
Prior art date
Application number
AT09715749T
Other languages
English (en)
Inventor
Alexis Drouin
Berhard Aspar
Christophe Desrumeaux
Olivier Ledoux
Christophe Figuet
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from EP08290176A external-priority patent/EP2096683B1/de
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Application granted granted Critical
Publication of ATE555505T1 publication Critical patent/ATE555505T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14603Special geometry or disposition of pixel-elements, address-lines or gate-electrodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Recrystallisation Techniques (AREA)
AT09715749T 2008-02-26 2009-02-26 Verfahren zur herstellung eines halbleitersubstrats ATE555505T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP08290176A EP2096683B1 (de) 2008-02-26 2008-02-26 Verfahren zur Herstellung eines Halbleitersubstrats
EP09290097 2009-02-11
PCT/EP2009/001382 WO2009106330A1 (en) 2008-02-26 2009-02-26 Method for fabricating a semiconductor substrate

Publications (1)

Publication Number Publication Date
ATE555505T1 true ATE555505T1 (de) 2012-05-15

Family

ID=40707751

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09715749T ATE555505T1 (de) 2008-02-26 2009-02-26 Verfahren zur herstellung eines halbleitersubstrats

Country Status (7)

Country Link
US (1) US8575010B2 (de)
EP (1) EP2255395B1 (de)
JP (1) JP4810649B2 (de)
KR (1) KR101595307B1 (de)
CN (2) CN101904017A (de)
AT (1) ATE555505T1 (de)
WO (1) WO2009106330A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2957190B1 (fr) * 2010-03-02 2012-04-27 Soitec Silicon On Insulator Procede de realisation d'une structure multicouche avec detourage par effets thermomecaniques.
US8455292B2 (en) * 2011-09-09 2013-06-04 International Business Machines Corporation Deposition of germanium film
US9481566B2 (en) 2012-07-31 2016-11-01 Soitec Methods of forming semiconductor structures including MEMS devices and integrated circuits on opposing sides of substrates, and related structures and devices
FR2995447B1 (fr) 2012-09-07 2014-09-05 Soitec Silicon On Insulator Procede de separation d'au moins deux substrats selon une interface choisie
KR20220141707A (ko) 2021-04-13 2022-10-20 김지현 물류창고용 렉 가이드 장치

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5137837A (en) * 1990-08-20 1992-08-11 Hughes Aircraft Company Radiation-hard, high-voltage semiconductive device structure fabricated on SOI substrate
US5336879A (en) 1993-05-28 1994-08-09 David Sarnoff Research Center, Inc. Pixel array having image forming pixel elements integral with peripheral circuit elements
US6326280B1 (en) 1995-02-02 2001-12-04 Sony Corporation Thin film semiconductor and method for making thin film semiconductor
FR2845523B1 (fr) 2002-10-07 2005-10-28 Procede pour realiser un substrat par transfert d'une plaquette donneuse comportant des especes etrangeres, et plaquette donneuse associee
WO2004054001A2 (en) 2002-12-09 2004-06-24 Quantum Semiconductor Llc Cmos image sensor
FR2855910B1 (fr) * 2003-06-06 2005-07-15 Commissariat Energie Atomique Procede d'obtention d'une couche tres mince par amincissement par auto-portage provoque
US7180098B2 (en) 2004-04-05 2007-02-20 Legerity, Inc. Optical isolator device, and method of making same
JP2006134915A (ja) * 2004-11-02 2006-05-25 Sony Corp 半導体基板、固体撮像装置および固体撮像装置の製造方法
US7238583B2 (en) 2005-02-11 2007-07-03 Sarnoff Corporation Back-illuminated imaging device and method of fabricating same
US7723215B2 (en) * 2005-02-11 2010-05-25 Sarnoff Corporation Dark current reduction in back-illuminated imaging sensors and method of fabricating same
JP4618064B2 (ja) * 2005-09-12 2011-01-26 ソニー株式会社 半導体装置およびその製造方法
US7777229B2 (en) 2006-09-11 2010-08-17 Sarnoff Corporation Method and apparatus for reducing smear in back-illuminated imaging sensors
US7541256B2 (en) 2007-03-28 2009-06-02 Sarnoff Corporation Method of fabricating back-illuminated imaging sensors using a bump bonding technique
US7985612B2 (en) 2008-02-19 2011-07-26 Sri International Method and device for reducing crosstalk in back illuminated imagers
EP2281307A4 (de) 2008-05-28 2011-06-29 Sarnoff Corp Rückbeleuchtete abbildungsvorrichtung mit ultradünnem silicium auf isolatorsubstraten
US7982277B2 (en) 2008-05-30 2011-07-19 Sri International High-efficiency thinned imager with reduced boron updiffusion
EP2281306A4 (de) 2008-05-30 2013-05-22 Sarnoff Corp Verfahren zur elektronischen befestigung einer rückfläche eines auf einem utsoi-wafer hergestellten rückbeleuchteten abbilders

Also Published As

Publication number Publication date
US8575010B2 (en) 2013-11-05
CN101904017A (zh) 2010-12-01
KR20100134551A (ko) 2010-12-23
US20110024868A1 (en) 2011-02-03
EP2255395A1 (de) 2010-12-01
JP4810649B2 (ja) 2011-11-09
EP2255395B1 (de) 2012-04-25
CN102623470A (zh) 2012-08-01
KR101595307B1 (ko) 2016-02-26
JP2011513947A (ja) 2011-04-28
WO2009106330A1 (en) 2009-09-03
CN102623470B (zh) 2015-11-18

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