ATE532133T1 - Komprimieren von testantworten unter verwendung eines kompaktors - Google Patents

Komprimieren von testantworten unter verwendung eines kompaktors

Info

Publication number
ATE532133T1
ATE532133T1 AT08159782T AT08159782T ATE532133T1 AT E532133 T1 ATE532133 T1 AT E532133T1 AT 08159782 T AT08159782 T AT 08159782T AT 08159782 T AT08159782 T AT 08159782T AT E532133 T1 ATE532133 T1 AT E532133T1
Authority
AT
Austria
Prior art keywords
compactor
test
values
circuit
test responses
Prior art date
Application number
AT08159782T
Other languages
English (en)
Inventor
Janusz Rajski
Jerzy Tyszer
Chen Wang
Grzegorz Mrugalski
Artur Pogiel
Original Assignee
Mentor Graphics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mentor Graphics Corp filed Critical Mentor Graphics Corp
Application granted granted Critical
Publication of ATE532133T1 publication Critical patent/ATE532133T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318566—Comparators; Diagnosing the device under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318583—Design for test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31919—Storing and outputting test patterns
    • G01R31/31921—Storing and outputting test patterns using compression techniques, e.g. patterns sequencer
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/40—Response verification devices using compression techniques
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31703—Comparison aspects, e.g. signature analysis, comparators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/30—Accessing single arrays
    • G11C2029/3202—Scan chain

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Investigating Strength Of Materials By Application Of Mechanical Stress (AREA)
  • Steroid Compounds (AREA)
  • Curing Cements, Concrete, And Artificial Stone (AREA)
AT08159782T 2003-02-13 2004-02-13 Komprimieren von testantworten unter verwendung eines kompaktors ATE532133T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44763703P 2003-02-13 2003-02-13
US50649903P 2003-09-26 2003-09-26

Publications (1)

Publication Number Publication Date
ATE532133T1 true ATE532133T1 (de) 2011-11-15

Family

ID=32872039

Family Applications (2)

Application Number Title Priority Date Filing Date
AT08159782T ATE532133T1 (de) 2003-02-13 2004-02-13 Komprimieren von testantworten unter verwendung eines kompaktors
AT04700016T ATE400845T1 (de) 2003-02-13 2004-02-13 Komprimieren von testantworten unter verwendung eines kompaktors

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT04700016T ATE400845T1 (de) 2003-02-13 2004-02-13 Komprimieren von testantworten unter verwendung eines kompaktors

Country Status (6)

Country Link
US (3) US7370254B2 (de)
EP (2) EP1595211B1 (de)
JP (1) JP4791954B2 (de)
AT (2) ATE532133T1 (de)
DE (1) DE602004014904D1 (de)
WO (1) WO2004072660A2 (de)

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ATE400845T1 (de) 2008-07-15
EP1978446A1 (de) 2008-10-08
JP2006518855A (ja) 2006-08-17
EP1595211A2 (de) 2005-11-16
US7370254B2 (en) 2008-05-06
US20040230884A1 (en) 2004-11-18
JP4791954B2 (ja) 2011-10-12
US7743302B2 (en) 2010-06-22
US20100257417A1 (en) 2010-10-07
WO2004072660A3 (en) 2005-04-28
US7890827B2 (en) 2011-02-15
DE602004014904D1 (de) 2008-08-21
EP1595211B1 (de) 2008-07-09
US20080133987A1 (en) 2008-06-05
WO2004072660A2 (en) 2004-08-26
EP1595211A4 (de) 2005-11-30
EP1978446B1 (de) 2011-11-02

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