ATE528763T1 - System und verfahren zur verringerung des dynamischen ram-energieverbrauchs durch verwenden von gültigen datenmarkern - Google Patents

System und verfahren zur verringerung des dynamischen ram-energieverbrauchs durch verwenden von gültigen datenmarkern

Info

Publication number
ATE528763T1
ATE528763T1 AT08005492T AT08005492T ATE528763T1 AT E528763 T1 ATE528763 T1 AT E528763T1 AT 08005492 T AT08005492 T AT 08005492T AT 08005492 T AT08005492 T AT 08005492T AT E528763 T1 ATE528763 T1 AT E528763T1
Authority
AT
Austria
Prior art keywords
valid data
energy consumption
dynamic ram
data markers
reducing dynamic
Prior art date
Application number
AT08005492T
Other languages
German (de)
English (en)
Inventor
Gerald Paul Michalak
Barry Joe Wolford
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Application granted granted Critical
Publication of ATE528763T1 publication Critical patent/ATE528763T1/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40622Partial refresh of memory arrays
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072Circuits for initialization, powering up or down, clearing memory or presetting
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4093Input/output [I/O] data interface arrangements, e.g. data buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406Refreshing of dynamic cells
    • G11C2211/4065Low level details of refresh operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Power Sources (AREA)
  • Memory System (AREA)
AT08005492T 2007-07-26 2008-03-25 System und verfahren zur verringerung des dynamischen ram-energieverbrauchs durch verwenden von gültigen datenmarkern ATE528763T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/828,569 US7590021B2 (en) 2007-07-26 2007-07-26 System and method to reduce dynamic RAM power consumption via the use of valid data indicators

Publications (1)

Publication Number Publication Date
ATE528763T1 true ATE528763T1 (de) 2011-10-15

Family

ID=39862963

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08005492T ATE528763T1 (de) 2007-07-26 2008-03-25 System und verfahren zur verringerung des dynamischen ram-energieverbrauchs durch verwenden von gültigen datenmarkern

Country Status (12)

Country Link
US (1) US7590021B2 (https=)
EP (1) EP2020659B1 (https=)
JP (2) JP2010534897A (https=)
KR (1) KR101107798B1 (https=)
CN (1) CN101765887A (https=)
AT (1) ATE528763T1 (https=)
BR (1) BRPI0814590A8 (https=)
CA (1) CA2693811C (https=)
ES (1) ES2375230T3 (https=)
MX (1) MX2010000954A (https=)
RU (1) RU2435237C1 (https=)
WO (1) WO2009015324A1 (https=)

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EP2620838B1 (en) 2012-01-26 2015-04-22 ST-Ericsson SA Automatic partial array self-refresh
CN108231109B (zh) * 2014-06-09 2021-01-29 华为技术有限公司 动态随机存取存储器dram的刷新方法、设备以及系统
US20160155491A1 (en) * 2014-11-27 2016-06-02 Advanced Micro Devices, Inc. Memory persistence management control
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JP6710758B2 (ja) 2015-12-04 2020-06-17 アイシーユー・メディカル・インコーポレーテッド 医療用流体を移送するための電子式医療用流体移送装置
US9972375B2 (en) * 2016-04-15 2018-05-15 Via Alliance Semiconductor Co., Ltd. Sanitize-aware DRAM controller
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JP6765941B2 (ja) * 2016-11-22 2020-10-07 理想科学工業株式会社 半導体メモリ管理装置
US10437499B2 (en) * 2017-12-22 2019-10-08 Nanya Technology Corporation Hybrid memory system and method of operating the same
US10692559B2 (en) * 2018-10-31 2020-06-23 Micron Technology, Inc. Performing an on demand refresh operation of a memory sub-system
US10762946B2 (en) * 2018-12-31 2020-09-01 Micron Technology, Inc. Memory with partial array refresh
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Also Published As

Publication number Publication date
CA2693811A1 (en) 2009-01-29
EP2020659B1 (en) 2011-10-12
KR101107798B1 (ko) 2012-01-25
EP2020659A1 (en) 2009-02-04
CN101765887A (zh) 2010-06-30
ES2375230T3 (es) 2012-02-27
MX2010000954A (es) 2010-03-10
JP2010534897A (ja) 2010-11-11
BRPI0814590A8 (pt) 2019-01-02
WO2009015324A1 (en) 2009-01-29
CA2693811C (en) 2013-11-12
JP2014197446A (ja) 2014-10-16
RU2010107059A (ru) 2011-09-10
BRPI0814590A2 (pt) 2015-01-20
US20090027989A1 (en) 2009-01-29
US7590021B2 (en) 2009-09-15
KR20100047286A (ko) 2010-05-07
RU2435237C1 (ru) 2011-11-27

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