ATE468608T1 - Verpackung von integrierten schaltungen - Google Patents
Verpackung von integrierten schaltungenInfo
- Publication number
- ATE468608T1 ATE468608T1 AT06787376T AT06787376T ATE468608T1 AT E468608 T1 ATE468608 T1 AT E468608T1 AT 06787376 T AT06787376 T AT 06787376T AT 06787376 T AT06787376 T AT 06787376T AT E468608 T1 ATE468608 T1 AT E468608T1
- Authority
- AT
- Austria
- Prior art keywords
- pads
- circuit
- die
- integrated circuit
- ground
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/49531—Additional leads the additional leads being a wiring board
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/01028—Nickel [Ni]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1433—Application-specific integrated circuit [ASIC]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
- Time-Division Multiplex Systems (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US70014305P | 2005-07-18 | 2005-07-18 | |
US11/399,017 US7602050B2 (en) | 2005-07-18 | 2006-04-05 | Integrated circuit packaging |
PCT/US2006/027462 WO2007011767A1 (en) | 2005-07-18 | 2006-07-14 | Integrated circuit packaging |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE468608T1 true ATE468608T1 (de) | 2010-06-15 |
Family
ID=37459525
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT06787376T ATE468608T1 (de) | 2005-07-18 | 2006-07-14 | Verpackung von integrierten schaltungen |
Country Status (9)
Country | Link |
---|---|
US (1) | US7602050B2 (de) |
EP (1) | EP1911092B1 (de) |
JP (1) | JP4847525B2 (de) |
KR (1) | KR100943604B1 (de) |
CN (1) | CN101263598B (de) |
AT (1) | ATE468608T1 (de) |
DE (1) | DE602006014412D1 (de) |
TW (1) | TWI315571B (de) |
WO (1) | WO2007011767A1 (de) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SG149724A1 (en) * | 2007-07-24 | 2009-02-27 | Micron Technology Inc | Semicoductor dies with recesses, associated leadframes, and associated systems and methods |
SG149725A1 (en) * | 2007-07-24 | 2009-02-27 | Micron Technology Inc | Thin semiconductor die packages and associated systems and methods |
US7825527B2 (en) * | 2008-06-13 | 2010-11-02 | Altera Corporation | Return loss techniques in wirebond packages for high-speed data communications |
JP2010010634A (ja) * | 2008-06-30 | 2010-01-14 | Shinko Electric Ind Co Ltd | リードフレーム及び半導体装置の製造方法 |
US8106502B2 (en) * | 2008-11-17 | 2012-01-31 | Stats Chippac Ltd. | Integrated circuit packaging system with plated pad and method of manufacture thereof |
US20100126764A1 (en) * | 2008-11-24 | 2010-05-27 | Seagate Technology, Llc | die ground lead |
KR101113518B1 (ko) * | 2009-11-18 | 2012-02-29 | 삼성전기주식회사 | 리드 프레임 |
US20110115063A1 (en) * | 2009-11-18 | 2011-05-19 | Entropic Communications, Inc. | Integrated Circuit Packaging with Split Paddle |
TWI401776B (zh) * | 2009-12-31 | 2013-07-11 | Chipmos Technologies Inc | 四邊扁平無接腳封裝(qfn)結構 |
CN102201384A (zh) * | 2010-03-22 | 2011-09-28 | 无锡华润安盛科技有限公司 | 一种led驱动电路的小外形封装引线框 |
CN101814480B (zh) * | 2010-04-16 | 2011-08-31 | 杭州矽力杰半导体技术有限公司 | 一种芯片封装结构及其封装方法 |
TWI419290B (zh) * | 2010-10-29 | 2013-12-11 | Advanced Semiconductor Eng | 四方扁平無引腳封裝及其製作方法 |
US9635794B2 (en) | 2012-02-20 | 2017-04-25 | Trw Automotive U.S. Llc | Method and apparatus for attachment of integrated circuits |
JP5894209B2 (ja) * | 2014-04-03 | 2016-03-23 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US10128170B2 (en) | 2017-01-09 | 2018-11-13 | Silanna Asia Pte Ltd | Conductive clip connection arrangements for semiconductor packages |
US11264309B2 (en) * | 2019-06-24 | 2022-03-01 | Mediatek Inc. | Multi-row QFN semiconductor package |
US11515240B2 (en) * | 2019-08-01 | 2022-11-29 | Stmicroelectronics S.R.L. | Lead frame for a package for a semiconductor device, semiconductor device and process for manufacturing a semiconductor device |
CN111900144B (zh) * | 2020-08-12 | 2021-11-12 | 深圳安捷丽新技术有限公司 | 高速互连的接地参考形状 |
JP7097933B2 (ja) * | 2020-10-08 | 2022-07-08 | 三菱電機株式会社 | 半導体装置の製造方法 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3024664A1 (de) * | 1980-06-30 | 1982-02-04 | Claas Ohg, 4834 Harsewinkel | Landwirtschaftliches mehrzweckfahrzeug |
KR900008995B1 (ko) | 1986-12-19 | 1990-12-17 | 페어차일드 세미콘덕터 코포레이션 | 고주파 반도체 소자용 세라믹 패키지 |
JPH03132063A (ja) * | 1989-10-18 | 1991-06-05 | Dainippon Printing Co Ltd | リードフレーム |
GB2292929A (en) * | 1992-06-30 | 1996-03-13 | Caterpillar Inc | Material Handling Machine |
US5618146A (en) * | 1996-04-19 | 1997-04-08 | Cooper; Edmund E. | Hay roll transporter |
JP3947292B2 (ja) * | 1998-02-10 | 2007-07-18 | 大日本印刷株式会社 | 樹脂封止型半導体装置の製造方法 |
US6025640A (en) * | 1997-07-16 | 2000-02-15 | Dai Nippon Insatsu Kabushiki Kaisha | Resin-sealed semiconductor device, circuit member for use therein and method of manufacturing resin-sealed semiconductor device |
EP0895287A3 (de) * | 1997-07-31 | 2006-04-05 | Matsushita Electric Industrial Co., Ltd. | Halbleitervorrichtung und Leiterrahmen für dieselbe |
JP3031323B2 (ja) * | 1997-12-26 | 2000-04-10 | 日本電気株式会社 | 半導体装置とその製造方法 |
JP3062691B1 (ja) * | 1999-02-26 | 2000-07-12 | 株式会社三井ハイテック | 半導体装置 |
TW426926B (en) | 1999-10-05 | 2001-03-21 | Vanguard Int Semiconduct Corp | Integrated circuit package |
EP1126522A1 (de) | 2000-02-18 | 2001-08-22 | Alcatel | Verpackte Halbleiterschaltung mit Radiofrequenz-Antenne |
JP3955712B2 (ja) * | 2000-03-03 | 2007-08-08 | 株式会社ルネサステクノロジ | 半導体装置 |
KR100359304B1 (ko) * | 2000-08-25 | 2002-10-31 | 삼성전자 주식회사 | 주변 링 패드를 갖는 리드 프레임 및 이를 포함하는반도체 칩 패키지 |
JP2002076228A (ja) * | 2000-09-04 | 2002-03-15 | Dainippon Printing Co Ltd | 樹脂封止型半導体装置 |
US6433424B1 (en) * | 2000-12-14 | 2002-08-13 | International Rectifier Corporation | Semiconductor device package and lead frame with die overhanging lead frame pad |
DE10247075A1 (de) * | 2002-10-09 | 2004-04-22 | Micronas Gmbh | Trägereinrichtung für monolithisch integrierte Schaltungen |
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2006
- 2006-04-05 US US11/399,017 patent/US7602050B2/en active Active
- 2006-07-14 AT AT06787376T patent/ATE468608T1/de not_active IP Right Cessation
- 2006-07-14 DE DE602006014412T patent/DE602006014412D1/de active Active
- 2006-07-14 CN CN2006800336586A patent/CN101263598B/zh active Active
- 2006-07-14 JP JP2008522844A patent/JP4847525B2/ja not_active Expired - Fee Related
- 2006-07-14 KR KR1020087003874A patent/KR100943604B1/ko not_active IP Right Cessation
- 2006-07-14 EP EP06787376A patent/EP1911092B1/de not_active Not-in-force
- 2006-07-14 WO PCT/US2006/027462 patent/WO2007011767A1/en active Application Filing
- 2006-07-18 TW TW095126238A patent/TWI315571B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TW200746377A (en) | 2007-12-16 |
US20070096268A1 (en) | 2007-05-03 |
KR100943604B1 (ko) | 2010-02-24 |
CN101263598A (zh) | 2008-09-10 |
WO2007011767A1 (en) | 2007-01-25 |
TWI315571B (en) | 2009-10-01 |
EP1911092B1 (de) | 2010-05-19 |
JP4847525B2 (ja) | 2011-12-28 |
DE602006014412D1 (de) | 2010-07-01 |
KR20080026216A (ko) | 2008-03-24 |
CN101263598B (zh) | 2010-09-22 |
JP2009502045A (ja) | 2009-01-22 |
US7602050B2 (en) | 2009-10-13 |
EP1911092A1 (de) | 2008-04-16 |
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