ATE448517T1 - Mikrocomputer und verfahren zu seiner prüfung - Google Patents

Mikrocomputer und verfahren zu seiner prüfung

Info

Publication number
ATE448517T1
ATE448517T1 AT06757187T AT06757187T ATE448517T1 AT E448517 T1 ATE448517 T1 AT E448517T1 AT 06757187 T AT06757187 T AT 06757187T AT 06757187 T AT06757187 T AT 06757187T AT E448517 T1 ATE448517 T1 AT E448517T1
Authority
AT
Austria
Prior art keywords
flip
flop
data
clock
synchronous
Prior art date
Application number
AT06757187T
Other languages
English (en)
Inventor
Toshihiko Yokota
Ken Namura
Mitsuru Sugimoto
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE448517T1 publication Critical patent/ATE448517T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • G01R31/2812—Checking for open circuits or shorts, e.g. solder bridges; Testing conductivity, resistivity or impedance
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • G01R31/2815—Functional tests, e.g. boundary scans, using the normal I/O contacts
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318544—Scanning methods, algorithms and patterns
    • G01R31/31855—Interconnection testing, e.g. crosstalk, shortcircuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Microcomputers (AREA)
AT06757187T 2005-06-10 2006-06-08 Mikrocomputer und verfahren zu seiner prüfung ATE448517T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005171268 2005-06-10
JP2006011551 2006-06-08

Publications (1)

Publication Number Publication Date
ATE448517T1 true ATE448517T1 (de) 2009-11-15

Family

ID=37498525

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06757187T ATE448517T1 (de) 2005-06-10 2006-06-08 Mikrocomputer und verfahren zu seiner prüfung

Country Status (9)

Country Link
US (1) US7793183B2 (de)
EP (1) EP1890234B1 (de)
JP (1) JP4701244B2 (de)
CN (1) CN100504802C (de)
AT (1) ATE448517T1 (de)
BR (1) BRPI0611883B1 (de)
DE (1) DE602006010372D1 (de)
RU (1) RU2374679C2 (de)
WO (1) WO2006132329A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2374679C2 (ru) 2005-06-10 2009-11-27 Интернэшнл Бизнес Машинз Корпорейшн Микрокомпьютер и способ его тестирования
JP4893064B2 (ja) * 2006-03-30 2012-03-07 富士通セミコンダクター株式会社 半導体集積回路および半導体集積回路設計方法
JP2010266417A (ja) * 2009-05-18 2010-11-25 Sony Corp 半導体集積回路、情報処理装置、および情報処理方法、並びにプログラム
US9429983B1 (en) 2013-09-12 2016-08-30 Advanced Processor Architectures, Llc System clock distribution in a distributed computing environment
US11042211B2 (en) 2009-08-07 2021-06-22 Advanced Processor Architectures, Llc Serially connected computing nodes in a distributed computing system
US9645603B1 (en) 2013-09-12 2017-05-09 Advanced Processor Architectures, Llc System clock distribution in a distributed computing environment
US8675371B2 (en) * 2009-08-07 2014-03-18 Advanced Processor Architectures, Llc Distributed computing
US8775882B2 (en) * 2010-12-28 2014-07-08 Stmicroelectronics International N.V. Testing circuits
US9234942B2 (en) 2012-09-21 2016-01-12 Apple Inc. Transition fault testing of source synchronous interface
US9804224B2 (en) 2014-09-22 2017-10-31 Nxp Usa, Inc. Integrated circuit and method of operating an integrated circuit
CN108897647B (zh) * 2018-03-19 2021-11-05 硅谷数模半导体（北京）有限公司 测试系统、测试方法及装置
CN109188250B (zh) * 2018-10-08 2020-08-18 北方电子研究院安徽有限公司 一种能够进行静态参数测试的芯片io端口电路
WO2022041223A1 (zh) * 2020-08-31 2022-03-03 华为技术有限公司 芯片测试电路及电路测试方法
CN113190389A (zh) * 2021-04-14 2021-07-30 西安紫光国芯半导体有限公司 自测方法、测试装置以及计算机可读存储介质

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06289099A (ja) * 1993-03-30 1994-10-18 Toshiba Corp スキャン回路
JPH08240645A (ja) * 1995-03-03 1996-09-17 Advantest Corp Ｉｃの内部状態を少数ピンで読み出しテストする回路
US6145100A (en) * 1998-03-04 2000-11-07 Advanced Micro Devices, Inc. Debug interface including timing synchronization logic
US6631390B1 (en) * 2000-03-06 2003-10-07 Koninklijke Philips Electronics N.V. Method and apparatus for generating random numbers using flip-flop meta-stability
US6760873B1 (en) * 2000-09-28 2004-07-06 Lsi Logic Corporation Built-in self test for speed and timing margin for a source synchronous IO interface
US6892314B2 (en) * 2001-04-02 2005-05-10 International Business Machines Corporation Method and system of automatic delay detection and receiver adjustment for synchronous bus interface
US7000164B2 (en) * 2002-01-30 2006-02-14 Sun Microsystems, Inc. Method for scan testing and clocking dynamic domino circuits in VLSI systems using level sensitive latches and edge triggered flip flops
US7139308B2 (en) 2002-04-05 2006-11-21 Sun Microsystems, Inc. Source synchronous bus repeater
US7073111B2 (en) 2002-06-10 2006-07-04 Texas Instruments Incorporated High speed interconnect circuit test method and apparatus
DE10238710A1 (de) * 2002-08-23 2004-03-04 Metabowerke Gmbh Elektrohandwerkzeuggerät
JP4319146B2 (ja) 2002-12-27 2009-08-26 株式会社アドバンテスト 半導体試験装置
JP2004294424A (ja) * 2003-03-12 2004-10-21 Matsushita Electric Ind Co Ltd スキャンテスト制御方法、及びスキャンテスト回路
US7228476B2 (en) * 2004-11-05 2007-06-05 Stmicroelectronics, Inc. System and method for testing integrated circuits at operational speed using high-frequency clock converter
RU2374679C2 (ru) 2005-06-10 2009-11-27 Интернэшнл Бизнес Машинз Корпорейшн Микрокомпьютер и способ его тестирования

Also Published As

Publication number Publication date
EP1890234B1 (de) 2009-11-11
BRPI0611883A8 (pt) 2019-01-08
CN101176071A (zh) 2008-05-07
BRPI0611883B1 (pt) 2019-07-30
CN100504802C (zh) 2009-06-24
RU2374679C2 (ru) 2009-11-27
EP1890234A1 (de) 2008-02-20
DE602006010372D1 (de) 2009-12-24
JPWO2006132329A1 (ja) 2009-01-08
BRPI0611883A2 (pt) 2010-10-05
JP4701244B2 (ja) 2011-06-15
EP1890234A4 (de) 2008-11-05
WO2006132329A1 (ja) 2006-12-14
RU2007147919A (ru) 2009-07-20
US7793183B2 (en) 2010-09-07
US20090119561A1 (en) 2009-05-07

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties