ATE431612T1 - Schaltung und verfahren zur steuerung einer taktsynchronisationsschaltung für eine low-power- auffrischoperation - Google Patents
Schaltung und verfahren zur steuerung einer taktsynchronisationsschaltung für eine low-power- auffrischoperationInfo
- Publication number
- ATE431612T1 ATE431612T1 AT04789283T AT04789283T ATE431612T1 AT E431612 T1 ATE431612 T1 AT E431612T1 AT 04789283 T AT04789283 T AT 04789283T AT 04789283 T AT04789283 T AT 04789283T AT E431612 T1 ATE431612 T1 AT E431612T1
- Authority
- AT
- Austria
- Prior art keywords
- refresh operation
- circuit
- controlling
- low power
- clock synchronization
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4061—Calibration or ate or cycle tuning
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4067—Refresh in standby or low power modes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Transmitters (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/684,123 US6975556B2 (en) | 2003-10-09 | 2003-10-09 | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation |
PCT/US2004/032037 WO2005038864A2 (en) | 2003-10-09 | 2004-09-29 | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE431612T1 true ATE431612T1 (de) | 2009-05-15 |
Family
ID=34422918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT04789283T ATE431612T1 (de) | 2003-10-09 | 2004-09-29 | Schaltung und verfahren zur steuerung einer taktsynchronisationsschaltung für eine low-power- auffrischoperation |
Country Status (8)
Country | Link |
---|---|
US (5) | US6975556B2 (de) |
EP (1) | EP1671357B1 (de) |
JP (1) | JP4956734B2 (de) |
KR (1) | KR100903012B1 (de) |
CN (1) | CN1902708A (de) |
AT (1) | ATE431612T1 (de) |
DE (1) | DE602004021124D1 (de) |
WO (1) | WO2005038864A2 (de) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6551857B2 (en) | 1997-04-04 | 2003-04-22 | Elm Technology Corporation | Three dimensional structure integrated circuits |
US6975556B2 (en) * | 2003-10-09 | 2005-12-13 | Micron Technology, Inc. | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation |
US7345940B2 (en) * | 2003-11-18 | 2008-03-18 | Infineon Technologies Ag | Method and circuit configuration for refreshing data in a semiconductor memory |
US7233538B1 (en) * | 2004-08-02 | 2007-06-19 | Sun Microsystems, Inc. | Variable memory refresh rate for DRAM |
US7366862B2 (en) * | 2004-11-12 | 2008-04-29 | Lsi Logic Corporation | Method and apparatus for self-adjusting input delay in DDR-based memory systems |
JP4919333B2 (ja) * | 2005-09-29 | 2012-04-18 | 株式会社ハイニックスセミコンダクター | 半導体メモリ素子のデータ入力装置 |
JP4837357B2 (ja) * | 2005-10-18 | 2011-12-14 | エルピーダメモリ株式会社 | 半導体記憶装置 |
US7970086B2 (en) * | 2007-08-15 | 2011-06-28 | Infineon Technologies Ag | System and method for clock drift compensation |
CA2701180A1 (en) * | 2007-12-21 | 2009-07-02 | Mosaid Technologies Incorporated | Non-volatile semiconductor memory device with power saving feature |
JP2010176783A (ja) | 2009-02-02 | 2010-08-12 | Elpida Memory Inc | 半導体装置とその制御方法と半導体装置とそれを制御するコントローラとを含む半導体システム |
US7957218B2 (en) * | 2009-06-11 | 2011-06-07 | Freescale Semiconductor, Inc. | Memory controller with skew control and method |
US8300464B2 (en) | 2010-04-13 | 2012-10-30 | Freescale Semiconductor, Inc. | Method and circuit for calibrating data capture in a memory controller |
KR20120070436A (ko) * | 2010-12-21 | 2012-06-29 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
WO2012115839A1 (en) | 2011-02-23 | 2012-08-30 | Rambus Inc. | Protocol for memory power-mode control |
US8933715B2 (en) | 2012-04-08 | 2015-01-13 | Elm Technology Corporation | Configurable vertical integration |
KR101980162B1 (ko) * | 2012-06-28 | 2019-08-28 | 에스케이하이닉스 주식회사 | 메모리 |
US9153310B2 (en) | 2013-01-16 | 2015-10-06 | Maxlinear, Inc. | Dynamic random access memory for communications systems |
US10169262B2 (en) * | 2015-07-14 | 2019-01-01 | Qualcomm Incorporated | Low-power clocking for a high-speed memory interface |
KR20180047778A (ko) | 2016-11-01 | 2018-05-10 | 삼성전자주식회사 | 단계별 저전력 상태들을 갖는 메모리 장치 |
KR20180114712A (ko) * | 2017-04-11 | 2018-10-19 | 에스케이하이닉스 주식회사 | 리프레쉬 컨트롤러 및 그를 포함하는 반도체 메모리 장치 |
EP3641951B1 (de) | 2017-06-22 | 2023-09-20 | The Procter & Gamble Company | Filme mit einer wasserlöslichen schicht und einer aufgedämpften organischen beschichtung |
CN110719968A (zh) | 2017-06-22 | 2020-01-21 | 宝洁公司 | 包括水溶性层和气相沉积无机涂层的膜 |
US10339998B1 (en) * | 2018-03-27 | 2019-07-02 | Micron Technology, Inc. | Apparatuses and methods for providing clock signals in a semiconductor device |
US11163487B2 (en) * | 2018-06-04 | 2021-11-02 | Micron Technology, Inc. | Methods for generating notifications for updated information from mode registers of a memory device to a host and memory devices and systems employing the same |
US10892764B1 (en) * | 2020-08-14 | 2021-01-12 | Winbond Electronics Corp. | Delay locked loop device and update method thereof |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5272676A (en) * | 1990-11-20 | 1993-12-21 | Hitachi, Ltd. | Semiconductor integrated circuit device |
US5311468A (en) * | 1991-03-21 | 1994-05-10 | Texas Instruments Incorporated | Random access memory with a serial register arranged for quick access of a second bit from an arbitrary address |
KR0171930B1 (ko) * | 1993-12-15 | 1999-03-30 | 모리시다 요이치 | 반도체 메모리, 동화기억 메모리, 동화기억장치, 동화표시장치, 정지화기억 메모리 및 전자노트 |
JP3592386B2 (ja) * | 1994-11-22 | 2004-11-24 | 株式会社ルネサステクノロジ | 同期型半導体記憶装置 |
US5729720A (en) * | 1994-12-22 | 1998-03-17 | Texas Instruments Incorporated | Power management masked clock circuitry, systems and methods |
JP3893167B2 (ja) * | 1996-04-26 | 2007-03-14 | 株式会社ルネサステクノロジ | 同期型半導体記憶装置 |
JPH1196760A (ja) * | 1997-09-24 | 1999-04-09 | Fujitsu Ltd | 半導体記憶装置 |
JP3490887B2 (ja) * | 1998-03-05 | 2004-01-26 | シャープ株式会社 | 同期型半導体記憶装置 |
JP2000030438A (ja) * | 1998-07-10 | 2000-01-28 | Mitsubishi Electric Corp | 同期型半導体記憶装置 |
JP3279274B2 (ja) * | 1998-12-28 | 2002-04-30 | 日本電気株式会社 | 半導体装置 |
US6828106B2 (en) * | 1999-02-26 | 2004-12-07 | Cyclacel Limited | Methods and compositions using coiled binding partners |
US6208577B1 (en) * | 1999-04-16 | 2001-03-27 | Micron Technology, Inc. | Circuit and method for refreshing data stored in a memory cell |
JP2001118383A (ja) * | 1999-10-20 | 2001-04-27 | Fujitsu Ltd | リフレッシュを自動で行うダイナミックメモリ回路 |
KR100328556B1 (ko) * | 1999-12-23 | 2002-03-15 | 박종섭 | 셀프 리프레쉬 제어장치 |
KR100374641B1 (ko) * | 2000-11-24 | 2003-03-04 | 삼성전자주식회사 | 스탠바이 모드에서 지연동기 루프회로의 전력소모를감소시키기 위한 제어회로를 구비하는 반도체 메모리장치및 이의 파우워 다운 제어방법 |
US6646942B2 (en) * | 2001-10-09 | 2003-11-11 | Micron Technology, Inc. | Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages |
TW533413B (en) * | 2001-10-11 | 2003-05-21 | Cascade Semiconductor Corp | Asynchronous hidden refresh of semiconductor memory |
JP4041358B2 (ja) * | 2002-07-04 | 2008-01-30 | 富士通株式会社 | 半導体メモリ |
US6975556B2 (en) * | 2003-10-09 | 2005-12-13 | Micron Technology, Inc. | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation |
-
2003
- 2003-10-09 US US10/684,123 patent/US6975556B2/en not_active Expired - Lifetime
-
2004
- 2004-09-29 KR KR1020067009009A patent/KR100903012B1/ko not_active IP Right Cessation
- 2004-09-29 JP JP2006534066A patent/JP4956734B2/ja not_active Expired - Fee Related
- 2004-09-29 CN CNA2004800296433A patent/CN1902708A/zh active Pending
- 2004-09-29 AT AT04789283T patent/ATE431612T1/de not_active IP Right Cessation
- 2004-09-29 DE DE602004021124T patent/DE602004021124D1/de active Active
- 2004-09-29 WO PCT/US2004/032037 patent/WO2005038864A2/en active Application Filing
- 2004-09-29 EP EP04789283A patent/EP1671357B1/de not_active Not-in-force
-
2005
- 2005-07-18 US US11/184,187 patent/US7106646B2/en not_active Expired - Fee Related
-
2006
- 2006-08-17 US US11/506,238 patent/US7606101B2/en not_active Expired - Fee Related
-
2009
- 2009-09-28 US US12/568,507 patent/US7983110B2/en not_active Expired - Fee Related
-
2011
- 2011-07-18 US US13/184,930 patent/US8400868B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100903012B1 (ko) | 2009-06-17 |
WO2005038864A2 (en) | 2005-04-28 |
CN1902708A (zh) | 2007-01-24 |
US20050078539A1 (en) | 2005-04-14 |
US7106646B2 (en) | 2006-09-12 |
US8400868B2 (en) | 2013-03-19 |
US7606101B2 (en) | 2009-10-20 |
US20060274592A1 (en) | 2006-12-07 |
US7983110B2 (en) | 2011-07-19 |
DE602004021124D1 (de) | 2009-06-25 |
US6975556B2 (en) | 2005-12-13 |
JP2007508649A (ja) | 2007-04-05 |
US20110273938A1 (en) | 2011-11-10 |
KR20060118468A (ko) | 2006-11-23 |
WO2005038864A3 (en) | 2006-08-03 |
EP1671357B1 (de) | 2009-05-13 |
EP1671357A4 (de) | 2007-03-14 |
US20100014371A1 (en) | 2010-01-21 |
JP4956734B2 (ja) | 2012-06-20 |
US20050254327A1 (en) | 2005-11-17 |
EP1671357A2 (de) | 2006-06-21 |
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Legal Events
Date | Code | Title | Description |
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RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |