ATE427550T1 - Integritatssteuerung fur in einem nichtfluchtigen speicher gespeicherte daten - Google Patents

Integritatssteuerung fur in einem nichtfluchtigen speicher gespeicherte daten

Info

Publication number
ATE427550T1
ATE427550T1 AT04744341T AT04744341T ATE427550T1 AT E427550 T1 ATE427550 T1 AT E427550T1 AT 04744341 T AT04744341 T AT 04744341T AT 04744341 T AT04744341 T AT 04744341T AT E427550 T1 ATE427550 T1 AT E427550T1
Authority
AT
Austria
Prior art keywords
memory
storage cells
volatile storage
bit
volatile memory
Prior art date
Application number
AT04744341T
Other languages
English (en)
Inventor
Robert Jochemsen
Nicolaas Lambert
Wilhelmus Fontijn
Adrianus Denissen
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE427550T1 publication Critical patent/ATE427550T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1695Protection circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C2029/4402Internal storage of test result, quality data, chip identification, repair information
AT04744341T 2003-06-05 2004-05-26 Integritatssteuerung fur in einem nichtfluchtigen speicher gespeicherte daten ATE427550T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03101645 2003-06-05

Publications (1)

Publication Number Publication Date
ATE427550T1 true ATE427550T1 (de) 2009-04-15

Family

ID=33495628

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04744341T ATE427550T1 (de) 2003-06-05 2004-05-26 Integritatssteuerung fur in einem nichtfluchtigen speicher gespeicherte daten

Country Status (7)

Country Link
US (1) US7529987B2 (de)
EP (1) EP1634299B1 (de)
JP (1) JP2006526833A (de)
CN (1) CN1799104B (de)
AT (1) ATE427550T1 (de)
DE (1) DE602004020339D1 (de)
WO (1) WO2004109704A1 (de)

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EP1520252B1 (de) * 2002-06-28 2009-12-02 Nxp B.V. Datenträger mit erkennungsmitteln zum erkennen einer durchgeführten veränderung einer in speichermitteln gespeicherten information
FR2887050B1 (fr) * 2005-06-14 2007-10-05 Viaccess Sa Procede et systeme de securisation d'une transaction dans un reseau de telecommunication
US8327192B2 (en) * 2006-02-06 2012-12-04 Intel Corporation Method for memory integrity
US7529969B1 (en) * 2006-08-24 2009-05-05 Micron Technology, Inc. Memory device internal parameter reliability
CN101201773B (zh) * 2006-12-15 2011-06-15 英业达股份有限公司 储存装置的数据保护方法
US8127203B2 (en) * 2007-09-17 2012-02-28 Infineon Technologies Ag Method, data processing apparatus and wireless device
US8782326B2 (en) * 2009-04-01 2014-07-15 Seiko Epson Corporation Memory device and system including a memory device electronically connectable to a host circuit
EP2282296A1 (de) * 2009-07-31 2011-02-09 Robert Bosch GmbH Signalerfassungsvorrichtung
GB2487530A (en) * 2011-01-19 2012-08-01 Nds Ltd Detection of illegal memory readout by using permanently programmed cells
US8751906B2 (en) * 2011-06-13 2014-06-10 Marvell World Trade Ltd. Systems and methods for operating on a storage device using a life-cycle dependent coding scheme
CN102608622B (zh) * 2012-03-08 2013-07-10 东南大学 一种全球定位系统导航数据的完整性存储方法
CN103116566A (zh) * 2013-01-17 2013-05-22 东南大学 一种利用邮件收发箱实现双核之间通信的装置
KR102168096B1 (ko) 2013-03-15 2020-10-20 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 데이터 쓰기 방법
KR101489091B1 (ko) 2013-09-30 2015-02-04 (주) 아이씨티케이 반도체 공정을 이용한 식별키 생성 장치 및 방법
GB2526261B (en) * 2014-04-28 2017-08-02 Gelliner Ltd Encoded cells and cell arrays
CN107548183A (zh) * 2016-06-23 2018-01-05 上海北京大学微电子研究院 基于无线通信的led驱动调光芯片
US10559374B2 (en) * 2017-02-20 2020-02-11 Piecemakers Technology, Inc. Circuit topology of memory chips with embedded function test pattern generation module connected to normal access port physical layer
US10243583B2 (en) 2017-06-16 2019-03-26 Western Digital Technologies, Inc. CPU error remediation during erasure code encoding
US10431301B2 (en) 2017-12-22 2019-10-01 Micron Technology, Inc. Auto-referenced memory cell read techniques
US10566052B2 (en) * 2017-12-22 2020-02-18 Micron Technology, Inc. Auto-referenced memory cell read techniques
CN109979519B (zh) 2017-12-27 2021-03-16 华邦电子股份有限公司 存储器完整性的检验方法、非易失性存储器以及电子装置
TWI650637B (zh) * 2017-12-27 2019-02-11 華邦電子股份有限公司 記憶體完整性的檢驗方法、非揮發性記憶體以及電子裝置
CN114203250B (zh) * 2021-12-14 2022-06-24 北京得瑞领新科技有限公司 固态存储器的数据存储方法、数据读取方法及固态存储器

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US5606662A (en) * 1995-03-24 1997-02-25 Advanced Micro Devices, Inc. Auto DRAM parity enable/disable mechanism
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JP4059473B2 (ja) * 2001-08-09 2008-03-12 株式会社ルネサステクノロジ メモリカード及びメモリコントローラ
JP3866567B2 (ja) * 2001-12-13 2007-01-10 株式会社東芝 半導体記憶装置及びその製造方法
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JP3821066B2 (ja) * 2002-07-04 2006-09-13 日本電気株式会社 磁気ランダムアクセスメモリ
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US7206891B2 (en) * 2002-09-26 2007-04-17 Lsi Logic Corporation Multi-port memory controller having independent ECC encoders

Also Published As

Publication number Publication date
US7529987B2 (en) 2009-05-05
CN1799104A (zh) 2006-07-05
DE602004020339D1 (de) 2009-05-14
EP1634299A1 (de) 2006-03-15
US20060155882A1 (en) 2006-07-13
WO2004109704A1 (en) 2004-12-16
JP2006526833A (ja) 2006-11-24
CN1799104B (zh) 2011-07-13
EP1634299B1 (de) 2009-04-01

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