ATE405884T1 - Elektronisch bewegbarer abschluss und verfahren um in einem speichersystem zu verwenden - Google Patents

Elektronisch bewegbarer abschluss und verfahren um in einem speichersystem zu verwenden

Info

Publication number
ATE405884T1
ATE405884T1 AT00959606T AT00959606T ATE405884T1 AT E405884 T1 ATE405884 T1 AT E405884T1 AT 00959606 T AT00959606 T AT 00959606T AT 00959606 T AT00959606 T AT 00959606T AT E405884 T1 ATE405884 T1 AT E405884T1
Authority
AT
Austria
Prior art keywords
storage system
movable terminal
memory
electronically movable
disclosed
Prior art date
Application number
AT00959606T
Other languages
English (en)
Inventor
James Gasbarro
Original Assignee
Rambus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rambus Inc filed Critical Rambus Inc
Application granted granted Critical
Publication of ATE405884T1 publication Critical patent/ATE405884T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4086—Bus impedance matching, e.g. termination

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Vehicle Body Suspensions (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Medicines Containing Antibodies Or Antigens For Use As Internal Diagnostic Agents (AREA)
AT00959606T 1999-09-01 2000-08-30 Elektronisch bewegbarer abschluss und verfahren um in einem speichersystem zu verwenden ATE405884T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/387,842 US6308232B1 (en) 1999-09-01 1999-09-01 Electronically moveable terminator and method for using same in a memory system

Publications (1)

Publication Number Publication Date
ATE405884T1 true ATE405884T1 (de) 2008-09-15

Family

ID=23531563

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00959606T ATE405884T1 (de) 1999-09-01 2000-08-30 Elektronisch bewegbarer abschluss und verfahren um in einem speichersystem zu verwenden

Country Status (5)

Country Link
US (1) US6308232B1 (de)
EP (2) EP1983442A1 (de)
AT (1) ATE405884T1 (de)
DE (1) DE60040007D1 (de)
WO (1) WO2001016767A1 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4383601B2 (ja) * 1999-09-30 2009-12-16 株式会社東芝 高速メモリ装置、高速メモリ装置のソケット実装構造、及び高速メモリ装置の実装方法
US6715014B1 (en) * 2000-05-25 2004-03-30 Hewlett-Packard Development Company, L.P. Module array
DE10053831C1 (de) * 2000-10-30 2002-05-08 Infineon Technologies Ag Spannungsversorgungsanordnung für Halbleiterspeicheranordnung
US6687780B1 (en) * 2000-11-02 2004-02-03 Rambus Inc. Expandable slave device system
US6674649B2 (en) * 2001-07-23 2004-01-06 Intel Corporation Systems having modules sharing on module terminations
US6631083B2 (en) 2001-07-23 2003-10-07 Intel Corporation Systems with modules and clocking therefore
US6711027B2 (en) * 2001-07-23 2004-03-23 Intel Corporation Modules having paths of different impedances
US6717823B2 (en) * 2001-07-23 2004-04-06 Intel Corporation Systems having modules with buffer chips
US6674648B2 (en) * 2001-07-23 2004-01-06 Intel Corporation Termination cards and systems therefore
US6771515B2 (en) * 2001-07-23 2004-08-03 Intel Corporation Systems having modules with on die terminations
US6918078B2 (en) * 2001-07-23 2005-07-12 Intel Corporation Systems with modules sharing terminations
JP3821678B2 (ja) * 2001-09-06 2006-09-13 エルピーダメモリ株式会社 メモリ装置
US6754129B2 (en) * 2002-01-24 2004-06-22 Micron Technology, Inc. Memory module with integrated bus termination
US7142461B2 (en) * 2002-11-20 2006-11-28 Micron Technology, Inc. Active termination control though on module register
US6930904B2 (en) * 2002-11-22 2005-08-16 Sun Microsystems, Inc. Circuit topology for high-speed memory access
JP4233360B2 (ja) * 2003-03-07 2009-03-04 三菱電機株式会社 高速通信用プリント配線基板
US6924660B2 (en) 2003-09-08 2005-08-02 Rambus Inc. Calibration methods and circuits for optimized on-die termination
US6980020B2 (en) * 2003-12-19 2005-12-27 Rambus Inc. Calibration methods and circuits for optimized on-die termination
US20050228912A1 (en) * 2004-03-30 2005-10-13 Walker Clinton F Memory address bus termination control
US7106094B2 (en) * 2004-05-14 2006-09-12 International Business Machines Corporation Method and topology for improving signal quality on high speed, multi-drop busses
DE102004046957B4 (de) 2004-09-28 2016-02-04 Polaris Innovations Ltd. Verfahren und Schaltungsanordnungen zum Abgleichen von Signallaufzeiten in einem Speichersystem
US7196567B2 (en) * 2004-12-20 2007-03-27 Rambus Inc. Systems and methods for controlling termination resistance values for a plurality of communication channels
US7439760B2 (en) 2005-12-19 2008-10-21 Rambus Inc. Configurable on-die termination
US7486104B2 (en) * 2006-06-02 2009-02-03 Rambus Inc. Integrated circuit with graduated on-die termination
WO2008079911A1 (en) 2006-12-21 2008-07-03 Rambus Inc. Dynamic on-die termination of address and command signals
US7768297B2 (en) * 2007-01-31 2010-08-03 Rambus, Inc. Multi-drop bus system
KR100901394B1 (ko) * 2007-05-15 2009-06-05 삼성전자주식회사 데이터 전송 장치 및 방법
US8390316B2 (en) * 2008-09-09 2013-03-05 Airmar Technology Corporation Termination resistor scheme
US7915912B2 (en) 2008-09-24 2011-03-29 Rambus Inc. Signal lines with internal and external termination
CN101995912B (zh) * 2009-08-12 2014-01-15 鸿富锦精密工业（深圳）有限公司 内存信号阻抗匹配装置
US8213206B2 (en) * 2010-01-15 2012-07-03 Mediatek Inc. Electronic apparatus
US8588012B2 (en) 2010-06-17 2013-11-19 Rambus, Inc. Balanced on-die termination
KR101858578B1 (ko) * 2011-12-21 2018-05-18 에스케이하이닉스 주식회사 이종 칩들을 포함하는 반도체 패키지 및 이를 포함하는 메모리 시스템
US10255220B2 (en) 2015-03-30 2019-04-09 Rambus Inc. Dynamic termination scheme for memory communication
KR20170025894A (ko) 2015-08-31 2017-03-08 에스케이하이닉스 주식회사 등화 회로, 반도체 장치 및 이를 이용한 반도체 시스템
JP2021043848A (ja) * 2019-09-13 2021-03-18 キオクシア株式会社 メモリシステム

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4595923A (en) 1981-10-21 1986-06-17 Elxsi Improved terminator for high speed data bus
US5134311A (en) 1990-06-07 1992-07-28 International Business Machines Corporation Self-adjusting impedance matching driver
US5382841A (en) * 1991-12-23 1995-01-17 Motorola, Inc. Switchable active bus termination circuit
US5313595A (en) * 1992-12-10 1994-05-17 Digital Equipment Corporation Automatic signal termination system for a computer bus
US5422580A (en) * 1993-10-14 1995-06-06 Aps Technologies Switchable active termination for SCSI peripheral devices
JPH08272501A (ja) 1995-03-31 1996-10-18 Takaoka Electric Mfg Co Ltd メモリーモジュールのターミネーション回路
US5635852A (en) * 1995-04-17 1997-06-03 Linfinity Microelectronics, Inc. Controllable actice terminator for a computer bus
US6008665A (en) * 1997-05-07 1999-12-28 California Micro Devices Corporation Termination circuits and methods therefor
US6029216A (en) * 1997-06-27 2000-02-22 Lsi Logic Corporation Auto-termination method and apparatus for use with either active high or active low terminators

Also Published As

Publication number Publication date
EP1226502A1 (de) 2002-07-31
US6308232B1 (en) 2001-10-23
EP1226502B1 (de) 2008-08-20
EP1226502A4 (de) 2004-05-06
EP1983442A1 (de) 2008-10-22
DE60040007D1 (de) 2008-10-02
WO2001016767A1 (en) 2001-03-08

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