ATE399367T1 - Verfahren zur herstellung eines silizium- germanium basis eines heteroübergang- bipolartransistors - Google Patents

Verfahren zur herstellung eines silizium- germanium basis eines heteroübergang- bipolartransistors

Info

Publication number
ATE399367T1
ATE399367T1 AT01300208T AT01300208T ATE399367T1 AT E399367 T1 ATE399367 T1 AT E399367T1 AT 01300208 T AT01300208 T AT 01300208T AT 01300208 T AT01300208 T AT 01300208T AT E399367 T1 ATE399367 T1 AT E399367T1
Authority
AT
Austria
Prior art keywords
silicon
mesa
bipolar transistor
germanium
germanium base
Prior art date
Application number
AT01300208T
Other languages
English (en)
Inventor
Feng-Yi Huang
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE399367T1 publication Critical patent/ATE399367T1/de

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66242—Heterojunction transistors [HBT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Silicon Compounds (AREA)
AT01300208T 2000-01-10 2001-01-10 Verfahren zur herstellung eines silizium- germanium basis eines heteroübergang- bipolartransistors ATE399367T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/480,033 US6251738B1 (en) 2000-01-10 2000-01-10 Process for forming a silicon-germanium base of heterojunction bipolar transistor

Publications (1)

Publication Number Publication Date
ATE399367T1 true ATE399367T1 (de) 2008-07-15

Family

ID=23906406

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01300208T ATE399367T1 (de) 2000-01-10 2001-01-10 Verfahren zur herstellung eines silizium- germanium basis eines heteroübergang- bipolartransistors

Country Status (9)

Country Link
US (2) US6251738B1 (de)
EP (1) EP1132954B1 (de)
JP (1) JP3701873B2 (de)
KR (1) KR100354118B1 (de)
CN (1) CN1156899C (de)
AT (1) ATE399367T1 (de)
DE (1) DE60134511D1 (de)
SG (1) SG89368A1 (de)
TW (1) TW475225B (de)

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6251738B1 (en) * 2000-01-10 2001-06-26 International Business Machines Corporation Process for forming a silicon-germanium base of heterojunction bipolar transistor
US6693033B2 (en) 2000-02-10 2004-02-17 Motorola, Inc. Method of removing an amorphous oxide from a monocrystalline surface
US6506657B1 (en) 2000-04-19 2003-01-14 National Semiconductor Corporation Process for forming damascene-type isolation structure for BJT device formed in trench
US6514886B1 (en) * 2000-09-22 2003-02-04 Newport Fab, Llc Method for elimination of contaminants prior to epitaxy
US6638838B1 (en) 2000-10-02 2003-10-28 Motorola, Inc. Semiconductor structure including a partially annealed layer and method of forming the same
US6620732B1 (en) * 2000-11-17 2003-09-16 Newport Fab, Llc Method for controlling critical dimension in a polycrystalline silicon emitter and related structure
US20020096683A1 (en) * 2001-01-19 2002-07-25 Motorola, Inc. Structure and method for fabricating GaN devices utilizing the formation of a compliant substrate
US6762480B2 (en) * 2001-02-27 2004-07-13 Agilent Technologies, Inc. Thin gallium-arsenide-antimonide base heterojunction bipolar transistor (HBT) having improved gain
US6673646B2 (en) 2001-02-28 2004-01-06 Motorola, Inc. Growth of compound semiconductor structures on patterned oxide films and process for fabricating same
FR2822292B1 (fr) * 2001-03-14 2003-07-18 St Microelectronics Sa Procede de fabrication d'un transistor bipolaire de type double polysilicium a base a heterojonction et transistor correspondant
US6603156B2 (en) * 2001-03-31 2003-08-05 International Business Machines Corporation Strained silicon on insulator structures
US6709989B2 (en) 2001-06-21 2004-03-23 Motorola, Inc. Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US6646293B2 (en) 2001-07-18 2003-11-11 Motorola, Inc. Structure for fabricating high electron mobility transistors utilizing the formation of complaint substrates
US6693298B2 (en) 2001-07-20 2004-02-17 Motorola, Inc. Structure and method for fabricating epitaxial semiconductor on insulator (SOI) structures and devices utilizing the formation of a compliant substrate for materials used to form same
US6667196B2 (en) 2001-07-25 2003-12-23 Motorola, Inc. Method for real-time monitoring and controlling perovskite oxide film growth and semiconductor structure formed using the method
US6639249B2 (en) 2001-08-06 2003-10-28 Motorola, Inc. Structure and method for fabrication for a solid-state lighting device
US6673667B2 (en) 2001-08-15 2004-01-06 Motorola, Inc. Method for manufacturing a substantially integral monolithic apparatus including a plurality of semiconductor materials
SE522891C2 (sv) * 2001-11-09 2004-03-16 Ericsson Telefon Ab L M En kisel-germanium mesa transistor, en metod för dess framställning och en integrerad krets innefattande en sådan transistor
KR100455829B1 (ko) * 2001-12-10 2004-11-06 주식회사 타키오닉스 초자기정렬 이종접합 바이폴라 소자 및 그 제조방법
US6617619B1 (en) * 2002-02-04 2003-09-09 Newport Fab, Llc Structure for a selective epitaxial HBT emitter
US6597022B1 (en) * 2002-02-04 2003-07-22 Newport Fab, Llc Method for controlling critical dimension in an HBT emitter and related structure
US6878976B2 (en) 2002-03-13 2005-04-12 International Business Machines Corporation Carbon-modulated breakdown voltage SiGe transistor for low voltage trigger ESD applications
US6699765B1 (en) 2002-08-29 2004-03-02 Micrel, Inc. Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
EP1418615A1 (de) * 2002-11-05 2004-05-12 United Microelectronics Corporation Herstellung eines selbstjustierten Bipolartransistors
US20040115878A1 (en) * 2002-12-13 2004-06-17 Taiwan Semiconductor Manufacturing Co., Ltd Method for manufacturing a silicon germanium based device with crystal defect prevention
US7453129B2 (en) 2002-12-18 2008-11-18 Noble Peak Vision Corp. Image sensor comprising isolated germanium photodetectors integrated with a silicon substrate and silicon circuitry
US7589380B2 (en) 2002-12-18 2009-09-15 Noble Peak Vision Corp. Method for forming integrated circuit utilizing dual semiconductors
US6777302B1 (en) 2003-06-04 2004-08-17 International Business Machines Corporation Nitride pedestal for raised extrinsic base HBT process
US7012009B2 (en) * 2004-02-24 2006-03-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method for improving the electrical continuity for a silicon-germanium film across a silicon/oxide/polysilicon surface using a novel two-temperature process
US7002190B1 (en) * 2004-09-21 2006-02-21 International Business Machines Corporation Method of collector formation in BiCMOS technology
KR101118649B1 (ko) * 2005-01-24 2012-03-06 삼성전자주식회사 바이폴라 트랜지스터 및 그 형성 방법
US7544577B2 (en) * 2005-08-26 2009-06-09 International Business Machines Corporation Mobility enhancement in SiGe heterojunction bipolar transistors
US7651919B2 (en) * 2005-11-04 2010-01-26 Atmel Corporation Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization
US7439558B2 (en) * 2005-11-04 2008-10-21 Atmel Corporation Method and system for controlled oxygen incorporation in compound semiconductor films for device performance enhancement
US20070102729A1 (en) * 2005-11-04 2007-05-10 Enicks Darwin G Method and system for providing a heterojunction bipolar transistor having SiGe extensions
TW200849556A (en) * 2006-06-14 2008-12-16 Nxp Bv Semiconductor device and method of manufacturing such a device
KR100817403B1 (ko) 2006-11-20 2008-03-27 전북대학교산학협력단 반도체 소자 구조 및 그 제조 방법
US20080142836A1 (en) * 2006-12-15 2008-06-19 Darwin Gene Enicks Method for growth of alloy layers with compositional curvature in a semiconductor device
US7531854B2 (en) 2007-05-04 2009-05-12 Dsm Solutions, Inc. Semiconductor device having strain-inducing substrate and fabrication methods thereof
US7453107B1 (en) * 2007-05-04 2008-11-18 Dsm Solutions, Inc. Method for applying a stress layer to a semiconductor device and device formed therefrom
JP5543103B2 (ja) * 2007-12-28 2014-07-09 住友化学株式会社 半導体基板、半導体基板の製造方法および電子デバイス
CN101834135A (zh) * 2010-04-22 2010-09-15 上海宏力半导体制造有限公司 一种双极型晶体管及其制作方法
US10529836B1 (en) * 2017-06-19 2020-01-07 Newport Fab, Llc SiGe heterojunction bipolar transistor with crystalline raised base on germanium etch stop layer

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5064772A (en) 1988-08-31 1991-11-12 International Business Machines Corporation Bipolar transistor integrated circuit technology
US5256550A (en) 1988-11-29 1993-10-26 Hewlett-Packard Company Fabricating a semiconductor device with strained Si1-x Gex layer
US5250448A (en) * 1990-01-31 1993-10-05 Kabushiki Kaisha Toshiba Method of fabricating a miniaturized heterojunction bipolar transistor
US5363793A (en) * 1990-04-06 1994-11-15 Canon Kabushiki Kaisha Method for forming crystals
JP3130545B2 (ja) * 1991-03-06 2001-01-31 株式会社東芝 半導体装置および半導体装置の製造方法
US5352912A (en) * 1991-11-13 1994-10-04 International Business Machines Corporation Graded bandgap single-crystal emitter heterojunction bipolar transistor
US5338942A (en) * 1992-01-16 1994-08-16 Hitachi, Ltd. Semiconductor projections having layers with different lattice constants
JP2971246B2 (ja) * 1992-04-15 1999-11-02 株式会社東芝 ヘテロバイポーラトランジスタの製造方法
US5523243A (en) 1992-12-21 1996-06-04 International Business Machines Corporation Method of fabricating a triple heterojunction bipolar transistor
JP3156436B2 (ja) 1993-04-05 2001-04-16 日本電気株式会社 ヘテロ接合バイポーラトランジスタ
JP2970425B2 (ja) 1994-09-26 1999-11-02 日本電気株式会社 バイポーラトランジスタの製造方法
KR970054343A (ko) * 1995-12-20 1997-07-31 이준 규소/규소게르마늄 쌍극자 트랜지스터 제조방법
US5672522A (en) 1996-03-05 1997-09-30 Trw Inc. Method for making selective subcollector heterojunction bipolar transistors
US5773350A (en) * 1997-01-28 1998-06-30 National Semiconductor Corporation Method for forming a self-aligned bipolar junction transistor with silicide extrinsic base contacts and selective epitaxial grown intrinsic base
US6040225A (en) * 1997-08-29 2000-03-21 The Whitaker Corporation Method of fabricating polysilicon based resistors in Si-Ge heterojunction devices
US6251738B1 (en) * 2000-01-10 2001-06-26 International Business Machines Corporation Process for forming a silicon-germanium base of heterojunction bipolar transistor

Also Published As

Publication number Publication date
US20010026986A1 (en) 2001-10-04
US6251738B1 (en) 2001-06-26
EP1132954B1 (de) 2008-06-25
KR20010070331A (ko) 2001-07-25
TW475225B (en) 2002-02-01
JP2001223224A (ja) 2001-08-17
US6417059B2 (en) 2002-07-09
DE60134511D1 (de) 2008-08-07
SG89368A1 (en) 2002-06-18
JP3701873B2 (ja) 2005-10-05
KR100354118B1 (ko) 2002-09-28
CN1304169A (zh) 2001-07-18
EP1132954A3 (de) 2004-02-18
CN1156899C (zh) 2004-07-07
EP1132954A2 (de) 2001-09-12

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