FR2803433B1 - Procede de realisation d'une grille metallique enterree dans une structure en materiau semiconducteur - Google Patents

Procede de realisation d'une grille metallique enterree dans une structure en materiau semiconducteur

Info

Publication number
FR2803433B1
FR2803433B1 FR9916766A FR9916766A FR2803433B1 FR 2803433 B1 FR2803433 B1 FR 2803433B1 FR 9916766 A FR9916766 A FR 9916766A FR 9916766 A FR9916766 A FR 9916766A FR 2803433 B1 FR2803433 B1 FR 2803433B1
Authority
FR
France
Prior art keywords
metal
semiconductor material
producing
grid
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9916766A
Other languages
English (en)
Other versions
FR2803433A1 (fr
Inventor
Jean Louis Guyaux
Jean Charles Garcia
Jean Massies
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Priority to FR9916766A priority Critical patent/FR2803433B1/fr
Publication of FR2803433A1 publication Critical patent/FR2803433A1/fr
Application granted granted Critical
Publication of FR2803433B1 publication Critical patent/FR2803433B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66454Static induction transistors [SIT], e.g. permeable base transistors [PBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647Lateral overgrowth

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Formation Of Insulating Films (AREA)
  • Recrystallisation Techniques (AREA)
FR9916766A 1999-12-30 1999-12-30 Procede de realisation d'une grille metallique enterree dans une structure en materiau semiconducteur Expired - Fee Related FR2803433B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9916766A FR2803433B1 (fr) 1999-12-30 1999-12-30 Procede de realisation d'une grille metallique enterree dans une structure en materiau semiconducteur

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9916766A FR2803433B1 (fr) 1999-12-30 1999-12-30 Procede de realisation d'une grille metallique enterree dans une structure en materiau semiconducteur

Publications (2)

Publication Number Publication Date
FR2803433A1 FR2803433A1 (fr) 2001-07-06
FR2803433B1 true FR2803433B1 (fr) 2003-02-14

Family

ID=9554076

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9916766A Expired - Fee Related FR2803433B1 (fr) 1999-12-30 1999-12-30 Procede de realisation d'une grille metallique enterree dans une structure en materiau semiconducteur

Country Status (1)

Country Link
FR (1) FR2803433B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2888664B1 (fr) 2005-07-18 2008-05-02 Centre Nat Rech Scient Procede de realisation d'un transistor bipolaire a heterojonction
FR2898434B1 (fr) 2006-03-13 2008-05-23 Centre Nat Rech Scient Diode electroluminescente blanche monolithique

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4378629A (en) * 1979-08-10 1983-04-05 Massachusetts Institute Of Technology Semiconductor embedded layer technology including permeable base transistor, fabrication method
US4971928A (en) * 1990-01-16 1990-11-20 General Motors Corporation Method of making a light emitting semiconductor having a rear reflecting surface
US5828088A (en) * 1996-09-05 1998-10-27 Astropower, Inc. Semiconductor device structures incorporating "buried" mirrors and/or "buried" metal electrodes
EP0942459B1 (fr) * 1997-04-11 2012-03-21 Nichia Corporation Procede assurant la croissance de semi-conducteurs de nitrure
US6046465A (en) * 1998-04-17 2000-04-04 Hewlett-Packard Company Buried reflectors for light emitters in epitaxial material and method for producing same

Also Published As

Publication number Publication date
FR2803433A1 (fr) 2001-07-06

Similar Documents

Publication Publication Date Title
GB0117520D0 (en) Method of horizontally growing carbon nanotubes and field effect transistor using the carbon nanotubes grown by the method
JP2000021771A5 (fr)
SG89368A1 (en) Process for forming a silicon-germanium base of a heterohunction bipolar transistor
WO2005050709A3 (fr) Substrat gan de faible densite de dislocation uniforme, a large zone et son procede de fabrication
WO2004051707A3 (fr) Dispositifs a base de nitrure de gallium et leur procede de fabrication
EP1178523A4 (fr) PROCEDE DE CROISSANCE DE CRISTAUX SEMICONDUCTEURS COMPOSES DE GaN, ET SUBSTRAT DE SEMICONDUCTEUR
AU7992900A (en) Pendeoepitaxial growth of gallium nitride layers on sapphire substrates
EP0951055A3 (fr) Couche formée par croissance epitaxiale dans une tranchée
ES2169015T1 (es) Fabricacion de capas de nitruro de galio por crecimiento lateral.
DE60043854D1 (de) Einstufige pendeo- oder laterale epitaxie von gruppe iii-nitridschichten
EP1054442A3 (fr) Procédé de croissance epitaxiale des semi-conducteurs en nitrure du groupe III sur silicium
ATE547806T1 (de) Herstellungsverfahren einer halbleiterschicht mit nicht angepasstem gitter
TW200510252A (en) Semiconductor layer
Shen et al. Realization of Ga-polarity GaN films in radio-frequency plasma-assisted molecular beam epitaxy
JP2000082671A5 (fr)
EP0969499A3 (fr) Procédé de croissance cristalline pour un dispositif semi-conducteur
FR2803433B1 (fr) Procede de realisation d'une grille metallique enterree dans une structure en materiau semiconducteur
EP0286428A3 (fr) Procédé pour la fabrication d'un transistor à effet de champ à jonction
WO2001080294A3 (fr) Tampon higfet a mode ameliore, etire par depot en phase gazeuse de melanges organo-metalliques
KR950700606A (ko) 반도체 에피택셜 기판(Semiconductor expitaxial substrate)
KR930011210A (ko) 반도체장치 및 그의 제조방법
JPS636834A (ja) 選択エピタキシヤル成長方法
CN115148809A (zh) 一种高电子迁移率晶体管及其制备方法
KR970003799A (ko) 반도체 바이폴라 소자의 격리층 형성방법
KR950002025A (ko) 반도체 소자의 캐패시터 제조 방법

Legal Events

Date Code Title Description
CD Change of name or company name
ST Notification of lapse

Effective date: 20060831