ATE354207T1 - Lvds-treiber mit vorverzerrung - Google Patents

Lvds-treiber mit vorverzerrung

Info

Publication number
ATE354207T1
ATE354207T1 AT02293229T AT02293229T ATE354207T1 AT E354207 T1 ATE354207 T1 AT E354207T1 AT 02293229 T AT02293229 T AT 02293229T AT 02293229 T AT02293229 T AT 02293229T AT E354207 T1 ATE354207 T1 AT E354207T1
Authority
AT
Austria
Prior art keywords
current level
sequence
pulses
control signals
predetermined current
Prior art date
Application number
AT02293229T
Other languages
English (en)
Inventor
Radelinow Andrzej Gajdardziew
Original Assignee
Cit Alcatel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cit Alcatel filed Critical Cit Alcatel
Application granted granted Critical
Publication of ATE354207T1 publication Critical patent/ATE354207T1/de

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/028Arrangements specific to the transmitter end
    • H04L25/0282Provision for current-mode coupling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0272Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H04L25/0276Arrangements for coupling common mode signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Amplifiers (AREA)
  • Picture Signal Circuits (AREA)
  • Logic Circuits (AREA)
AT02293229T 2002-12-23 2002-12-23 Lvds-treiber mit vorverzerrung ATE354207T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02293229A EP1434347B1 (de) 2002-12-23 2002-12-23 LVDS-Treiber mit Vorverzerrung

Publications (1)

Publication Number Publication Date
ATE354207T1 true ATE354207T1 (de) 2007-03-15

Family

ID=32405806

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02293229T ATE354207T1 (de) 2002-12-23 2002-12-23 Lvds-treiber mit vorverzerrung

Country Status (4)

Country Link
US (1) US6977534B2 (de)
EP (1) EP1434347B1 (de)
AT (1) ATE354207T1 (de)
DE (1) DE60218192T2 (de)

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US20090154591A1 (en) * 2007-12-17 2009-06-18 Altera Corporation High-speed serial data signal transmitter driver circuitry
US7733118B2 (en) * 2008-03-06 2010-06-08 Micron Technology, Inc. Devices and methods for driving a signal off an integrated circuit
US7956645B2 (en) * 2008-03-17 2011-06-07 Broadcom Corporation Low power high-speed output driver
US9252758B2 (en) * 2008-04-08 2016-02-02 Realtek Semiconductor Corporation Multi-phase phase interpolator
US8106684B2 (en) 2008-09-24 2012-01-31 Sony Corporation High-speed low-voltage differential signaling system
US7977997B2 (en) * 2008-12-30 2011-07-12 Micron Technology, Inc. Generating a full rail signal
US9246715B1 (en) * 2009-04-29 2016-01-26 Altera Corporation Pre-emphasis circuitry including a pre-emphasis voltage variation compensation engine
JP5313771B2 (ja) * 2009-06-02 2013-10-09 ルネサスエレクトロニクス株式会社 プリエンファシス機能を含む出力回路
US7893720B2 (en) * 2009-07-18 2011-02-22 Texas Instruments Incorporated Bus low voltage differential signaling (BLVDS) circuit
US7944252B1 (en) * 2009-11-05 2011-05-17 Texas Instruments Incorporated High performance LVDS driver for scalable supply
US7863936B1 (en) * 2009-12-01 2011-01-04 Himax Imaging, Inc. Driving circuit with impedence calibration and pre-emphasis functionalities
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US8446172B2 (en) * 2011-05-06 2013-05-21 Altera Corporation Apparatus and methods of reducing pre-emphasis voltage jitter
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US9231631B1 (en) 2014-06-20 2016-01-05 Altera Corporation Circuits and methods for adjusting the voltage swing of a signal
TWI544747B (zh) 2015-01-29 2016-08-01 聯詠科技股份有限公司 雙模式序列傳輸裝置及其模式切換方法
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CN107870647A (zh) * 2016-09-22 2018-04-03 联发科技(新加坡)私人有限公司 前置驱动电路
US10148261B1 (en) * 2017-12-18 2018-12-04 Nxp Usa, Inc. On chip adaptive jitter reduction hardware method for LVDS systems
US10734974B1 (en) 2019-04-12 2020-08-04 Nxp Usa, Inc. Transmitter circuit having a pre-emphasis driver circuit
US11728778B2 (en) 2020-12-29 2023-08-15 Analog Devices International Unlimited Company Differential signaling transmission systems
DE102021133933A1 (de) 2021-12-20 2023-06-22 Endress+Hauser Flowtec Ag Signal-Übertragungssystem
JP2024108575A (ja) * 2023-01-31 2024-08-13 ラピステクノロジー株式会社 出力ドライバ及び表示装置
CN118449476B (zh) * 2024-07-08 2024-10-15 江苏鑫康微电子科技有限公司 用于提高pga共模抑制比的修调装置

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Also Published As

Publication number Publication date
EP1434347B1 (de) 2007-02-14
US6977534B2 (en) 2005-12-20
EP1434347A1 (de) 2004-06-30
US20040124888A1 (en) 2004-07-01
DE60218192T2 (de) 2007-11-22
DE60218192D1 (de) 2007-03-29

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