ITVA20020050A1 - Metodo e circuito di amplificazione con pre-enfasi. - Google Patents

Metodo e circuito di amplificazione con pre-enfasi.

Info

Publication number
ITVA20020050A1
ITVA20020050A1 IT000050A ITVA20020050A ITVA20020050A1 IT VA20020050 A1 ITVA20020050 A1 IT VA20020050A1 IT 000050 A IT000050 A IT 000050A IT VA20020050 A ITVA20020050 A IT VA20020050A IT VA20020050 A1 ITVA20020050 A1 IT VA20020050A1
Authority
IT
Italy
Prior art keywords
emphasis
circuit
amplification method
amplification
Prior art date
Application number
IT000050A
Other languages
English (en)
Inventor
Claudio Cattaneo
Laurentiis Pierpaolo De
Luciano Tomasini
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT000050A priority Critical patent/ITVA20020050A1/it
Priority to US10/679,943 priority patent/US6853220B2/en
Publication of ITVA20020050A1 publication Critical patent/ITVA20020050A1/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
    • H03G1/0029—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier using FETs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • H04L25/0286—Provision of wave shaping within the driver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
IT000050A 2002-10-04 2002-10-04 Metodo e circuito di amplificazione con pre-enfasi. ITVA20020050A1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT000050A ITVA20020050A1 (it) 2002-10-04 2002-10-04 Metodo e circuito di amplificazione con pre-enfasi.
US10/679,943 US6853220B2 (en) 2002-10-04 2003-10-06 Method and amplification circuit with pre-emphasis

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT000050A ITVA20020050A1 (it) 2002-10-04 2002-10-04 Metodo e circuito di amplificazione con pre-enfasi.

Publications (1)

Publication Number Publication Date
ITVA20020050A1 true ITVA20020050A1 (it) 2004-04-05

Family

ID=32652493

Family Applications (1)

Application Number Title Priority Date Filing Date
IT000050A ITVA20020050A1 (it) 2002-10-04 2002-10-04 Metodo e circuito di amplificazione con pre-enfasi.

Country Status (2)

Country Link
US (1) US6853220B2 (it)
IT (1) ITVA20020050A1 (it)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE354207T1 (de) * 2002-12-23 2007-03-15 Cit Alcatel Lvds-treiber mit vorverzerrung
US6940302B1 (en) * 2003-01-07 2005-09-06 Altera Corporation Integrated circuit output driver circuitry with programmable preemphasis
US7307446B1 (en) 2003-01-07 2007-12-11 Altera Corporation Integrated circuit output driver circuitry with programmable preemphasis
US7336547B2 (en) * 2004-02-27 2008-02-26 Micron Technology, Inc. Memory device having conditioning output data
US7061283B1 (en) * 2004-04-30 2006-06-13 Xilinx, Inc. Differential clock driver circuit
US7092312B2 (en) * 2004-08-03 2006-08-15 Micron Technology, Inc. Pre-emphasis for strobe signals in memory device
WO2006033638A1 (en) * 2004-09-22 2006-03-30 Infineon Technologies Ag. A digital voltage level shifter
JP4756965B2 (ja) * 2005-09-13 2011-08-24 ルネサスエレクトロニクス株式会社 出力バッファ回路
US7391251B1 (en) * 2005-11-07 2008-06-24 Pericom Semiconductor Corp. Pre-emphasis and de-emphasis emulation and wave shaping using a programmable delay without using a clock
US8115515B2 (en) * 2006-03-28 2012-02-14 Honeywell International Inc. Radiation hardened differential output buffer
US7375573B2 (en) * 2006-05-25 2008-05-20 Micron Technology, Inc. De-emphasis system and method for coupling digital signals through capacitively loaded lines
US7352211B1 (en) * 2006-08-22 2008-04-01 International Business Machines Corporation Signal history controlled slew-rate transmission method and bus interface transmitter
US7514991B2 (en) * 2007-06-12 2009-04-07 Micron Technology, Inc. High accuracy current mode duty cycle and phase placement sampling circuit
US7956645B2 (en) * 2008-03-17 2011-06-07 Broadcom Corporation Low power high-speed output driver
US8952725B2 (en) 2011-02-24 2015-02-10 Via Technologies, Inc. Low voltage differential signal driving circuit and electronic device compatible with wired transmission
US8368426B2 (en) * 2011-02-24 2013-02-05 Via Technologies, Inc. Low voltage differential signal driving circuit and digital signal transmitter
US9838016B1 (en) * 2016-02-23 2017-12-05 Integrated Device Technology, Inc. Adaptive high-speed current-steering logic (HCSL) drivers
US10498212B2 (en) * 2017-05-26 2019-12-03 Dialog Semiconductor (Uk) Limited Gate driver
CN107612527A (zh) * 2017-07-14 2018-01-19 成都华微电子科技有限公司 差分时钟驱动电路
US10148261B1 (en) * 2017-12-18 2018-12-04 Nxp Usa, Inc. On chip adaptive jitter reduction hardware method for LVDS systems
CN115454190A (zh) * 2022-09-30 2022-12-09 湖北三江航天万峰科技发展有限公司 一种lvds驱动电路

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2305082B (en) * 1995-09-06 1999-10-06 At & T Corp Wave shaping transmit circuit
TW556145B (en) * 2000-01-11 2003-10-01 Toshiba Corp Flat display apparatus having scan-line driving circuit and its driving method
IT1319120B1 (it) * 2000-11-22 2003-09-23 St Microelectronics Srl Metodo di controllo commutazione di un traslatore di livello erelativo traslatore di livello perfezionato ed autocontrollato,in
US6566911B1 (en) * 2001-05-18 2003-05-20 Pixelworks, Inc. Multiple-mode CMOS I/O cell
US6590432B1 (en) * 2002-09-26 2003-07-08 Pericom Semiconductor Corp. Low-voltage differential driver with opened eye pattern

Also Published As

Publication number Publication date
US20040124891A1 (en) 2004-07-01
US6853220B2 (en) 2005-02-08

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