AT324428B - Verfahren zur herstellung einer halbleiteranordnung mit wenigstens einem feldeffekttransistor mit isolierter torelektrode - Google Patents

Verfahren zur herstellung einer halbleiteranordnung mit wenigstens einem feldeffekttransistor mit isolierter torelektrode

Info

Publication number
AT324428B
AT324428B AT470171A AT470171A AT324428B AT 324428 B AT324428 B AT 324428B AT 470171 A AT470171 A AT 470171A AT 470171 A AT470171 A AT 470171A AT 324428 B AT324428 B AT 324428B
Authority
AT
Austria
Prior art keywords
producing
gate electrode
field effect
effect transistor
insulated gate
Prior art date
Application number
AT470171A
Other languages
English (en)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Application granted granted Critical
Publication of AT324428B publication Critical patent/AT324428B/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76221—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO with a plurality of successive local oxidation steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/053—Field effect transistors fets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/103—Mask, dual function, e.g. diffusion and oxidation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/105—Masks, metal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
AT470171A 1970-06-04 1971-06-01 Verfahren zur herstellung einer halbleiteranordnung mit wenigstens einem feldeffekttransistor mit isolierter torelektrode AT324428B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7008101.A NL164424C (nl) 1970-06-04 1970-06-04 Werkwijze voor het vervaardigen van een veldeffect- transistor met een geisoleerde stuurelektrode, waarbij een door een tegen oxydatie maskerende laag vrijgelaten deel van het oppervlak van een siliciumlichaam aan een oxydatiebehandeling wordt onderworpen ter verkrijging van een althans gedeeltelijk in het siliciumlichaam verzonken siliciumoxydelaag.

Publications (1)

Publication Number Publication Date
AT324428B true AT324428B (de) 1975-08-25

Family

ID=19810238

Family Applications (1)

Application Number Title Priority Date Filing Date
AT470171A AT324428B (de) 1970-06-04 1971-06-01 Verfahren zur herstellung einer halbleiteranordnung mit wenigstens einem feldeffekttransistor mit isolierter torelektrode

Country Status (12)

Country Link
US (1) US3752711A (de)
JP (1) JPS507425B1 (de)
AT (1) AT324428B (de)
BE (1) BE768076A (de)
CA (1) CA920284A (de)
CH (1) CH524251A (de)
DE (1) DE2125303C3 (de)
ES (1) ES391843A1 (de)
FR (1) FR2094036B1 (de)
GB (1) GB1348391A (de)
NL (1) NL164424C (de)
SE (1) SE361557B (de)

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US7038290B1 (en) 1965-09-28 2006-05-02 Li Chou H Integrated circuit device
US6979877B1 (en) 1965-09-28 2005-12-27 Li Chou H Solid-state device
US6849918B1 (en) 1965-09-28 2005-02-01 Chou H. Li Miniaturized dielectrically isolated solid state device
US3921283A (en) * 1971-06-08 1975-11-25 Philips Corp Semiconductor device and method of manufacturing the device
US4011653A (en) * 1971-08-23 1977-03-15 Tokyo Shibaura Electric Co., Ltd. Method for manufacturing a semiconductor integrated circuit including an insulating gate type semiconductor transistor
US3892609A (en) * 1971-10-07 1975-07-01 Hughes Aircraft Co Production of mis integrated devices with high inversion voltage to threshold voltage ratios
NL161305C (nl) * 1971-11-20 1980-01-15 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderin- richting.
DE2251823A1 (de) * 1972-10-21 1974-05-02 Itt Ind Gmbh Deutsche Halbleiterelement und herstellungsverfahren
US3853633A (en) * 1972-12-04 1974-12-10 Motorola Inc Method of making a semi planar insulated gate field-effect transistor device with implanted field
CA1001771A (en) * 1973-01-15 1976-12-14 Fairchild Camera And Instrument Corporation Method of mos transistor manufacture and resulting structure
US3975221A (en) * 1973-08-29 1976-08-17 American Micro-Systems, Inc. Low capacitance V groove MOS NOR gate and method of manufacture
US3924265A (en) * 1973-08-29 1975-12-02 American Micro Syst Low capacitance V groove MOS NOR gate and method of manufacture
JPS5214594B2 (de) * 1973-10-17 1977-04-22
US3890632A (en) * 1973-12-03 1975-06-17 Rca Corp Stabilized semiconductor devices and method of making same
JPS5624371B2 (de) * 1974-02-13 1981-06-05
US3979765A (en) * 1974-03-07 1976-09-07 Signetics Corporation Silicon gate MOS device and method
US3899363A (en) * 1974-06-28 1975-08-12 Ibm Method and device for reducing sidewall conduction in recessed oxide pet arrays
JPS51114079A (en) * 1975-03-31 1976-10-07 Fujitsu Ltd Construction of semiconductor memory device
US4047285A (en) * 1975-05-08 1977-09-13 National Semiconductor Corporation Self-aligned CMOS for bulk silicon and insulating substrate device
US3997379A (en) * 1975-06-20 1976-12-14 Rca Corporation Diffusion of conductivity modifiers into a semiconductor body
US3978577A (en) * 1975-06-30 1976-09-07 International Business Machines Corporation Fixed and variable threshold N-channel MNOSFET integration technique
JPS5232680A (en) * 1975-09-08 1977-03-12 Toko Inc Manufacturing process of insulation gate-type field-effect semiconduct or device
US4011105A (en) * 1975-09-15 1977-03-08 Mos Technology, Inc. Field inversion control for n-channel device integrated circuits
US4033026A (en) * 1975-12-16 1977-07-05 Intel Corporation High density/high speed MOS process and device
FR2351502A1 (fr) * 1976-05-14 1977-12-09 Ibm Procede de fabrication de transistors a effet de champ a porte en silicium polycristallin auto-alignee avec les regions source et drain ainsi qu'avec les regions d'isolation de champ encastrees
US4246692A (en) * 1976-05-28 1981-01-27 Texas Instruments Incorporated MOS Integrated circuits with implanted resistor elements
US4087902A (en) * 1976-06-23 1978-05-09 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Field effect transistor and method of construction thereof
US4114255A (en) * 1976-08-16 1978-09-19 Intel Corporation Floating gate storage device and method of fabrication
US4135289A (en) * 1977-08-23 1979-01-23 Bell Telephone Laboratories, Incorporated Method for producing a buried junction memory device
US4268847A (en) * 1977-09-16 1981-05-19 Nippon Electric Co., Ltd. Semiconductor device having an insulated gate type field effect transistor and method for producing the same
US4144101A (en) * 1978-06-05 1979-03-13 International Business Machines Corporation Process for providing self-aligned doping regions by ion-implantation and lift-off
US4182636A (en) * 1978-06-30 1980-01-08 International Business Machines Corporation Method of fabricating self-aligned contact vias
US4219925A (en) * 1978-09-01 1980-09-02 Teletype Corporation Method of manufacturing a device in a silicon wafer
US4277882A (en) * 1978-12-04 1981-07-14 Fairchild Camera And Instrument Corporation Method of producing a metal-semiconductor field-effect transistor
US4288910A (en) * 1979-04-16 1981-09-15 Teletype Corporation Method of manufacturing a semiconductor device
NL7903158A (nl) * 1979-04-23 1980-10-27 Philips Nv Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.
US4490736A (en) * 1979-04-23 1984-12-25 Texas Instruments Incorporated Semiconductor device and method of making
FR2462781A1 (fr) * 1979-07-27 1981-02-13 Thomson Csf Transistor a effet de champ a grille schottky autoalignee et son procede de fabrication
US4441941A (en) * 1980-03-06 1984-04-10 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing a semiconductor device employing element isolation using insulating materials
US4335502A (en) * 1980-10-01 1982-06-22 Standard Microsystems Corporation Method for manufacturing metal-oxide silicon devices
JPS59132136A (ja) * 1983-01-19 1984-07-30 Hitachi Ltd 半導体装置の製造方法
US4551910A (en) * 1984-11-27 1985-11-12 Intel Corporation MOS Isolation processing
DE3572086D1 (en) * 1984-12-13 1989-09-07 Siemens Ag Method of producing an isolation separating the active regions of a highly integrated cmos circuit
US5026656A (en) * 1988-02-01 1991-06-25 Texas Instruments Incorporated MOS transistor with improved radiation hardness
US5019526A (en) * 1988-09-26 1991-05-28 Nippondenso Co., Ltd. Method of manufacturing a semiconductor device having a plurality of elements
US4968641A (en) * 1989-06-22 1990-11-06 Alexander Kalnitsky Method for formation of an isolating oxide layer
JPH0555566A (ja) * 1991-08-28 1993-03-05 Nec Corp 半導体装置
US20040144999A1 (en) * 1995-06-07 2004-07-29 Li Chou H. Integrated circuit device
KR100197656B1 (ko) * 1995-12-29 1999-07-01 김영환 반도체 에스.오.아이.소자의 제조방법

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI5A (fi) * 1844-02-28 Nytt slags spelkort
US3440500A (en) * 1966-09-26 1969-04-22 Itt High frequency field effect transistor

Also Published As

Publication number Publication date
NL7008101A (de) 1971-12-07
NL164424B (nl) 1980-07-15
FR2094036B1 (de) 1974-10-11
CA920284A (en) 1973-01-30
CH524251A (de) 1972-06-15
DE2125303A1 (de) 1971-12-16
DE2125303B2 (de) 1978-07-20
SE361557B (de) 1973-11-05
DE2125303C3 (de) 1979-04-05
GB1348391A (en) 1974-03-13
NL164424C (nl) 1980-12-15
ES391843A1 (es) 1973-07-01
FR2094036A1 (de) 1972-02-04
US3752711A (en) 1973-08-14
JPS507425B1 (de) 1975-03-25
BE768076A (fr) 1971-12-03

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Legal Events

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