CH514937A - Halbleiteranordnung mit einem Feldeffekttransistor mit isolierter Torelektrode - Google Patents

Halbleiteranordnung mit einem Feldeffekttransistor mit isolierter Torelektrode

Info

Publication number
CH514937A
CH514937A CH957070A CH957070A CH514937A CH 514937 A CH514937 A CH 514937A CH 957070 A CH957070 A CH 957070A CH 957070 A CH957070 A CH 957070A CH 514937 A CH514937 A CH 514937A
Authority
CH
Switzerland
Prior art keywords
gate electrode
field effect
effect transistor
insulated gate
semiconductor arrangement
Prior art date
Application number
CH957070A
Other languages
English (en)
Inventor
Brand Teunis
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH514937A publication Critical patent/CH514937A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
CH957070A 1969-06-26 1970-06-23 Halbleiteranordnung mit einem Feldeffekttransistor mit isolierter Torelektrode CH514937A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL6909788A NL165005C (nl) 1969-06-26 1969-06-26 Halfgeleiderinrichting bevattende veldeffecttransistors met geisoleerde stuurelektrode en werkwijze voor het vervaardigen van de halfgeleiderinrichting.

Publications (1)

Publication Number Publication Date
CH514937A true CH514937A (de) 1971-10-31

Family

ID=19807307

Family Applications (1)

Application Number Title Priority Date Filing Date
CH957070A CH514937A (de) 1969-06-26 1970-06-23 Halbleiteranordnung mit einem Feldeffekttransistor mit isolierter Torelektrode

Country Status (8)

Country Link
AT (1) AT336080B (de)
BE (1) BE752480A (de)
CH (1) CH514937A (de)
DE (1) DE2029058C2 (de)
FR (1) FR2047958B1 (de)
GB (1) GB1325332A (de)
NL (1) NL165005C (de)
SE (1) SE365905B (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5528229B1 (de) * 1971-03-19 1980-07-26
US3728161A (en) * 1971-12-28 1973-04-17 Bell Telephone Labor Inc Integrated circuits with ion implanted chan stops
JPS559834B2 (de) * 1972-03-31 1980-03-12
JPS551189A (en) * 1979-05-07 1980-01-07 Nec Corp Semiconductor device
JPS55102274A (en) * 1980-01-25 1980-08-05 Agency Of Ind Science & Technol Insulated gate field effect transistor
GB2123605A (en) * 1982-06-22 1984-02-01 Standard Microsyst Smc MOS integrated circuit structure and method for its fabrication

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE636316A (de) * 1962-08-23 1900-01-01
US3400383A (en) * 1964-08-05 1968-09-03 Texas Instruments Inc Trainable decision system and adaptive memory element
US3417464A (en) * 1965-05-21 1968-12-24 Ibm Method for fabricating insulated-gate field-effect transistors
GB1145092A (en) * 1965-06-09 1969-03-12 Mullard Ltd Improvements in insulated gate field effect semiconductor devices
GB1155578A (en) * 1965-10-08 1969-06-18 Sony Corp Field Effect Transistor
US3440502A (en) * 1966-07-05 1969-04-22 Westinghouse Electric Corp Insulated gate field effect transistor structure with reduced current leakage
GB1131675A (en) * 1966-07-11 1968-10-23 Hitachi Ltd Semiconductor device
US3440500A (en) * 1966-09-26 1969-04-22 Itt High frequency field effect transistor
GB1203298A (en) * 1967-01-10 1970-08-26 Hewlett Packard Co Mis integrated circuit and method of fabricating the same

Also Published As

Publication number Publication date
DE2029058C2 (de) 1983-06-23
NL6909788A (de) 1970-12-29
NL165005B (nl) 1980-09-15
BE752480A (fr) 1970-12-24
AT336080B (de) 1977-04-12
FR2047958B1 (de) 1975-09-26
FR2047958A1 (de) 1971-03-19
NL165005C (nl) 1981-02-16
ATA564470A (de) 1976-08-15
GB1325332A (en) 1973-08-01
SE365905B (de) 1974-04-01
DE2029058A1 (de) 1971-01-07

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Legal Events

Date Code Title Description
PL Patent ceased