WO2024171509A1 - コンデンサ - Google Patents

コンデンサ Download PDF

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Publication number
WO2024171509A1
WO2024171509A1 PCT/JP2023/036362 JP2023036362W WO2024171509A1 WO 2024171509 A1 WO2024171509 A1 WO 2024171509A1 JP 2023036362 W JP2023036362 W JP 2023036362W WO 2024171509 A1 WO2024171509 A1 WO 2024171509A1
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WIPO (PCT)
Prior art keywords
capacitance forming
forming portion
external connection
dielectric film
conductive film
Prior art date
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Ceased
Application number
PCT/JP2023/036362
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English (en)
French (fr)
Japanese (ja)
Inventor
大祐 湯淺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to CN202380091893.2A priority Critical patent/CN120500733A/zh
Priority to JP2024509096A priority patent/JP7571916B1/ja
Publication of WO2024171509A1 publication Critical patent/WO2024171509A1/ja
Priority to US19/238,663 priority patent/US20250308789A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/008—Selection of materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/012—Form of non-self-supporting electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/33—Thin- or thick-film capacitors (thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/38—Multiple capacitors, i.e. structural combinations of fixed capacitors

Definitions

  • the present invention relates to a capacitor having a capacitance forming portion made of a metal porous body, a dielectric film, and a conductive film.
  • Patent Document 1 discloses a capacitor in which a capacitance forming portion is provided by a metal porous body, a dielectric film covering the surface of the metal porous body, and a conductive film covering the dielectric film.
  • the metal porous body is composed of a sintered body of metal particles, and both the dielectric layer and the conductive film are formed by the atomic layer deposition (ALD) method.
  • the capacitor disclosed in the above publication is made up of a single capacitance-forming part, so if an electric field concentrates in this single capacitance-forming part, it will short-circuit, immediately impairing its function as a capacitor.
  • the present invention has therefore been made to solve the above-mentioned problems, and aims to improve the reliability after mounting in a capacitor having a capacitance forming portion made of a metal porous body, a dielectric film, and a conductive film.
  • the capacitor according to the present invention comprises an insulating substrate, a capacitance forming portion, and first and second external connection wiring.
  • the insulating substrate has a first main surface and a second main surface located opposite the first main surface, and the capacitance forming portion is arranged to face the first main surface.
  • the first and second external connection wiring are connected to the capacitance forming portion.
  • the capacitance forming portion includes a conductive metal porous body, a dielectric film covering the surface of the metal porous body, and a conductive film covering the dielectric film.
  • the capacitance forming portion includes a first capacitance forming portion defined by the first conductive film, a first dielectric film that is the dielectric film in a portion corresponding to the first conductive film, and a first porous metal body that is the porous metal body in a portion corresponding to the first dielectric film, and a second capacitance forming portion defined by the second conductive film, a second dielectric film that is the dielectric film in a portion corresponding to the second conductive film, and a second porous metal body that is the porous metal body in a portion corresponding to the second dielectric film.
  • the second capacitance forming portion is located on the opposite side to the first external connection wiring side as viewed from the first capacitance forming portion.
  • the second capacitance forming portion is electrically connected to the first external connection wiring via the first capacitance forming portion
  • the first capacitance forming portion is electrically connected to the second external connection wiring via the second capacitance forming portion, so that at least the first capacitance forming portion and the second capacitance forming portion are electrically connected in series between the first external connection wiring and the second external connection wiring.
  • the present invention improves the reliability of a capacitor having a capacitance forming portion made of a metal porous body, a dielectric film, and a conductive film after mounting.
  • FIG. 1A and 1B are a schematic front view and a schematic plan view of a capacitor in accordance with a first embodiment
  • FIG. 2 is a schematic cross-sectional view of the capacitor shown in FIG. 3 is a schematic cross-sectional view showing an enlarged view of the vicinity of a first main surface of the insulating substrate shown in FIG. 2.
  • 3 is an enlarged cross-sectional view of a main portion of region III shown in FIG. 2 .
  • 3 is an enlarged cross-sectional view of a main portion of region V shown in FIG. 2 .
  • 4 is a flow diagram showing a method for manufacturing a capacitor according to the first embodiment.
  • FIG. 7 is a schematic cross-sectional view showing a state after step S4 of the manufacturing flow shown in FIG. 6 is completed.
  • 7 is a schematic cross-sectional view for explaining step S5 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S6 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S7 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S8 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S9 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S10 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S11 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S12 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S13 in the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S14 in the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S15 of the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S16 in the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S17 in the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S18 in the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S19 in the manufacturing flow shown in FIG. 6.
  • 7 is a schematic cross-sectional view for explaining step S20 of the manufacturing flow shown in FIG. 6.
  • FIG. 11 is a schematic cross-sectional view of a capacitor according to a second embodiment.
  • FIG. 11 is a schematic cross-sectional view of a capacitor according to a third embodiment.
  • 1 is a graph showing the results of verification test 1.
  • 13 is a graph showing the results of verification test 2.
  • Fig. 1(A) is a schematic front view of a capacitor according to embodiment 1
  • Fig. 1(B) is a schematic plan view of the capacitor as viewed from the direction of arrow IB shown in Fig. 1(A).
  • Fig. 2 is a schematic cross-sectional view of the capacitor taken along line II-II shown in Fig. 1(B).
  • Fig. 3 is a schematic cross-sectional view enlarging the vicinity of the first main surface of the insulating substrate shown in Fig. 2.
  • Fig. 4 is an enlarged cross-sectional view of a main portion of region IIII shown in Fig. 2.
  • Fig. 5 is an enlarged cross-sectional view of a main portion of region V shown in Fig. 2.
  • capacitor 1A has a flat, roughly rectangular parallelepiped outer shape, and is a so-called surface-mounted electronic component whose bottom surface is configured as a mounting surface for a wiring board or the like.
  • Capacitor 1A mainly comprises an insulating substrate 10, a capacitance forming portion 20, and a sealing portion 30. Of these, capacitance forming portion 20 is provided so as to face insulating substrate 10. Capacitance forming portion 20 is located inside capacitor 1A by being sealed by insulating substrate 10 and sealing portion 30 provided on insulating substrate 10.
  • the insulating substrate 10 is provided with a first via conductor 13 and a second via conductor 14, a plurality of metal wall portions 15, a first bump 16 and a second bump 17, and a plurality of partition portions 18.
  • the first via conductor 13, the second via conductor 14, the first bump 16, and the second bump 17 constitute a pair of external connection wirings as lead-out wirings for electrically connecting the capacitance forming portion 20 located inside the capacitor 1A to an external circuit.
  • the pair of external connection wirings includes a first external connection wiring as an anode and a second external connection wiring as a cathode.
  • the insulating substrate 10 is a flat plate-shaped member having a first main surface 10a and a second main surface 10b located on the opposite side to the first main surface 10a.
  • a substrate having electrical insulation properties and preferably a substrate mainly composed of an inorganic material. More specifically, as the insulating substrate 10, a substrate mainly composed of any of Si, Al2O3 , ZrO2 , BN, Si3N4 , AlN , MgO, Mg2SiO4 , BaTiO3 , SrTiO3 , and CaTiO3 can be used.
  • the thickness and size of the insulating substrate 10 are not particularly limited, but it is preferable to use an alumina substrate that is rectangular in plan view, for example, with a thickness of 5 ⁇ m to 75 ⁇ m and a side length of 500 ⁇ m to 2000 ⁇ m.
  • the insulating substrate 10 is provided with a first through hole 11, which penetrates the insulating substrate 10 from the first main surface 10a to the second main surface 10b.
  • the first through hole 11 is filled with a first via conductor 13.
  • the shape of the first via conductor 13 is, for example, approximately cylindrical.
  • the insulating substrate 10 is provided with a second through hole 12, which penetrates the insulating substrate 10 from the first main surface 10a to the second main surface 10b.
  • the second through hole 12 is filled with a second via conductor 14.
  • the shape of the second via conductor 14 is, for example, approximately cylindrical.
  • the first via conductor 13 constitutes a part of the first external connection wiring described above.
  • the second via conductor 14 constitutes a part of the second external connection wiring described above.
  • the first via conductor 13 and the second via conductor 14 respectively constitute the first external connection wiring and the second external connection wiring, which have different polarities.
  • the first via conductor 13 and the second via conductor 14 are both provided within the area in which the capacitance forming portion 20 is arranged.
  • the first via conductor 13 and the second via conductor 14 can be made of various wiring materials, but are preferably made of a metal material with particularly high electrical conductivity.
  • the material of the first via conductor 13 and the second via conductor 14 can be, for example, a metal material whose main material is any of Ni, Ag, Cu, Au, Pt, Mo, and W.
  • the material of the first via conductor 13 and the second via conductor 14 can be changed appropriately according to the mounting environment of the capacitor 1A according to this embodiment, and the material of the first via conductor 13 and the material of the second via conductor 14 do not necessarily have to be the same.
  • the first via conductor 13 and the second via conductor 14 are made of Ni.
  • the axial length and size of the first via conductor 13 and the second via conductor 14 are not particularly limited and are set appropriately according to the thickness and size of the insulating substrate 10.
  • the axial length of the first via conductor 13 and the second via conductor 14 is preferably, for example, 5 ⁇ m or more and 75 ⁇ m or less, and their diameter is preferably, for example, 15 ⁇ m or more and 150 ⁇ m or less.
  • the first via conductor 13 and the second via conductor 14 are made of Ni and have an axial length of 75 ⁇ m and a diameter of 150 ⁇ m.
  • the distance between the first via conductor 13 and the second via conductor 14 is 150 ⁇ m.
  • a first bump 16 is provided on the second main surface 10b of the insulating substrate 10 so as to cover the first via conductor 13.
  • the first bump 16 serves as a bonding material for mounting the capacitor 1A as a surface mount electronic component on a wiring board or the like and for electrically connecting the capacitance forming portion 20 of the capacitor 1A to an external circuit, and is provided so as to protrude from the second main surface 10b of the insulating substrate 10.
  • the shape of the first bump 16 is approximately semispherical.
  • a second bump 17 is provided on the second main surface 10b of the insulating substrate 10 so as to cover the second via conductor 14.
  • the second bump 17 serves as a bonding material for mounting the capacitor 1A as a surface mount electronic component on a wiring board or the like and for electrically connecting the capacitance forming portion 20 of the capacitor 1A to an external circuit, and is provided so as to protrude from the second main surface 10b of the insulating substrate 10.
  • the shape of the second bump 17 is approximately semispherical.
  • the first bump 16 constitutes part of the first external connection wiring described above.
  • the second bump 17 constitutes part of the second external connection wiring described above.
  • the first bump 16 and the second bump 17 respectively constitute the first external connection wiring and the second external connection wiring, which have different polarities.
  • the first bump 16 and the second bump 17 can be made of various wiring materials, but are preferably made of a metal material with particularly high electrical conductivity.
  • the material of the first bump 16 and the second bump 17 can be a metal material whose main component is, for example, Ni, Ag, Cu, Au, or Sn. In this embodiment, the first bump 16 and the second bump 17 are made of Au.
  • the size of the first bump 16 and the second bump 17 is not particularly limited and is set appropriately according to the size of the first via conductor 13 and the second via conductor 14.
  • the first external connection wiring serving as the anode of the pair of external connection wirings is composed of the first via conductor 13 and the first bump 16
  • the second external connection wiring serving as the cathode of the pair of external connection wirings is composed of the second via conductor 14 and the second bump 17.
  • the insulating substrate 10 is provided with a plurality of metal wall portions 15 extending from the first main surface 10a toward the capacitance forming portion 20. When viewed along the normal direction of the first main surface 10a, each of the plurality of metal wall portions 15 is located between the first external connection wiring and the second external connection wiring.
  • the left-right direction in FIG. 2 is referred to as the first direction
  • the up-down direction in FIG. 2 is referred to as the second direction
  • the direction perpendicular to both the first and second directions and perpendicular to the paper surface in FIG. 2 is referred to as the third direction.
  • the first direction coincides with the direction connecting the first external connection wiring and the second external connection wiring
  • the second direction coincides with the direction parallel to the normal direction of the first main surface 10a.
  • the multiple metal wall portions 15 extend along both the second direction and the third direction. In this embodiment, two metal wall portions 15 extend linearly along both the second direction and the third direction.
  • the metal wall portion 15 does not necessarily have to extend linearly along the second direction. That is, the metal wall portion 15 may be erected from the first main surface 10a in a direction that is considerably inclined with respect to the second direction. Furthermore, the metal wall portion 15 does not necessarily have to extend linearly along the third direction. That is, as long as the capacitance forming portion 20 can be divided into a portion located on the first external connection wiring side and a portion located further on the second external connection wiring side, the metal wall portion 15 may extend, for example, in a bent or curved shape.
  • the dimension (thickness) of the metal wall portion 15 in the first direction is preferably, for example, 5 ⁇ m or more and 150 ⁇ m or less, and more preferably, 5 ⁇ m or more and 75 ⁇ m or less. This makes it possible to effectively suppress warping that may occur in the insulating substrate 10, which will be described later.
  • the dimension (height) of the metal wall portion 15 in the second direction is larger than the dimension (height) of the capacitance forming portion 20 in the same direction
  • the dimension (width) of the metal wall portion 15 in the third direction is larger than the dimension (width) of the capacitance forming portion 20 in the same direction. This also makes it possible to effectively suppress warping that may occur in the insulating substrate 10.
  • the material of the metal wall portion 15 can be, for example, a metal material whose main component is any of Ni, Cu, Ru, Al, W, Ti, Ag, Au, Ta, and Nb.
  • the metal wall portion 15 may also be made of an alloy material whose main components are two or more selected from these metal materials. In this embodiment, the metal wall portion 15 is made of Cu.
  • the insulating substrate 10 further includes a plurality of partition walls 18 extending from the first main surface 10a toward the capacitance forming portion 20. When viewed along the normal direction of the first main surface 10a, each of the plurality of partition walls 18 is located between the first external connection wiring and the second external connection wiring.
  • the partitions 18 extend along both the second direction and the third direction. In this embodiment, two partitions 18 extend linearly along both the second direction and the third direction.
  • the capacitance forming portion 20 is divided by the partition portion 18 configured in this manner, so that the capacitance forming portion 20 includes a portion located on the first external connection wiring side and a portion located on the second external connection wiring side, which makes it possible to improve the withstand voltage of the capacitor 1A, the details of which will be described later.
  • the partition portion 18 does not necessarily have to extend linearly along the second direction. That is, the partition portion 18 may be erected from the first main surface 10a in a direction that is considerably inclined with respect to the second direction. Furthermore, the partition portion 18 does not necessarily have to extend linearly along the third direction. That is, as long as the capacitance forming portion 20 can be divided into a portion located on the first external connection wiring side and a portion located further on the second external connection wiring side, the partition portion 18 may extend, for example, in a bent or curved shape.
  • the dimension (thickness) of the partition 18 in the first direction is preferably, for example, 5 ⁇ m or more and 150 ⁇ m or less, and more preferably 5 ⁇ m or more and 75 ⁇ m or less. This not only reliably prevents the conductive films 23 of the pair of capacitance forming parts separated by the partition 18 from being unintentionally formed continuously with each other, but also effectively suppresses warping that may occur in the insulating substrate 10.
  • the dimension (height) of the partition portion 18 in the second direction is preferably larger than the dimension (height) of the capacitance forming portion 20 in the same direction
  • the dimension (width) of the partition portion 18 in the third direction is preferably larger than the dimension (width) of the capacitance forming portion 20 in the same direction.
  • the partition wall 18 is preferably made of at least some of the materials contained in the metal porous body 21 described below.
  • the material of the partition wall 18 may be, for example, a metal material whose main component is any of Ni, Cu, Ru, Al, W, Ti, Ag, Au, Ta, and Nb.
  • the partition wall 18 may also be made of an alloy material whose main components are two or more selected from these metal materials. In this embodiment, the partition wall 18 is made of Ni.
  • the capacitor 1A has two metal wall portions 15 and two partition portions 18.
  • the two metal wall portions 15 the one located on the first external connection wiring side is referred to as metal wall portion 15A, and the one located closer to the second external connection wiring side than metal wall portion 15A is referred to as metal wall portion 15B.
  • the two partition portions 18 the one located closer to the first external connection wiring side is referred to as partition portion 18A, and the one located closer to the second external connection wiring side than partition portion 18A is referred to as partition portion 18B.
  • metal wall portions 15 and two partition portions 18 are arranged in the following order from the first external connection wiring side toward the second external connection wiring side (i.e., from the right side to the left side in FIG. 2): metal wall portion 15A, partition portion 18A, metal wall portion 15B, and partition portion 18B.
  • This configuration makes it possible to divide the capacitance forming portion 20 into a plurality of capacitance forming portions, but this will be described in more detail later.
  • the capacitance forming portion 20 is disposed opposite the first main surface 10a of the insulating substrate 10, and includes a conductive metal porous body 21 having a plurality of fine holes therein, a dielectric film 22 covering the surface of the metal porous body 21, and a conductive film 23 further covering the surface of the dielectric film 22.
  • a state in which the capacitance forming portion 20 is only slightly bonded to the insulating substrate 10 means a state in which a portion of the capacitance forming portion 20 is bonded to the insulating substrate 10 at a predetermined ratio or less.
  • the state in which the capacitance forming portion 20 is only slightly bonded to the insulating substrate 10 means that, when looking at an arbitrary region on the first main surface 10a of the insulating substrate 10 in a cross section perpendicular to the extending direction of the first main surface 10a of the insulating substrate 10 as shown in FIG. 3, the sum of the lengths of the line segments parallel to the first main surface 10a in the portion where the metal porous body 21 is directly bonded to the insulating substrate 10 or indirectly bonded via the dielectric film 22 or conductive film 23 in the arbitrary region (i.e., the line segment length b1 + b2 in the example shown in FIG. 3) is 30% or less of the total line segment length in the arbitrary region of the first main surface 10a (i.e., the line segment length a in the example shown in FIG. 3).
  • the metal porous body 21 can be made of various conductive metal materials, but is preferably made of a metal material whose main component is any of Ni, Mo, W, Al, Ti, Ta, Nb, Cu, Pt, Au, and Ag.
  • the metal porous body 21 may also be made of an alloy material whose main components are two or more selected from these metal materials. In this embodiment, the metal porous body 21 is made of Ni.
  • the thickness and size of the metal porous body 21 are not particularly limited, and the size is set appropriately according to the size of the insulating substrate 10.
  • the metal porous body 21 used is 1000 ⁇ m square and 200 ⁇ m thick before the capacitance forming portion 20 is partitioned, as described below.
  • the metal porous body 21 is preferably composed of a sintered body of metal particles.
  • the metal particles may be of various shapes, such as spherical, elliptical, flat, plate-like, and needle-like.
  • the particle size of the metal particles is not particularly limited, but the average particle size is preferably 600 nm or less, and more preferably 20 nm or more and 500 nm or less.
  • the second external connection wiring serving as the cathode described above is connected to the capacitance forming portion 20 via the second via conductor 14.
  • the dielectric film 22 covers the surface of the metal porous body 21 as described above. More specifically, the dielectric film 22 not only covers the surface of the metal porous body 21 in the portion located on the outermost side of the capacitance forming section 20, but also covers the surface of the metal porous body 21 in the portion located inside the capacitance forming section 20 that is defined by the above-mentioned fine pores that are not closed by the metal porous body itself. The dielectric film 22 also covers the surface of the partition section 18 in the portion that is not joined to the metal porous body 21.
  • the dielectric film 22 can be made of various insulating materials, for example, metal oxides such as AlOx , SiOx , HfOx, TiOx , TaOx , ZrOx , SiAlOx , HfAlOx , ZrAlOx , AlTiOx , SrTiOx , HfSiOx, ZrSiOx , TiZrOx, TiZrOx , TiZrWOx , SrTiOx, BaTiOx , PbTiOx, BaSrTiOx , BaCaTiOx , metal nitrides such as AlNx , SiNx , AlScNx , AlOxNy , SiOxNy , HfOxNy , , SiC x O y N z , or other metal oxynitrides.
  • metal oxides such as AlOx , SiOx ,
  • the dielectric film 22 from any of AlO x (for example, Al 2 O 3 ), SiO x (for example, SiO 2 ), HfO x , TiO x , SiAlO x , HfAlO x , ZrAlO x , HfSiO x , and ZrSiO x .
  • AlO x for example, Al 2 O 3
  • SiO x for example, SiO 2
  • HfO x TiO x
  • SiAlO x for example, SiO 2
  • HfAlO x TiO x
  • the dielectric film 22 can be preferably formed by a gas phase method, such as vacuum deposition, chemical vapor deposition (CVD), sputtering, atomic layer deposition (ALD), pulsed laser deposition (PLD), or a method using a supercritical fluid, and is particularly preferably formed by the ALD method.
  • a gas phase method such as vacuum deposition, chemical vapor deposition (CVD), sputtering, atomic layer deposition (ALD), pulsed laser deposition (PLD), or a method using a supercritical fluid, and is particularly preferably formed by the ALD method.
  • the thickness of the dielectric film 22 is not particularly limited, but is preferably 3 nm or more and 100 nm or less, and more preferably 5 nm or more and 50 nm or less. By making the thickness of the dielectric film 22 3 nm or more, the withstand voltage of the capacitor 1A can be improved.
  • the conductive film 23 covers the surface of the dielectric film 22. More specifically, the conductive film 23 not only covers the surface of the dielectric film 22 in the portion located on the outermost side of the capacitance forming section 20, but also covers the surface of the dielectric film 22 in the portion located inside the capacitance forming section 20.
  • the conductive film 23 does not cover the surface of the dielectric film 22 in the portion covering the partition 18 or in the portion located in the vicinity thereof. This configures the conductive film 23 in the portion on the first external connection wiring side as viewed from the partition 18 and the conductive film 23 in the portion on the second external connection wiring side as viewed from the partition 18 to be discontinuous with each other. This configuration makes it possible to improve the withstand voltage of the capacitor 1A, the details of which will be described later.
  • the conductive film 23 can be made of various conductive materials, including metal materials mainly made of any of Ni, Cu, Ru, Al, W, Ti, Ag, Au, Zn, Ta, and Nb, alloy materials mainly made of two or more selected from these metal materials, metal nitrides such as TiN, TiAlN, TiSiN, TaN, NbN, and WN, metal oxynitrides such as TiON and TiAlON, conductive polymers such as PEDOT (poly(3,4-ethylenedioxythiophene)), polypyrrole, and polyaniline, and conductive oxide films such as RuO 2 , ZnO, (Zn,Al)O, and NiO. Among these, it is preferable to make the conductive film 23 out of oxide semiconductors such as TiN, TiON, ZnO, and RuO. In this embodiment, the conductive film 23 is made of TiN.
  • the conductive film 23 can be preferably formed by CVD, ALD, PLD, plating, bias sputtering, sol-gel, a method using conductive polymer filling, or a method using supercritical fluid, and is particularly preferably formed by ALD.
  • the conductive film 23 may also be composed of a laminated film made up of multiple conductive layers made of different materials. In that case, the film can be formed by another method after being formed by ALD.
  • the thickness of the conductive film 23 is not particularly limited, but is preferably 3 nm or more, and more preferably 10 nm or more.
  • the dielectric film 22 and conductive film 23 described above cover not only the surface of the metal porous body 21, but also a predetermined portion on the first main surface 10a side of the insulating substrate 10. Furthermore, as shown in FIG. 4, the dielectric film 22 and conductive film 23 also cover the surface of the insulating substrate 10 in a portion that defines the first through hole 11 provided in the insulating substrate 10. More specifically, at the boundary between the first via conductor 13 and the base material of the insulating substrate 10, the base material of the insulating substrate 10 is covered by the dielectric film 22, and the dielectric film 22 is covered by the conductive film 23, which is further covered by the first via conductor 13. Furthermore, the end of the first via conductor 13 on the first main surface 10a side is covered by the capacitance forming portion 20.
  • the conductive film 23 is joined to the first via conductor 13. Therefore, the first external connection wiring serving as the anode described above is connected to the capacitance forming portion 20 via the first via conductor 13.
  • the sealing portion 30 is provided on the first main surface 10a of the insulating substrate 10, and seals the capacitance forming portion 20 together with the insulating substrate 10, while defining an outer surface 30a located on the opposite side of the capacitance forming portion 20 from the insulating substrate 10. More specifically, the sealing portion 30 is positioned so as to cover the upper, side, and lower sides of the capacitance forming portion 20, which is provided so as to face the first main surface 10a of the insulating substrate 10, and is further positioned so as to fill a hole provided inside the capacitance forming portion 20.
  • the sealing portion 30 can be made of various insulating materials, but is preferably made of an insulating material having excellent weather resistance.
  • the material of the sealing portion 30 can be a resin material such as polyimide resin, polybenzoxazole resin, polyethylene terephthalate resin, benzocyclobutene resin, or epoxy resin.
  • the resin material can contain various additives, and may contain SiO2 filler, Al2O3 filler , or the like to adjust the thermal expansion coefficient.
  • the sealing portion 30 is made of epoxy resin.
  • a moisture-resistant protective film may be formed between the capacitance forming portion 20 and the sealing portion 30.
  • the moisture-resistant protective film can be formed, for example, before forming the sealing portion 30, by providing an inorganic insulator made of SiN, SiO 2 , Al 2 O 3 , HfO 2 , ZrO 2 or the like so as to cover the capacitance forming portion 20 by a CVD method, an ALD method or the like, or by providing an organic insulator having water repellency such as a fluorine-based resin or a silane coupling agent resin so as to cover the capacitance forming portion 20.
  • the moisture-resistant protective film does not necessarily need to be formed up to the inside of the capacitance forming portion 20, and it is sufficient if it is formed so as to cover only the outer surface.
  • the sealing portion 30 can be formed by various coating methods, such as a method using a vacuum laminator, a method using an air dispenser, a method using a jet dispenser, a screen printing method, a vacuum printing method, an electrostatic coating method, an inkjet method, a photolithography method, etc.
  • the thickness and size of the sealing portion 30 are not particularly limited, and its size is set appropriately according to the size of the insulating substrate 10.
  • the thickness of the sealing portion 30 is preferably, for example, 5 ⁇ m or more and 50 ⁇ m or less, and its size is preferably such that it covers the entire first main surface 10a of the insulating substrate 10.
  • the thickness of the sealing portion 30 described above is measured, for example, by observing a cross section perpendicular to the extension direction of the first main surface 10a of the insulating substrate 10 using an optical microscope.
  • capacitor 1A when capacitor 1A is viewed in a plan view, the longitudinal direction of capacitor 1A is Lx, the lateral direction is Ly, and the thickness direction of capacitor 1A (i.e., the normal direction to first main surface 10a) is Lz.
  • capacitor 1A is polished so that the Lx-Lz cross section of capacitor 1A at the center in the Ly direction is exposed. This polishing is performed so that the exposed cross section is located within an error range of ⁇ 100 ⁇ m in the Ly direction based on the center position.
  • the observation range of the cross section in the Lx direction is a range of ⁇ 50 ⁇ m based on the center position of the cross section in the Lx direction, and is a range where neither the metal wall portion 15 nor the partition portion 18 is provided.
  • the thickness of the sealing portion 30 in the Lz direction is measured at 10 points equally spaced in the Lx direction, and the average value is calculated.
  • the average value calculated in this manner is the thickness of the sealing portion 30.
  • three of the thicknesses of the sealing portion 30 in the Lz direction measured at these 10 points are illustrated as line segment lengths e1, e2, and e3.
  • the capacitance forming portion 20 consisting of the metal porous body 21, the dielectric film 22, and the conductive film 23 is sealed by the insulating substrate 10 and the sealing portion 30, and the capacitance forming portion 20 is electrically connected by a pair of external connection wiring.
  • the capacitance forming portion 20 is partitioned into a plurality of capacitance forming portions by a plurality of metal wall portions 15 and a plurality of partition portions 18, and these capacitance forming portions are arranged side by side from the first external connection wiring side toward the second external connection line side (i.e., from the right side toward the left side in FIG. 2).
  • the capacitance forming portion 20 is divided into five portions, and for ease of explanation, these five capacitance forming portions will be referred to as capacitance forming portion 20A, capacitance forming portion 20B, capacitance forming portion 20C, capacitance forming portion 20D, and capacitance forming portion 20E, in that order from the portion closest to the first external connection wiring.
  • the metal porous body 21, dielectric film 22 and conductive film 23 that define the capacitance forming portion 20A are referred to as metal porous body 21A, dielectric film 22A and conductive film 23A, respectively.
  • the metal porous body 21, dielectric film 22, and conductive film 23 in the portions defining the capacitance forming portion 20B are referred to as the metal porous body 21B, dielectric film 22B, and conductive film 23B, respectively;
  • the metal porous body 21, dielectric film 22, and conductive film 23 in the portions defining the capacitance forming portion 20C are referred to as the metal porous body 21C, dielectric film 22C, and conductive film 23C, respectively;
  • the metal porous body 21, dielectric film 22, and conductive film 23 in the portions defining the capacitance forming portion 20D are referred to as the metal porous body 21D, dielectric film 22D, and conductive film 23D, respectively; and the metal porous body 21, dielectric film 22, and conductive film 23 in the portions defining the portions defining
  • capacitance forming portion 20A corresponds to the first capacitance forming portion
  • capacitance forming portions 20B to 20E correspond to the second capacitance forming portion. Therefore, metal porous body 21A corresponds to the first metal porous body, dielectric film 22A corresponds to the first dielectric film, conductive film 23A corresponds to the first conductive film, metal porous bodies 21B to 21E correspond to the second metal porous body, dielectric films 22B to 22E correspond to the second dielectric film, and conductive films 23B to 23E correspond to the second conductive film.
  • capacitance forming portion 20B corresponds to the third capacitance forming portion
  • capacitance forming portions 20C to 20E correspond to the fourth capacitance forming portion. Therefore, metal porous body 21B corresponds to the third metal porous body, dielectric film 22B corresponds to the third dielectric film, conductive film 23B corresponds to the third conductive film, metal porous bodies 21C to 21E correspond to the fourth metal porous body, dielectric films 22C to 22E correspond to the fourth dielectric film, and conductive films 23C to 23E correspond to the fourth conductive film.
  • capacitance forming portion 20C corresponds to the fifth capacitance forming portion
  • capacitance forming portions 20D and 20E correspond to the sixth capacitance forming portion. Therefore, metal porous body 21C corresponds to the fifth metal porous body, dielectric film 22C corresponds to the fifth dielectric film, conductive film 23C corresponds to the fifth conductive film, metal porous bodies 21D and 21E correspond to the sixth metal porous body, dielectric films 22D and 22E correspond to the sixth dielectric film, and conductive films 23D and 23E correspond to the sixth conductive film.
  • capacitance forming portion 20D corresponds to the seventh capacitance forming portion
  • capacitance forming portion 20E corresponds to the eighth capacitance forming portion. Therefore, metal porous body 21D corresponds to the seventh metal porous body, dielectric film 22D corresponds to the seventh dielectric film, conductive film 23D corresponds to the seventh conductive film, metal porous body 21E corresponds to the eighth metal porous body, dielectric film 22E corresponds to the eighth dielectric film, and conductive film 23E corresponds to the eighth conductive film.
  • metal wall portion 15A and metal wall portion 15B correspond to the first metal wall portion and the second metal wall portion, respectively
  • partition portion 18A and partition portion 18B correspond to the first partition portion and the second partition portion, respectively.
  • the conductive film 23 of the capacitance forming portion 20 is configured to be discontinuous with the partition portion 18A and its vicinity as the boundary. More specifically, the conductive film 23A of the capacitance forming portion 20A, which is the portion on the first external connection wiring side as viewed from the partition portion 18A, and the conductive film 23B of the capacitance forming portion 20B, which is the portion on the second external connection wiring side as viewed from the partition portion 18A and adjacent to the partition portion 18A, are configured to be discontinuous with each other.
  • the capacitance forming portion 20 includes capacitance forming portion 20A defined by conductive film 23A, dielectric film 22A which is the dielectric film 22 in the portion corresponding to the conductive film 23A, and metal porous body 21A which is the metal porous body 21 in the portion corresponding to the dielectric film 22A, and capacitance forming portion 20B defined by conductive film 23B, dielectric film 22B which is the dielectric film 22 in the portion corresponding to the conductive film 23B, and metal porous body 21B which is the metal porous body 21 in the portion corresponding to the dielectric film 22B.
  • the conductive film 23A of the capacitance forming portion 20A is bonded to the first via conductor 13, and the metal porous body 21E of the capacitance forming portion 20E is bonded to the second via conductor 14.
  • the partition wall 18A divides the metal porous bodies 21A-21E into metal porous bodies 21A and metal porous bodies 21B-21E, divides the dielectric films 22A-22E into dielectric films 22A and dielectric films 22B-22E, and further divides the conductive films 23A-23E into conductive films 23A and conductive films 23B-23E.
  • the partition portion 18A is not bonded to the conductive film 23A or the conductive film 23B.
  • the partition portion 18A is bonded to the metal porous body 21A of the capacitance forming portion 20A on the side facing the first external connection wiring, and is bonded to the metal porous body 21B of the capacitance forming portion 20B on the side facing the second external connection wiring.
  • the capacitance forming portions 20B to 20E are electrically connected to the first external connection wiring via the capacitance forming portion 20A, and the capacitance forming portion 20A is electrically connected to the second external connection wiring via the capacitance forming portions 20B to 20E.
  • the capacitance forming portion 20A and the capacitance forming portions 20B to 20E are electrically connected in series between the first external connection wiring and the second external connection wiring via the partition portion 18A.
  • capacitor 1A metal wall portion 15A is provided on insulating substrate 10, so that capacitance forming portion 20B-20E of capacitance forming portion 20 is divided into capacitance forming portion 20B and capacitance forming portions 20C-20E, which are the remaining portions.
  • Capacitance forming portion 20B is located on the first external connection wiring side, and capacitance forming portions 20C-20E are located on the second external connection wiring side of capacitance forming portion 20B.
  • metal wall portion 15A is bonded to conductive film 23B of capacitance forming portion 20B, but is not bonded to porous metal body 21B and dielectric film 22B. Also, metal wall portion 15A is bonded to conductive film 23C of capacitance forming portion 20C, which is the portion of capacitance forming portions 20C-20E adjacent to metal wall portion 15A, but is not bonded to porous metal body 21C and dielectric film 22C.
  • the capacitance forming portions 20C to 20E are electrically connected to the first external connection wiring via the capacitance forming portion 20B, and the capacitance forming portion 20B is electrically connected to the second external connection wiring via the capacitance forming portions 20C to 20E.
  • the capacitance forming portion 20B and the capacitance forming portions 20C to 20E are electrically connected in series between the first external connection wiring and the second external connection wiring.
  • the conductive film 23 in the portions of capacitance forming portion 20 that correspond to capacitance forming portions 20C-20E is configured to be discontinuous with partition portion 18B and its vicinity as the boundary. More specifically, conductive film 23C of capacitance forming portion 20C, which is the portion on the first external connection wiring side as viewed from partition portion 18B, and conductive film 23D of capacitance forming portion 20D, which is the portion on the second external connection wiring side as viewed from partition portion 18B, are configured to be discontinuous with each other.
  • the capacitance forming portion 20 includes capacitance forming portion 20C defined by conductive film 23C, dielectric film 22C which is the dielectric film 22 in the portion corresponding to conductive film 23C, and metal porous body 21C which is the metal porous body 21 in the portion corresponding to dielectric film 22C, and capacitance forming portion 20D defined by conductive film 23D, dielectric film 22D which is the dielectric film 22 in the portion corresponding to conductive film 23D, and metal porous body 21D which is the metal porous body 21 in the portion corresponding to dielectric film 22D.
  • the partition wall 18B divides the metal porous bodies 21C-21E into metal porous body 21C and metal porous bodies 21D, 21E, divides the dielectric films 22C-22E into dielectric film 22C and dielectric films 22D, 22E, and further divides the conductive films 23C-23E into conductive film 23C and conductive films 23D, 23E.
  • partition portion 18B is not bonded to conductive film 23C and conductive film 23D.
  • partition portion 18B is bonded to metal porous body 21C of capacitance forming portion 20C on the side facing the first external connection wiring, and is bonded to metal porous body 21D of capacitance forming portion 20D on the side facing the second external connection wiring.
  • the capacitance forming portions 20D and 20E are electrically connected to the first external connection wiring via the capacitance forming portion 20C, and the capacitance forming portion 20C is electrically connected to the second external connection wiring via the capacitance forming portions 20D and 20E.
  • the capacitance forming portion 20C and the capacitance forming portions 20D and 20E are electrically connected in series via the partition portion 18B between the first external connection wiring and the second external connection wiring.
  • capacitor 1A metal wall portion 15B is provided on insulating substrate 10, so that capacitance forming portion 20D, 20E of capacitance forming portion 20 is divided into capacitance forming portion 20D and capacitance forming portion 20E.
  • Capacitance forming portion 20D is located on the first external connection wiring side, and capacitance forming portion 20E is located on the second external connection wiring side of capacitance forming portion 20D.
  • metal wall portion 15B is bonded to conductive film 23D of capacitance forming portion 20D, but is not bonded to porous metal body 21D and dielectric film 22D. Also, metal wall portion 15B is bonded to conductive film 23E of capacitance forming portion 20E, but is not bonded to porous metal body 21E and dielectric film 22E.
  • the capacitance forming portion 20E is electrically connected to the first external connection wiring via the capacitance forming portion 20D, and the capacitance forming portion 20D is electrically connected to the second external connection wiring via the capacitance forming portion 20E.
  • the capacitance forming portion 20D and the capacitance forming portion 20E are electrically connected in series between the first external connection wiring and the second external connection wiring.
  • the capacitance forming portion 20A, capacitance forming portion 20B, capacitance forming portion 20C, capacitance forming portion 20D, and capacitance forming portion 20E are electrically connected in series in this order between the first external connection wiring and the second external connection wiring.
  • the number of capacitance forming portions connected in series is not limited to five as long as it is more than one, and may be two to four or more, or may be six or more.
  • the number of capacitance forming portions connected in series it is sufficient to appropriately change the number of discontinuous portions of conductive film 23 and the number of metal wall portions 15 added to a capacitor having one discontinuous portion of conductive film 23.
  • the discontinuous portions of conductive film 23 and the metal wall portions 15 need to be arranged alternately from the first external connection wiring side toward the second external connection line side.
  • the conductive film 23A and the conductive film 23B are formed so as to be discontinuous from each other, and the metal porous body 21A and the metal porous body 21B are joined to the partition wall 18A provided between the capacitance forming portion 20A and the capacitance forming portion 20B, thereby separating the capacitance forming portion 20A from the capacitance forming portion 20B and electrically connecting them in series, but the partition wall 18A does not necessarily need to be provided in the capacitor 1A.
  • FIG. 6 is a flow diagram showing a method for manufacturing a capacitor according to this embodiment.
  • FIGS. 7 to 23 are schematic cross-sectional views for explaining each step of the manufacturing flow shown in FIG. 6. Next, an example of a specific manufacturing method for manufacturing the capacitor 1A according to the above-mentioned embodiment will be described with reference to FIGS. 6 to 23.
  • the manufacturing method of capacitor 1A shown below is a method in which an assembly of in-process capacitors is produced by performing processing all at once up to a mid-point in the manufacturing process, the assembly is then cut into individual pieces, and the individual pieces are further processed to mass-produce multiple capacitors 1A simultaneously.
  • step S1 a green sheet is produced .
  • Al2O3 powder and glass powder are weighed, and the Al2O3 powder and glass powder are mixed with an organic solvent such as toluene or ethanol, and a binder such as polyvinyl butyral. Then, the mixture is formed into a sheet, and a green sheet that is the base of an insulating substrate is produced. After the green sheet is produced, it is cut to prepare a plurality of green sheets.
  • an organic solvent such as toluene or ethanol
  • a binder such as polyvinyl butyral
  • a first through hole and a second through hole are formed in some of the green sheets.
  • a first through hole 11 that will later be filled with a first via conductor that is part of an anode is provided in a predetermined position of the green sheet, and a second through hole 12 that will later be filled with a second via conductor that is part of a cathode is provided.
  • the method for forming the first through hole 11 and the second through hole 12 is not particularly limited, but for example, the first through hole 11 and the second through hole 12 can be formed by irradiating the green sheet with laser light.
  • the first through hole 11 and the second through hole 12 may also be formed by processing using a mechanical puncher or sandblasting.
  • step S3 a second via conductor is formed in the green sheet in which the first through hole and the second through hole are formed.
  • a conductive paste is applied to the green sheet so as to fill the second through hole 12.
  • the first through hole 11 is not filled with the conductive paste.
  • the method for applying the conductive paste is not particularly limited, but for example, screen printing can be used.
  • step S4 the green sheets are fired.
  • a green sheet that does not have a first through hole and a second through hole is superimposed on the green sheet to which the conductive paste has been applied in step S3, and the superimposed green sheets are pressed together.
  • the laminate of green sheets after this pressing is then degreased, and the degreased laminate of green sheets is then fired.
  • a green sheet that does not have the first through hole 11 and the second through hole 12 is stacked on the other main surface opposite the one main surface of the green sheet on which the conductive paste is applied.
  • a uniaxial press machine for example, can be used to press the green sheets.
  • the green sheets are fired, for example, in the air at a temperature of 700°C to 1000°C.
  • the insulating substrate in question is a so-called multi-substrate in which the insulating substrates that will ultimately be included in each of the multiple capacitors are connected in a matrix pattern, but in Figure 7, attention is focused on only one of these, insulating substrate 10, and its surrounding area is omitted and shown with dashed lines.
  • step S2 an example was given in which the first through hole and the second through hole are formed in step S2, and then the second via conductor is provided in step S3.
  • step S3 it is also possible to form only the second through hole first, and then form the first through hole after the second via conductor is formed.
  • the second via conductor 14 and the first through hole 11 may be provided after firing an insulating substrate that does not have through holes or the like.
  • the first through hole 11 and the second through hole 12 may be provided in the fired insulating substrate by, for example, sandblasting, wet etching, dry etching, or the like, and then the conductive paste may be applied and fired.
  • the second via conductor 14 may be formed by sputtering, vapor deposition, plating, or the like.
  • step S5 a conductive paste is applied to form the metal porous body 21 that constitutes the capacitance forming portion 20.
  • a conductive paste 21p for forming a metal porous body 21 (described later) is applied onto the first main surface 10a of the insulating substrate 10.
  • the conductive paste 21p is prepared by weighing and mixing conductive metal particles 21a and a binder 21b consisting of an organic solvent such as terpineol and an ethyl cellulose varnish, and then using a rolling machine.
  • the conductive paste 21p prepared in this manner is applied onto the first main surface 10a of the insulating substrate 10 so as to have an overall rectangular pattern shape in a plan view, and is then dried.
  • the conductive paste 21p is applied on the first main surface 10a in multiple layers, thereby forming a layer having a predetermined thickness.
  • the conductive paste 21p applied on the first main surface 10a becomes the above-mentioned metal porous body 21 through a firing process described below.
  • the conductive paste 21p containing metal particles 21a made of Ni is used.
  • a blocking portion that blocks the first through hole 11 provided in the insulating substrate 10 is provided by applying an epoxy resin or the like (not shown) to the first through hole 11. This makes it possible to prevent the conductive paste 21p from penetrating into the inside of the first through hole 11.
  • a partition groove is formed. More specifically, as shown in FIG. 9, a plurality of partition grooves 18h extending in a direction intersecting the direction connecting the first through hole 11 and the second via conductor 14 (i.e., a direction perpendicular to the paper surface in FIG. 9) are formed in the conductive paste 21p in a portion located between the first through hole 11 and the second via conductor 14 when viewed along the normal direction of the first main surface 10a, thereby dividing the conductive paste 21p into a plurality of portions.
  • the plurality of partition grooves 18h will be filled with the partition in the partition formation process described below.
  • the two partition grooves 18h are formed so as to be positioned side by side from the first through hole 11 side toward the second via conductor 14 side (i.e., from the right side toward the left side in FIG. 9). This divides the conductive paste 21p into a portion corresponding to the above-mentioned metal porous body 21A, a portion corresponding to metal porous body 21B and metal porous body 21C, and a portion corresponding to metal porous body 21D and metal porous body 21E.
  • the method for forming the partition groove 18h is not particularly limited, but for example, the partition groove 18h can be formed by irradiating the conductive paste 21p with laser light. In addition, the partition groove 18h may be formed by processing using a mechanical puncher or sandblasting.
  • a partition is formed. More specifically, as shown in FIG. 10, a conductive paste is filled into the partition grooves 18h so as to fill the partition grooves 18h.
  • the two partitions 18 thus formed are erected from the first main surface 10a toward the conductive paste 21p. Of these two partitions 18, the one located on the first external connection wiring side corresponds to the above-mentioned partition 18A, and the one located closer to the second external connection wiring side than the partition 18A corresponds to the partition 18B.
  • Ni paste is used as the conductive paste filled in the partition groove 18h.
  • the partition 18 and the metal porous body 21 are firmly metal-bonded.
  • the method for applying the conductive paste to be filled into the partition groove 18h is not particularly limited, but an inkjet method, for example, can be used.
  • a groove for the metal wall portion is formed as shown in Fig. 6. More specifically, as shown in Fig. 11, a groove for the metal wall portion 15h extending along a direction intersecting the direction connecting the first through hole 11 and the second via conductor 14 is formed in the conductive paste 21p of the portion located between the partition portion 18A and the partition portion 18B when viewed along the normal direction of the first main surface 10a (i.e., the conductive paste 21p of the portion corresponding to the metal porous body 21B and the metal porous body 21C), thereby dividing the conductive paste 21p of the above portion into a portion corresponding to the metal porous body 21B and a portion corresponding to the metal porous body 21C.
  • a metal wall groove 15h is formed that extends in a direction intersecting the direction connecting the first through hole 11 and the second via conductor 14, thereby dividing the conductive paste 21p in the above portion into a portion corresponding to the metal porous body 21D and a portion corresponding to the metal porous body 21E.
  • the method for forming the metal wall groove 15h is not particularly limited, but for example, the metal wall groove 15h can be formed by irradiating the conductive paste 21p with laser light. In addition, the metal wall groove 15h may be formed by processing using a mechanical puncher or sandblasting.
  • step S9 the conductive paste and the partition portion are fired. More specifically, as shown in FIG. 12, the conductive paste 21p and the partition portion 18 are fired, whereby adjacent metal particles 21a contained in the conductive paste 21p are sintered together to form a metallic bond, and the partition portion 18 is bonded to the metal particles 21a adjacent thereto. This firing also bonds the second via conductor 14 to the metal particles 21a adjacent thereto.
  • partition portion 18A is joined to adjacent porous metal body 21A and porous metal body 21B, and partition portion 18B is joined to adjacent porous metal body 21C and porous metal body 21D. Furthermore, second via conductor 14 is joined to adjacent porous metal body 21E.
  • the blocking portion made of epoxy resin or the like that blocks the first through hole 11 will also be burned away by the heat.
  • the insulating substrate 10 is first degreased, and then the above-mentioned conductive paste 21p and partition wall portion 18 are fired at temperatures between 400°C and 900°C in a reducing atmosphere, for example, a mixture of nitrogen and hydrogen.
  • a reducing atmosphere for example, a mixture of nitrogen and hydrogen.
  • the atmosphere can be set to an equilibrium oxygen partial pressure or lower for the metal selected as the main component of metal particles 21a.
  • the partition section 18 is composed of Ni, which is the same material as that contained in the metal particles 21a in the conductive paste 21p.
  • the metal particles 21a and the partition section 18 are sintered by the firing described above, resulting in a metallic bond, which improves the mechanical strength of the bond between the metal particles 21a and the partition section 18.
  • a dielectric film is formed as shown in Figure 6. More specifically, as shown in Figure 13, a dielectric film 22 is formed so as to cover the first main surface 10a, the metal porous body 21, and the surface of the partition portion 18 in a portion not joined to the metal porous body 21, and to cover the surface of the insulating substrate 10 in a portion that defines the first through hole 11 provided in the insulating substrate 10.
  • the method for forming the dielectric film 22 is not particularly limited, but preferably the ALD method is used.
  • the ALD method allows the raw material for the dielectric film 22 to be supplied as a gas, making it possible to select the material and adjust the film thickness at the atomic layer level. Therefore, even if the microscopic holes provided inside the metal porous body 21 are extremely small, a homogeneous and dense dielectric film 22 can be formed. Furthermore, the ALD method makes it possible to easily cover with the dielectric film 22 the surface of the insulating substrate 10 in the portion that defines the first through hole 11 provided in the insulating substrate 10.
  • the dielectric film 22 is formed using this ALD method, it is preferable to use a raw material gas that has a high vapor pressure, is easy to gasify, has high thermal stability, and is highly reactive, so that the raw material gas can be distributed throughout the fine holes provided inside the metal porous body 21 and the inside of the first through hole 11 provided in the insulating substrate 10.
  • a raw material gas that has a high vapor pressure, is easy to gasify, has high thermal stability, and is highly reactive, so that the raw material gas can be distributed throughout the fine holes provided inside the metal porous body 21 and the inside of the first through hole 11 provided in the insulating substrate 10.
  • TMA trimethylaluminum
  • TDMAS trisdimethylaminosilane
  • the dielectric film 22 is formed using the ALD method.
  • the dielectric film 22 is formed at a temperature of, for example, 150°C or higher and 400°C or lower, although this varies depending on the film formation method and film formation material.
  • a first resist film is formed. More specifically, as shown in FIG. 14, a first resist film 24 is formed so as to cover the portion of the dielectric film 22 formed in step S10 that covers the surface of the partition wall portion 18 and the adjacent portion thereof.
  • the method of forming the first resist film 24 is not particularly limited to this.
  • a photosensitive liquid resist is applied uniformly to a predetermined surface of the dielectric film 22 by spin coating, and then this is locally exposed to light using a photomask.
  • unnecessary photosensitive liquid resist is removed by immersing in a developer, and the remaining photosensitive liquid resist is dried in an oven or the like, thereby forming the first resist film 24.
  • step S12 a conductive film is formed. More specifically, as shown in FIG. 15, a conductive film 23 is formed so as to cover the dielectric film 22 formed in step S10 and the first resist film 24 formed in step S11.
  • the method of forming the conductive film 23 is not particularly limited as described above, but preferably the ALD method is used.
  • the ALD method the raw material of the conductive film 23 can be supplied as a gas, which makes it possible to select the material and adjust the film thickness at the atomic layer level. Therefore, even if the microscopic holes provided inside the metal porous body 21 are extremely small, a homogeneous and dense conductive film 23 can be formed.
  • the dielectric film 22 provided inside the first through hole 11 of the insulating substrate 10 can also be easily covered with the conductive film 23.
  • the conductive film 23 is formed at a temperature condition of, for example, 200°C or higher and 600°C or lower, although this varies depending on the film formation method and film formation material.
  • step S13 the first resist film is peeled off. More specifically, as shown in FIG. 16, the first resist film 24 and the conductive film 23 formed on the surface of the first resist film 24 are peeled off using a stripping solution or the like. By peeling off a portion of the conductive film 23 in this manner, a discontinuous portion is formed in the conductive film 23 in that portion.
  • a second resist film is formed. More specifically, as shown in FIG. 17, a second resist film 25 is formed so as to cover the dielectric film 22 in the portion exposed to the outside by peeling off the first resist film 24, and the conductive film 23 in the portion other than the portion formed in the position corresponding to the plurality of metal wall grooves 15h.
  • the method of forming the second resist film 25 is the same as the method of forming the first resist film 24 described above.
  • the second resist film 25 By forming the second resist film 25 in this manner, it is possible to prevent the base material constituting the metal wall portion from being unintentionally formed in areas other than the metal wall groove 15h during the metal wall portion formation process described below.
  • metal wall portions are formed. More specifically, as shown in FIG. 18, two metal wall portions 15 are formed so as to fill the two metal wall grooves 15h.
  • the two metal wall portions 15 are erected from the first main surface 10a toward the capacitance forming portion 20.
  • the one located on the first external connection wiring side corresponds to the metal wall portion 15A described above, and the one located on the second external connection wiring side of the metal wall portion 15A corresponds to the metal wall portion 15B.
  • the metal wall portion 15 thus formed is bonded to the conductive film 23 in the portion formed at the position corresponding to the metal wall groove 15h.
  • the metal wall portion 15A is bonded to the adjacent conductive films 23B and 23C, and the metal wall portion 15B is bonded to the adjacent conductive films 23D and 23E.
  • the metal wall portion 15 may be formed by a thick film formation method such as electrolytic plating or screen printing.
  • the metal wall portion 15 made of Cu is formed by electrolytic plating.
  • a sealing portion is formed. More specifically, as shown in FIG. 20, a sealing portion 30 is provided on the first main surface 10a of the insulating substrate 10 on which the capacitance forming portion 20 is provided, so as to cover the capacitance forming portion 20.
  • the sealing portion 30 is formed, for example, by so-called compression molding. More specifically, a resin sheet is placed on the first main surface 10a of the insulating substrate 10, and in this state, a vacuum laminator is used to draw a vacuum, thereby adhering the resin sheet to the first main surface 10a of the insulating substrate 10. In this state, the resin sheet is then heated to 50°C to 100°C to laminate the capacitance forming portion 20, and then further heated to 100°C to 200°C to fully harden, thereby forming the sealing portion 30. Note that the method of forming the sealing portion 30 is not limited to the above-mentioned compression molding, and may also be performed by so-called transfer molding.
  • the capacitance forming portion 20 is sealed by the insulating substrate 10 and the sealing portion 30, preventing moisture from entering the capacitance forming portion 20 from the outside and ensuring moisture resistance.
  • the capacitance forming portion 20 is covered by the sealing portion 30, and the capacitance forming portion 20 is physically protected by the sealing portion 30. Note that the curing conditions shown above are merely examples and can be changed in various ways.
  • step S18 the insulating substrate is ground. More specifically, as shown in FIG. 21, a flat cutting is performed on the second main surface 10b of the insulating substrate 10, which is located opposite the side on which the capacitance forming portion 20 is provided.
  • a grinding tape (not shown) is applied to the capacitance forming portion 20, and the insulating substrate 10 in the portions that block the second via conductor 14 and the first through hole 11 is removed by planar cutting. This exposes the end of the second via conductor 14 on the second main surface 10b.
  • the insulating substrate is divided into individual pieces. More specifically, as shown in FIG. 22, the insulating substrate 10 is divided into a plurality of capacitors 1A that are connected to each other.
  • a groove is formed in at least one of the insulating substrate 10 and the sealing portion 30, and a force is applied to the insulating substrate 10 and the sealing portion 30 so as to bend them from the groove, thereby breaking the insulating substrate 10 and the sealing portion 30.
  • Methods for forming the groove include diamond scribing, laser scribing, dicing, etc. Also, singulation may be performed by directly cutting the insulating substrate 10 and the sealing portion 30 by scribing or dicing.
  • a first via conductor is formed in the insulating substrate. More specifically, as shown in FIG. 23, a first via conductor 13 is formed so as to fill a first through hole 11 provided in the insulating substrate 10.
  • the first via conductor 13 can be formed, for example, by electrolytic plating.
  • the portion other than the first through hole 11 is covered with an ultraviolet-curable resin film serving as a mask (not shown), and electrolytic plating is performed in this state, so that only the inside of the first through hole 11 can be covered with a plating film.
  • the ultraviolet-curable resin film serving as a mask is removed.
  • the first via conductor 13 thus formed is joined to the conductive film 23 at its side and at the end face of the first via conductor 13 facing the capacitance forming portion 20 (see FIG. 4). As a result, the first via conductor 13 is connected to the capacitance forming portion 20 via the conductive film 23 that covers it.
  • a first bump and a second bump are formed on the insulating substrate. More specifically, as shown in FIG. 2, a first bump 16 and a second bump 17 are formed on the second main surface 10b of the insulating substrate 10 so as to cover the first via conductor 13 and the second via conductor 14 provided on the insulating substrate 10.
  • the first bump 16 and the second bump 17 can be formed simultaneously, for example, by electrolytic plating.
  • the area other than the vicinity of the exposed areas of the first via conductor 13 and the second via conductor 14 is covered with an ultraviolet-curable resin film as a mask (not shown), and electrolytic plating is performed in this state, making it possible to form the first bump 16 and the second bump 17 protruding from the second main surface 10b.
  • the ultraviolet-curable resin film as a mask is removed.
  • the method of forming the second via conductor 14, the first bump 16, and the second bump 17 described above can be not only the method using electrolytic plating described above, but also a combination of a screen printing method, an inkjet method, a dispenser method, etc. using a conductive paste and sintering.
  • the conductive paste contains a metal or sintering aid that can be sintered at a low temperature so that sintering can be performed under temperature conditions that do not affect the resin that constitutes the sealing portion 30.
  • the capacitor 1A according to the first embodiment described above is manufactured, that is, a capacitor in which capacitance forming portion 20A, capacitance forming portion 20B, capacitance forming portion 20C, capacitance forming portion 20D, and capacitance forming portion 20E are electrically connected in series in this order.
  • the grinding process is performed after the sealing portion is formed, but the sealing portion may be formed after the grinding process. Also, the grinding process may be performed after singulation.
  • the conductive film 23 includes conductive films 23A and 23B that are discontinuous with each other, so that the capacitance forming portion 20 includes capacitance forming portion 20A defined by conductive film 23A, dielectric film 22A, and porous metal body 21A, and capacitance forming portion 20B defined by conductive film 23B, dielectric film 22B, and porous metal body 21B. Furthermore, capacitance forming portions 20B-20E are electrically connected to the first external connection wiring via capacitance forming portion 20A, and capacitance forming portion 20A is electrically connected to the second external connection wiring via capacitance forming portions 20B-20E. As a result, capacitance forming portion 20A and capacitance forming portions 20B-20E are electrically connected in series between the first external connection wiring and the second external connection wiring via partition portion 18A.
  • the capacitance forming portion 20 is divided into multiple portions, and these divided capacitance forming portions are electrically connected in series, which makes it possible to improve the withstand voltage of the capacitor 1A.
  • the capacitance forming portion 20 is divided into a number of portions, and these divided capacitance forming portions are electrically connected in series.
  • the capacitance forming portion 20 is divided into a number of portions, and these divided capacitance forming portions are electrically connected in series.
  • the capacitance forming portion 20 is divided into multiple portions and electrically connected in series as described above, even if an electric field concentration occurs in one of the divided capacitance forming portions 20, causing a short circuit (i.e., voltage damage), the capacitance of the remaining capacitance forming portion 20 can be secured as the capacitance of capacitor 1A. Therefore, a certain capacitance can be secured even after voltage damage, resulting in capacitor 1A with improved reliability after mounting.
  • the capacitor 1A according to this embodiment, the reliability of the capacitor after mounting is improved, which is provided with a capacitance forming portion 20 consisting of a metal porous body 21, a dielectric film 22, and a conductive film 23.
  • the volume of the porous metal body of any one of the capacitance forming portions 20A-20E may be configured to be smaller than the volume of the porous metal body of the other capacitance forming portion adjacent thereto, and the thickness of the dielectric film of that capacitance forming portion may be configured to be thinner than the thickness of the dielectric film of the other capacitance forming portion.
  • the volume of the porous metal body by configuring the volume of the porous metal body to be small, it is possible to intentionally make it easier for electric field concentration to occur in the capacitance forming portion configured with a small capacitance, and therefore it is possible to maximize the capacitance of the capacitor 1A in a state after voltage damage.
  • a resist film is formed between the above-mentioned step S10 (i.e., forming the dielectric film) and step S11 (i.e., forming the first resist film) so as to cover the dielectric film 22 in the portions other than the portions to be formed thick, and in this state, the dielectric film 22 is formed again, after which the resist film is peeled off.
  • the partition portion 18 is joined to a part of the metal porous body 21 of the capacitance forming portion 20 in a state in which it is erected from the first main surface 10a toward the capacitance forming portion 20.
  • the so-called anchor effect obtained by the partition portion 18 can effectively suppress warping of the insulating substrate 10 and peeling of the dielectric film 22 and conductive film 23 from the insulating substrate 10 caused by the warping of the insulating substrate 10. This makes it possible to improve the mounting stability and post-mounting reliability of the capacitor 1A.
  • the above-mentioned partitions 18 are provided in multiple numbers. This makes it possible to further suppress the warping that occurs in the insulating substrate 10 described above. The effect of suppressing the warping that occurs in the insulating substrate 10 by providing the partitions 18 has been confirmed by the verification test 2 described below.
  • the capacitance forming portion 20 is not substantially directly bonded to the insulating substrate 10, or even if it is directly bonded, it is only slightly bonded. This also makes it possible to suppress the warping that occurs in the insulating substrate 10 described above.
  • the multiple metal wall portions 15 are attached to a part of the conductive film 23 of the capacitance forming portion 20 in a state in which they are erected from the first main surface 10a toward the capacitance forming portion 20.
  • These multiple metal wall portions 15 also provide an anchor effect similar to the partition portion 18, and therefore the warping that occurs in the insulating substrate 10 described above can be suppressed.
  • the effect of providing the metal wall portions 15 in suppressing the warping that occurs in the insulating substrate 10 has been confirmed by the verification test 2 described below.
  • the distance between the partition portion 18A and the first via conductor 13 is set shorter than the distance between the partition portion 18A and the metal wall portion 15A, and the partition portion 18A and the metal wall portion 15A are disposed at a considerable distance from each other, thereby further suppressing the warping that occurs in the insulating substrate 10 described above.
  • the distance between the metal wall portion 15B and the second via conductor 14 is set shorter than the distance between the metal wall portion 15B and the partition portion 18B, and the metal wall portion 15B and the partition portion 18B are disposed at a considerable distance from each other, thereby further suppressing the warping that occurs in the insulating substrate 10 described above.
  • the first via conductor 13 and the second via conductor 14 are both provided within the area in which the capacitance forming portion 20 is arranged.
  • neither the first external connection wiring nor the second external connection wiring is positioned to the side of the capacitance forming portion 20, so the sealing portion 30 in the portion positioned to the side of the capacitance forming portion 20 can be minimized.
  • the capacitor 1A be configured to be smaller than conventional capacitors, but the volume occupied by the portions of the capacitor 1A other than the capacitance forming portion 20 is reduced, resulting in a higher capacitance.
  • the first via conductor 13 and the second via conductor 14 are positioned so as to penetrate the insulating substrate 10 in its thickness direction, so that these via conductors with different polarities are arranged close to each other with their current paths facing in opposite directions.
  • ESL equivalent series inductance
  • the base material of the insulating substrate 10 is covered with a dielectric film 22, the dielectric film 22 is covered with a conductive film 23, and the conductive film 23 is further covered with the first via conductor 13.
  • the adhesion between the base material of the insulating substrate 10 and the first via conductor 13 is improved compared to when the base material of the insulating substrate 10 and the first via conductor 13 are directly bonded, and the intrusion of moisture through this part is suppressed. Therefore, a capacitor with excellent moisture resistance can be obtained.
  • the metal porous body 21 is composed of a sintered body of metal particles.
  • the metal particles are metallically bonded to each other, improving the mechanical strength of the capacitance forming portion 20, and the bonding area between the metal particles is also increased, making it possible to achieve a so-called low ESR (equivalent series resistance).
  • ESR equivalent series resistance
  • capacitor 1A may be configured so that when the capacitance of any one of capacitance forming portions 20A-20E is compared with the capacitance of the remaining capacitance forming portions, the capacitance of that capacitance forming portion is 5% to 50% of the capacitance of the remaining capacitance forming portions.
  • capacitance forming portions 20 may be partitioned so that the capacitances of these five capacitance forming portions 20A-20E are fairly equal. In this case, even if a short circuit occurs in any capacitance forming portion, the change in capacitance of capacitor 1A before and after the short circuit can be made to be approximately the same.
  • the capacitor 1A according to this embodiment may be configured so that the thickness of the dielectric film of any one of the capacitance forming portions 20A-20E is at least twice the thickness of the dielectric film of the other capacitance forming portion adjacent to it.
  • the capacitor 1A may be configured so that the thickness of the dielectric film of any one of the capacitance forming portions 20A-20E is at least twice the thickness of the dielectric film of the other capacitance forming portion adjacent to it.
  • (Embodiment 2) 24 is a schematic cross-sectional view of a capacitor according to embodiment 2.
  • a capacitor 1B according to the present embodiment will be described with reference to FIG.
  • the capacitor 1B of this embodiment differs from the capacitor 1A of the above-described embodiment 1 in the number of compartments in the capacitance forming portion 20 due to the fact that there is only one metal wall portion 15.
  • the partition portion 18C, the metal wall portion 15C, and the partition portion 18D are arranged in this order from the first external connection wiring side toward the second external connection wiring side (i.e., from the right side to the left side in FIG. 24).
  • the capacitance forming portion 20 is divided into four.
  • these four capacitance forming portions will be referred to as capacitance forming portion 20F, capacitance forming portion 20G, capacitance forming portion 20H, and capacitance forming portion 20I, in order from the one closest to the first external connection wiring.
  • capacitance forming portion 20F corresponds to the first capacitance forming portion
  • capacitance forming portions 20G to 20I correspond to the second capacitance forming portion.
  • capacitance forming portion 20G corresponds to the third capacitance forming portion
  • capacitance forming portions 20H and 20I correspond to the fourth capacitance forming portion.
  • capacitance forming portion 20H corresponds to the fifth capacitance forming portion
  • capacitance forming portion 20I corresponds to the sixth capacitance forming portion.
  • partition portion 18C and partition portion 18D correspond to the first partition portion and the second partition portion, respectively, and metal wall portion 15C corresponds to the first metal wall portion.
  • the relationship between the partition portion 18C and the capacitance forming portion 20F and capacitance forming portion 20G is similar to the relationship between the partition portion 18A and the capacitance forming portion 20A and capacitance forming portion 20B in the above-mentioned embodiment 1.
  • the relationship between the metal wall portion 15C and the capacitance forming portion 20G and capacitance forming portion 20H is similar to the relationship between the metal wall portion 15A and the capacitance forming portion 20B and capacitance forming portion 20C in the above-mentioned embodiment 1.
  • the relationship between the partition portion 18D and the capacitance forming portion 20H and capacitance forming portion 20I is similar to the relationship between the partition portion 18B and the capacitance forming portion 20C and capacitance forming portion 20D in the above-mentioned embodiment 1.
  • second via conductor 14 is joined to conductive film 23 of capacitance forming portion 20. More specifically, second via conductor 14 is joined to conductive film 23I of capacitance forming portion 20I.
  • the capacitance forming portion 20F, the capacitance forming portion 20G, the capacitance forming portion 20H, and the capacitance forming portion 20I are electrically connected in series in this order between the first external connection wiring and the second external connection wiring.
  • the capacitor 1B of this embodiment can be manufactured by a method similar to the manufacturing method of the capacitor 1A of the first embodiment described above.
  • (Embodiment 3) 25 is a schematic cross-sectional view of a capacitor according to embodiment 3.
  • a capacitor 1C according to the present embodiment will be described with reference to FIG.
  • the capacitor 1C according to this embodiment has a different number of compartments in the capacitance forming portion 20 due to the fact that there is only one partition portion 18 and that no metal wall portion 15 is provided.
  • the capacitance forming portion 20 when viewed along the normal direction of the first main surface 10a, one partition 18E is located between the first external connection wiring and the second external connection wiring.
  • the capacitance forming portion 20 is divided into two.
  • these two capacitance forming portions will be referred to as capacitance forming portion 20J and capacitance forming portion 20K, starting from the one closest to the first external connection wiring.
  • capacitance forming portion 20J corresponds to the first capacitance forming portion
  • capacitance forming portion 20K corresponds to the second capacitance forming portion.
  • partition 18E corresponds to the first partition.
  • the relationship between the partition wall portion 18E and the capacitance forming portion 20J and capacitance forming portion 20K is the same as the relationship between the partition wall portion 18A and the capacitance forming portion 20A and capacitance forming portion 20B in the above-mentioned embodiment 1.
  • second via conductor 14 is joined to conductive film 23 of capacitance forming portion 20. More specifically, second via conductor 14 is joined to conductive film 23K of capacitance forming portion 20K.
  • the capacitance forming portion 20J and the capacitance forming portion 20K are electrically connected in series between the first external connection wiring and the second external connection wiring in this order.
  • the capacitor 1C according to this embodiment can be manufactured by the manufacturing method of the capacitor 1A according to the above-mentioned embodiment 1, excluding the steps related to the metal wall portion (i.e., steps S8, S14 to S16 in FIG. 6).
  • Verification Test 1 In verification test 1, several types of capacitors with different numbers of metal walls and partitions (i.e., the number of compartments in the capacitance forming portion) were prepared, and the withstand voltages of these capacitors when a voltage was applied to them were measured to verify the effect that dividing the capacitance forming portion and connecting them in series has on the withstand voltage of the capacitor.
  • a total of four types of capacitors were prepared: a capacitor with one metal wall portion dividing the capacitance forming portion into two (hereinafter, for convenience of explanation, referred to as the two-continuous type), a capacitor with two metal walls and one partition portion dividing the capacitance forming portion into four (four-continuous type), a capacitor with three metal walls and two partition portions dividing the capacitance forming portion into six (six-continuous type), and a capacitor with four metal walls and three partition portions dividing the capacitance forming portion into eight (eight-continuous type), as well as a capacitor as a comparative example in which the capacitance forming portion is not divided (i.e., neither a metal wall portion nor a partition portion is provided).
  • the four-continuous type capacitor has the same configuration as the capacitor 1B according to the above-mentioned embodiment 2 (see FIG. 24).
  • the metal walls and partition portions are alternately arranged from the first external connection wiring side toward the second external connection line side.
  • the insulating substrate of the capacitor prepared in the verification test 1 is made of Al2O3 and has a size of 1000 ⁇ m square and a thickness of 75 ⁇ m.
  • the first via conductor and the second via conductor are made of Ni and are cylindrical with a diameter of 150 ⁇ m and an axial length of 75 ⁇ m.
  • the distance between the first via conductor 13 and the second via conductor 14 is 150 ⁇ m.
  • the first bump 16 and the second bump 17 are made of Au.
  • the metal porous body is made of Ni and has a size of 1000 ⁇ m square and a thickness of 200 ⁇ m before the capacitance forming portion is partitioned.
  • the dielectric film is made of AlSiO, and the conductive film is made of TiN.
  • the metal wall portion prepared in verification test 1 is made of Cu and has a height (vertical dimension in Fig. 2) of 200 ⁇ m, a thickness (horizontal dimension in Fig. 2) of 70 ⁇ m, and a width (dimension perpendicular to the paper surface in Fig. 2) of 1000 ⁇ m.
  • the partition portion is made of Ni and has a height of 200 ⁇ m, a thickness of 70 ⁇ m, and a width of 1000 ⁇ m.
  • both terminals of the capacitor were connected to the terminals of the voltage resistance tester.
  • a voltage was applied to the capacitor at a current value of 0.05 A and a voltage rise speed of 0.67 mV/sec.
  • the voltage when the current value fell below 0.05 A was measured as the voltage resistance.
  • Figure 26 is a graph showing the results of verification test 1 conducted using the method described above.
  • the graph shows the withstand voltage of each type of capacitor.
  • the results of verification test 1 show that by providing partitions to separate the capacitance forming parts and connecting them in series, the withstand voltage of the capacitor is improved compared to when there is only a single capacitance forming part and no partitions (i.e., the comparative example). Furthermore, it was found that by increasing the number of metal walls and partitions, the number of capacitance forming parts electrically connected in series (i.e., the number of partitions of the capacitance forming parts) is increased, and the effect of improving the withstand voltage of the capacitor becomes more pronounced. From the above, it was found that by separating the capacitance forming parts and connecting them in series, the withstand voltage of the capacitor is improved.
  • Verification Test 2 In verification test 2, several types of capacitors with different numbers of metal walls and partitions (i.e., the number of partitions in the capacitance forming portion) were prepared, and the amount of deflection of the insulating substrate when a load was applied to these capacitors was confirmed to verify the effect of the metal walls and partitions on the bending strength (mechanical strength) of the capacitor. Note that the types of capacitors prepared in verification test 2 were the same as those prepared in the above-mentioned verification test 1.
  • a glass epoxy board with a long side length of 100 mm, a short side length of 40 mm, and a thickness of 1.6 mm was prepared.
  • a metal mask was used to print a 10 ⁇ m thick solder paste on the lands of the glass epoxy board.
  • a capacitor was mounted on the lands on which the solder paste was printed, and these were subjected to a heat treatment at 250°C for 15 minutes.
  • the glass epoxy board on which the capacitor was mounted was set on the mounting table of the deflection test device.
  • terminals for measuring the capacitor capacitance were brought into contact with the lands of the glass epoxy board.
  • the measurement frequency for the capacitor capacitance was 1 kHz.
  • a pressure tool was placed on the main surface of the pair of main surfaces of the glass epoxy board on which the capacitor was not mounted, and pressure was applied to the glass epoxy board.
  • the pressure conditions were a rise and fall speed of the pressure tool of 0.1 mm/sec and a load of 0.003 N.
  • the amount of deflection refers to the amount of displacement from the initial position along the normal direction of the first main surface of the insulating substrate (i.e., the amount of displacement along the up-down direction in Figure 2) in the part of the insulating substrate that is located at the center when viewed from above.
  • Appendix 6 A capacitor described in any one of appendix 2 to 5, wherein a height of the first partition portion in a direction parallel to a normal direction of the first main surface is greater than a height of the capacitance forming portion in a direction parallel to the normal direction of the first main surface.
  • Appendix 7 A capacitor described in any one of Appendix 2 to 6, wherein a width of the first partition portion in a direction intersecting both the thickness direction and the height direction of the first partition portion is larger than a width of the capacitance forming portion in a direction intersecting both the thickness direction and the height direction of the first partition portion.
  • the first external connection wiring has a first via conductor penetrating the insulating substrate so as to reach the second main surface from the first main surface;
  • the second external connection wiring has a second via conductor penetrating the insulating substrate so as to reach the second main surface from the first main surface; when viewed along a normal direction of the first main surface, the first via conductor is provided within a region in which the first capacitance forming portion is disposed, A capacitor described in any one of appendix 1 to 9, wherein, when viewed along the normal direction of the first main surface, the second via conductor is provided within a region in which the second capacitance forming portion is arranged.
  • the third capacitance-forming portion includes a third metal porous body which is the second metal porous body in a portion defining the third capacitance-forming portion, a third dielectric film which is the second dielectric film in a portion corresponding to the third metal porous body, and a third conductive film which is the second conductive film in a portion corresponding to the third dielectric film
  • the fourth capacitance-forming portion includes a fourth metal porous body which is the second metal porous body in a portion defining the fourth capacitance-forming portion, a fourth dielectric film which is the second dielectric film in a portion corresponding to the fourth metal porous body, and a fourth conductive film which is the second conductive film in
  • the fourth capacitance forming portion includes a fifth capacitance forming portion defined by the fifth conductive film, a fifth dielectric film which is the fourth dielectric film in a portion corresponding to the fifth conductive film, and a fifth metal porous body which is the fourth metal porous body in a portion corresponding to the fifth dielectric film, and a sixth capacitance forming portion defined by the sixth conductive film, a sixth dielectric film which is the fourth dielectric film in a portion corresponding to the sixth conductive film, and a sixth metal porous body which is the fourth metal porous body in a portion corresponding to the sixth dielectric film, the sixth capacitance forming portion is located on an opposite side to the first external connection wiring side as viewed from the fifth capacitance forming portion, The capacitor described in Appendix 11, wherein the sixth capacitance forming portion is electrically connected to the first external connection wiring via the fifth capacitor
  • [Appendix 13] a second partition wall made of metal that divides the fourth metal porous body into the fifth metal porous body and the sixth metal porous body, divides the fourth dielectric film into the fifth dielectric film and the sixth dielectric film, and further divides the fourth conductive film into the fifth conductive film and the sixth conductive film, 13.
  • the seventh capacitance-forming portion includes a seventh metal porous body which is the sixth metal porous body in a portion defining the seventh capacitance-forming portion, a seventh dielectric film which is the sixth dielectric film in a portion corresponding to the seventh metal porous body, and a seventh conductive film which is the sixth conductive film in a portion corresponding to the seventh dielectric film
  • the eighth capacitance-forming portion includes an eighth metal porous body which is the sixth metal porous body in a portion defining the eighth capacitance-forming portion, an eighth dielectric film which is the sixth dielectric film in a portion corresponding to the eighth metal porous body, and an eighth conductive film which is the sixth conductive film in a portion corresponding
  • 1A-1C capacitor 10 insulating substrate, 10a first main surface, 10b second main surface, 11 first through hole, 12 second through hole, 13 first via conductor, 14 second via conductor, 15, 15A-15C metal wall portion, 15h metal wall groove, 16 first bump, 17 second bump, 18, 18A-18E partition portion, 18h partition groove, 20, 20A-20K capacitance forming portion, 21, 21A-21K metal porous body, 21a metal particles, 21b binder, 21p conductive paste, 22, 22A-22K dielectric film, 23, 23A-23K conductive film, 24 first resist film, 25 second resist film, 30 sealing portion, 30a outer surface.

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JP2004128333A (ja) * 2002-10-04 2004-04-22 Shinko Electric Ind Co Ltd 薄膜コンデンサ装置、その実装モジュール及び製造方法
JP2005032981A (ja) * 2003-07-14 2005-02-03 Shinko Electric Ind Co Ltd キャパシタ装置及びその製造方法
WO2019021827A1 (ja) * 2017-07-26 2019-01-31 株式会社村田製作所 キャパシタ
WO2021193616A1 (ja) * 2020-03-24 2021-09-30 株式会社村田製作所 コンデンサ
WO2023145110A1 (ja) * 2022-01-31 2023-08-03 株式会社村田製作所 コンデンサ

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JP2008130722A (ja) * 2006-11-20 2008-06-05 Matsushita Electric Ind Co Ltd 固体電解コンデンサ内蔵回路基板とその製造方法
JP5105479B2 (ja) * 2008-02-13 2012-12-26 Ｎｅｃトーキン株式会社 固体電解コンデンサ
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JP7180561B2 (ja) * 2019-03-29 2022-11-30 株式会社村田製作所 コンデンサアレイ、及び、複合電子部品
TW202348104A (zh) * 2020-09-01 2023-12-01 日商村田製作所股份有限公司 半導體複合裝置及半導體複合裝置之製造方法

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JP2000031387A (ja) * 1998-07-14 2000-01-28 Fuji Electric Co Ltd 誘電体薄膜コンデンサの製造方法
JP2004128333A (ja) * 2002-10-04 2004-04-22 Shinko Electric Ind Co Ltd 薄膜コンデンサ装置、その実装モジュール及び製造方法
JP2005032981A (ja) * 2003-07-14 2005-02-03 Shinko Electric Ind Co Ltd キャパシタ装置及びその製造方法
WO2019021827A1 (ja) * 2017-07-26 2019-01-31 株式会社村田製作所 キャパシタ
WO2021193616A1 (ja) * 2020-03-24 2021-09-30 株式会社村田製作所 コンデンサ
WO2023145110A1 (ja) * 2022-01-31 2023-08-03 株式会社村田製作所 コンデンサ

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