WO2024116743A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
WO2024116743A1
WO2024116743A1 PCT/JP2023/040000 JP2023040000W WO2024116743A1 WO 2024116743 A1 WO2024116743 A1 WO 2024116743A1 JP 2023040000 W JP2023040000 W JP 2023040000W WO 2024116743 A1 WO2024116743 A1 WO 2024116743A1
Authority
WO
WIPO (PCT)
Prior art keywords
thickness direction
heat sink
semiconductor device
insulating layer
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/040000
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
謙吾 柏木
幸太 伊勢
泰紀 高田
卓郎 中原
弘匡 河野
翔吾 白石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2024561286A priority Critical patent/JPWO2024116743A1/ja
Publication of WO2024116743A1 publication Critical patent/WO2024116743A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Definitions

  • This disclosure relates to a semiconductor device.
  • Patent Document 1 discloses an example of a conventional semiconductor device.
  • the semiconductor device disclosed in the document comprises a semiconductor element, multiple leads, and sealing resin.
  • the semiconductor element is supported by the leads.
  • the semiconductor element is a transistor with a switching function.
  • An electrode (source electrode) of the semiconductor element on the lead is connected to the other leads by multiple wires.
  • the sealing resin covers a part of each lead, the semiconductor element, and the multiple wires.
  • the semiconductor device of Patent Document 1 by connecting multiple wires to the source electrode of the semiconductor element, it is suitable for passing a large current and can handle high output.
  • the output of the semiconductor device increases, there are effects such as an increase in the amount of heat generated by the semiconductor element, and there is a demand for improving the heat dissipation and voltage resistance of the semiconductor device.
  • One of the objectives of this disclosure is to provide a semiconductor device that is an improvement over conventional semiconductor devices.
  • one of the objectives of this disclosure is to provide a semiconductor device that is suitable for improving heat dissipation and voltage resistance.
  • a semiconductor device provided by one aspect of the present disclosure includes a first lead including a die pad portion having a first main surface facing one side in the thickness direction and a first back surface facing the other side in the thickness direction, a semiconductor element supported on the first main surface, a conductive portion disposed on one side of the semiconductor element in the thickness direction and conductively joined to the semiconductor element, at least a part of the die pad portion and a sealing resin covering the semiconductor element, and a first heat sink fixed to one side of the conductive portion in the thickness direction and having a higher thermal conductivity than the sealing resin.
  • the first heat sink includes a first insulating layer overlapping the conductive portion when viewed in the thickness direction, and has a first heat sink facing one side in the thickness direction.
  • the sealing resin has a resin main surface facing one side in the thickness direction, and a resin back surface separated from the resin main surface to the other side in the thickness direction and facing the other side in the thickness direction. The first heat sink is exposed from the resin main surface.
  • the above configuration makes it possible to improve the heat dissipation and voltage resistance of the semiconductor device.
  • FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present disclosure.
  • FIG. 2 is a bottom view showing the semiconductor device according to the first embodiment of the present disclosure.
  • Figure 3 is a plan view (transparent to the sealing resin and first heat sink) showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 4 is a cross-sectional view taken along line IV-IV in FIG.
  • FIG. 5 is a cross-sectional view taken along line VV in FIG.
  • FIG. 6 is a cross-sectional view taken along line VI-VI in FIG.
  • FIG. 7 is a cross-sectional view similar to FIG. 4, showing a semiconductor device according to a first modification of the first embodiment.
  • FIG. 4 is a cross-sectional view taken along line IV-IV in FIG.
  • FIG. 5 is a cross-sectional view taken along line VV in FIG.
  • FIG. 6 is a cross-sectional view taken along line VI-VI in FIG.
  • FIG. 7 is
  • FIG. 8 is a plan view showing a semiconductor device according to a second modification of the first embodiment.
  • FIG. 9 is a plan view (permeable to the sealing resin and the first heat sink) showing a semiconductor device according to a second modification of the first embodiment.
  • FIG. 10 is a cross-sectional view taken along line XX in FIG.
  • FIG. 11 is a cross-sectional view taken along line XI-XI in FIG.
  • FIG. 12 is a cross-sectional view taken along line XII-XII in FIG.
  • FIG. 13 is a plan view showing a semiconductor device according to a second embodiment of the present disclosure.
  • FIG. 14 is a bottom view showing the semiconductor device according to the second embodiment of the present disclosure.
  • FIG. 15 is a plan view (with the sealing resin and the first heat sink transparent) showing the semiconductor device according to the second embodiment of the present disclosure.
  • FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG.
  • FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG.
  • FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG.
  • FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG.
  • FIG. 20 is a cross-sectional view similar to FIG. 17, showing a semiconductor device according to a first modification of the second embodiment.
  • an object A is formed on an object B" and “an object A is formed on an object B” include “an object A is formed directly on an object B” and “an object A is formed on an object B with another object interposed between the object A and the object B” unless otherwise specified.
  • an object A is disposed on an object B” and “an object A is disposed on an object B” include “an object A is disposed directly on an object B” and “an object A is disposed on an object B with another object interposed between the object A and the object B" unless otherwise specified.
  • an object A is located on an object B includes “an object A is located on an object B in contact with an object B” and “an object A is located on an object B with another object interposed between the object A and the object B” unless otherwise specified.
  • an object A overlaps an object B when viewed in a certain direction includes “an object A overlaps the entire object B” and “an object A overlaps a part of an object B.”
  • a surface A faces (one side or the other side of) direction B” is not limited to the case where the angle of surface A with respect to direction B is 90 degrees, but also includes the case where surface A is tilted with respect to direction B.
  • the semiconductor device A10 includes a first lead 1A, a second lead 1B, a third lead 1C, a semiconductor element 2, a conductive member 3, a first heat sink 4, conductive bonding materials 61, 62, and 63, a bonding material 64, and a sealing resin 7.
  • FIG. 1 is a plan view showing semiconductor device A10.
  • FIG. 2 is a bottom view showing semiconductor device A10.
  • FIG. 3 is a plan view showing semiconductor device A10.
  • FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 3.
  • FIG. 5 is a cross-sectional view taken along line V-V in FIG. 3.
  • FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 3.
  • FIG. 3 shows the sealing resin 7 and first heat sink 4 through a transparent view. In these figures, the transparent sealing resin 7 and first heat sink 4 are shown by imaginary lines (double-dashed lines).
  • the thickness direction (direction when viewed in a plane) of the semiconductor element 2 is referred to as the "thickness direction z".
  • the direction perpendicular to the thickness direction z (the up-down direction in FIG. 1) is referred to as the "first direction x”.
  • the direction perpendicular to the thickness direction z and the first direction x (the left-right direction in FIG. 1) is referred to as the "second direction y”.
  • the semiconductor device A10 is approximately rectangular when viewed in the thickness direction z.
  • the upper side in FIG. 1 is referred to as the "x1 side of the first direction x" and the lower side in FIG.
  • the upper side in the figure is an example of “one side in the thickness direction” in this disclosure, and is called the “z1 side in the thickness direction z”
  • the lower side in the figure is an example of "the other side in the thickness direction” in this disclosure, and is called the “z2 side in the thickness direction z.”
  • the first lead 1A, the second lead 1B and the third lead 1C are formed, for example, by punching or bending a metal plate.
  • the materials constituting the first lead 1A, the second lead 1B and the third lead 1C are, for example, either copper (Cu) or nickel (Ni), or an alloy of these.
  • the thicknesses of the first lead 1A, the second lead 1B and the third lead 1C are, for example, 0.1 mm to 0.3 mm.
  • the first lead 1A is arranged at a distance from the second lead 1B and the third lead 1C in the first direction x.
  • the second lead 1B and the third lead 1C are aligned in the second direction y.
  • the first lead 1A, the second lead 1B and the third lead 1C are arranged at a distance from each other when viewed in the thickness direction z.
  • the size when viewed in the thickness direction z is the largest for the first lead 1A and the smallest for the third lead 1C.
  • the first lead 1A has a die pad portion 11 and multiple (four in this embodiment) terminal portions 12.
  • the die pad portion 11 is rectangular when viewed in the thickness direction z, for example.
  • the die pad portion 11 has a first main surface 111 and a first back surface 112.
  • the first main surface 111 faces the z1 side in the thickness direction z
  • the first back surface 112 faces the opposite side to the first main surface 111 (the z1 side in the thickness direction z).
  • the semiconductor element 2 is mounted on the first main surface 111.
  • the first back surface 112 is exposed from the sealing resin 7.
  • the first back surface 112 is a portion that is joined by a joining material such as solder when the semiconductor device A10 is mounted on a circuit board (not shown).
  • the multiple terminal portions 12 are located on the x1 side of the die pad portion 11 in the first direction x. Each of the multiple terminal portions 12 is connected to the x1 side of the die pad portion 11 in the first direction x and extends to the x1 side of the first direction x. The multiple terminal portions 12 are arranged at intervals in the second direction y. Each of the multiple terminal portions 12 has a back surface mounting portion 121.
  • the back surface mounting portion 121 faces the z2 side of the thickness direction z (the lower side in FIG. 4).
  • the back surface mounting portion 121 is exposed from the sealing resin 7.
  • the back surface mounting portion 121 is a portion that is joined by a joining material such as solder when the semiconductor device A10 is mounted on a circuit board (not shown).
  • the second lead 1B has a pad portion 13, multiple (three in this embodiment) terminal portions 14, and multiple (three in this embodiment) bent portions 15.
  • the pad portion 13 is located on the z1 side in the thickness direction z (upper side in Figure 4) with respect to the multiple terminal portions 14.
  • the pad portion 13 is located inward in the first direction x with respect to the multiple terminal portions 14.
  • the multiple terminal portions 14 are located on the x2 side in the first direction x with respect to the die pad portion 11 of the first lead 1A.
  • the multiple terminal portions 14 are arranged at intervals in the second direction y.
  • Each of the multiple terminal portions 14 has a back surface mounting portion 141.
  • the back surface mounting portion 141 faces the z2 side in the thickness direction z (the lower side in FIG. 4).
  • the back surface mounting portion 141 is exposed from the sealing resin 7.
  • the back surface mounting portion 141 is a portion that is joined by a joining material such as solder when the semiconductor device A10 is mounted on a circuit board (not shown).
  • the multiple bent portions 15 connect the pad portion 13 and the multiple terminal portions 14 separately, and are bent when viewed in the second direction y.
  • the third lead 1C has a pad portion 16, a terminal portion 17, and a bent portion 18.
  • the pad portion 16 is located on the z1 side of the terminal portion 17 in the thickness direction z (the upper side in Figure 5).
  • the pad portion 16 is also located inward in the first direction x with respect to the terminal portion 17.
  • the terminal portion 17 is located on the x2 side in the first direction x with respect to the die pad portion 11 of the first lead 1A.
  • the multiple terminal portions 14 of the second lead 1B and the terminal portion 17 of the third lead 1C are arranged at intervals in the second direction y.
  • the terminal portion 17 has a back surface mounting portion 171.
  • the back surface mounting portion 171 faces the z2 side in the thickness direction z (the lower side in FIG. 5).
  • the back surface mounting portion 171 is exposed from the sealing resin 7.
  • the back surface mounting portion 171 is a portion that is joined by a joining material such as solder when the semiconductor device A10 is mounted on a circuit board (not shown).
  • the bent portion 18 connects the pad portion 16 and the terminal portion 17, and has a bent shape when viewed in the second direction y.
  • the semiconductor element 2 is an element that performs the electrical function of the semiconductor device A10.
  • the semiconductor element 2 is a power semiconductor chip with a switching function, such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
  • the semiconductor element 2 may also be a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a diode.
  • the semiconductor element 2 has an element body 20, a source electrode 21, a drain electrode 22, and a gate electrode 23.
  • the element body 20 is rectangular when viewed in the thickness direction z.
  • the element body 20 has an element principal surface 201 and an element rear surface 202.
  • the element principal surface 201 and the element rear surface 202 face opposite each other in the thickness direction z.
  • the element principal surface 201 faces the same side as the first principal surface 111 of the die pad portion 11 in the thickness direction z. Therefore, the element rear surface 202 faces the first principal surface 111.
  • the source electrode 21 and the gate electrode 23 are disposed on the main surface 201 of the element.
  • the drain electrode 22 is disposed on the rear surface 202 of the element.
  • the constituent materials of the source electrode 21, the drain electrode 22 and the gate electrode 23 are, for example, copper or aluminum (Al), or an alloy of these.
  • the source electrode 21 covers most of the element's main surface 201. Specifically, the source electrode 21 is disposed in the rectangular element's main surface 201, excluding the periphery and one corner (the lower right corner in FIG. 3). The gate electrode 23 is disposed in one corner of the element's main surface 201 (the lower right corner in FIG. 3). The drain electrode 22 covers substantially the entire element's back surface 202.
  • the drain electrode 22 is electrically joined to the first main surface 111 (die pad portion 11) via a conductive bonding material 62.
  • the conductive bonding material 62 electrically connects the die pad portion 11 and the drain electrode 22.
  • the conductive bonding material 62 is, for example, solder.
  • the semiconductor device A10 includes a wire 68. As shown in FIG. 3 and FIG. 5, the wire 68 is electrically connected to the gate electrode 23 and the pad portion 16 of the third lead 1C. The wire 68 electrically connects the gate electrode 23 and the third lead 1C.
  • the conductive member 3 is joined to the source electrode 21 of the semiconductor element 2 and the second lead 1B.
  • the conductive member 3 is made of a metal plate material.
  • the conductive member 3 is made of, for example, copper or a copper alloy.
  • the conductive member 3 is, for example, a metal plate material that has been punched or bent.
  • the conductive member 3 has a conductive portion 31, a lead-side joint portion 32, and an intermediate portion 33. As shown in Figure 4, the conductive portion 31, the lead-side joint portion 32, and the intermediate portion 33 are appropriately bent and connected when viewed in the second direction y.
  • the conductive portion 31 is disposed on the z1 side of the semiconductor element 2 in the thickness direction z.
  • the conductive portion 31 is joined to the source electrode 21 via a conductive bonding material 61.
  • the conductive bonding material 61 conductively bonds the conductive portion 31 (conductive member 3) and the source electrode 21.
  • the conductive bonding material 61 is, for example, solder.
  • the conductive portion 31 has a conductive principal surface 311.
  • the conductive principal surface 311 faces the z1 side in the thickness direction z.
  • the lead-side joint 32 is joined to the pad 13 of the second lead 1B via a conductive adhesive 63.
  • the conductive adhesive 63 electrically connects the lead-side joint 32 (conductive member 3) and the pad 13 (second lead 1B).
  • the conductive adhesive 63 is, for example, solder.
  • the lead-side joint 32 has a convex portion located on the z2 side (lower side in the figure) in the thickness direction z from the surrounding area. When the pad 13 and the lead-side joint 32 are joined, the convex portion is pressed against the pad 13, and a sufficient amount of conductive adhesive 63 is present around the convex portion. This allows the electrical continuity between the lead-side joint 32 and the pad 13 to be properly maintained.
  • the intermediate portion 33 is located between the conductive portion 31 and the lead side joint portion 32 in the first direction x.
  • the intermediate portion 33 is connected to both the conductive portion 31 and the lead side joint portion 32.
  • the conductive portion 31 is conductive to the pad portion 13 (second lead 1B) via the intermediate portion 33 and the lead side joint portion 32.
  • the conductive member 3 forms a path for the main current switched by the semiconductor element 2.
  • the conductive portion 31 is thicker than the lead-side joint portion 32 and the intermediate portion 33.
  • the intermediate portion 33 is formed integrally with the conductive portion 31.
  • the intermediate portion 33 is connected to an end portion of the conductive portion 31 closer to the y2 side in the second direction y and closer to the z2 side in the thickness direction z, and extends to the x2 side in the first direction x.
  • the conductive member 3 having the conductive portion 31 is not limited to the above configuration.
  • the conductive member 3 may be configured such that the conductive portion 31, the lead-side joint portion 32, and the intermediate portion 33 each have a substantially uniform thickness.
  • the first heat sink 4 is disposed on the z1 side of the conductive portion 31 in the thickness direction z.
  • the first heat sink 4 is fixed to the conductive main surface 311 (conductive portion 31).
  • the first heat sink 4 includes a first insulating layer 41, a first metal layer 42, and a second metal layer 43 that are stacked on top of each other.
  • the first heat sink 4 is composed of, for example, a DBC (Direct Bonded Copper) substrate.
  • the first insulating layer 41 is made of a material having a relatively high thermal conductivity, such as ceramics.
  • the material of the first insulating layer 41 is not particularly limited, and examples of the material include alumina ( Al2O3 ), aluminum nitride (AlN), and silicon nitride ( Si3N4 ).
  • the first insulating layer 41 may be made of an insulating resin sheet in addition to ceramics.
  • the first insulating layer 41 is rectangular when viewed in the thickness direction z.
  • the first metal layer 42 is laminated on the z1 side of the first insulating layer 41 in the thickness direction z.
  • the material of the first metal layer 42 is not particularly limited, and may include, for example, copper.
  • the material of the first metal layer 42 may include aluminum instead of copper.
  • the second metal layer 43 is laminated on the z2 side of the first insulating layer 41 in the thickness direction z.
  • the constituent material of the second metal layer 43 is the same as the constituent material of the first metal layer 42.
  • the second metal layer 43 is bonded to the conductive main surface 311 (conductive portion 31) via a bonding material 64.
  • the conductive main surface 311 is an example of a fixing portion to which the second metal layer 43 (first heat sink 4) is fixed.
  • the bonding material 64 may be conductive or insulating, and is, for example, solder.
  • the first metal layer 42 and the second metal layer 43 are each rectangular when viewed in the thickness direction z.
  • the first insulating layer 41 has a size larger than each of the first metal layer 42 and the second metal layer 43 when viewed in a plan view (when viewed in the thickness direction z).
  • the first insulating layer 41 overlaps each of the first metal layer 42, the second metal layer 43, and the conductive portion 31 of the conductive member 3 when viewed in the thickness direction z.
  • the first insulating layer 41 overlaps each of the first metal layer 42, the second metal layer 43, and the conductive portion 31 when viewed in the thickness direction z.
  • the first metal layer 42 has a first heat dissipation surface 421.
  • the first heat dissipation surface 421 faces the z1 side in the thickness direction z.
  • the first heat dissipation surface 421 is exposed from the sealing resin 7.
  • the sealing resin 7 covers a portion each of the first lead 1A, the second lead 1B, and the third lead 1C, the semiconductor element 2, the wire 68, the conductive member 3, and a portion of the first heat sink 4.
  • the sealing resin 7 is made of, for example, a black epoxy resin.
  • the thermal conductivity of the first heat sink 4 (each of the first insulating layer 41, the first metal layer 42, and the second metal layer 43) is higher than the thermal conductivity of the sealing resin 7.
  • the sealing resin 7 has a resin main surface 71, a resin back surface 72, and resin side surfaces 73 to 76.
  • the resin main surface 71 and the resin back surface 72 face opposite sides in the thickness direction z.
  • the resin main surface 71 faces the z1 side in the thickness direction z, and faces the same side as the element main surface 201 and the first main surface 111.
  • the resin main surface 71 is in the shape of a frame surrounding the first heat dissipation surface 421 of the first metal layer 42 of the first heat sink 4 in a plan view (viewed in the thickness direction z).
  • the first heat dissipation surface 421 is exposed from this resin main surface 71.
  • the first heat dissipation surface 421 is flush with the resin main surface 71.
  • the first heat dissipation surface 421 may be located on the z1 side of the thickness direction z from the resin main surface 71, unlike the illustrated example.
  • the first metal layer 42 including the first heat dissipation surface 421 protrudes from the resin main surface 71 toward the z1 side in the thickness direction z.
  • the first heat dissipation surface 421 may also be located on the z2 side in the thickness direction z from the resin main surface 71.
  • the first metal layer 42 including the first heat dissipation surface 421 is recessed from the resin main surface 71 toward the z2 side in the thickness direction z.
  • the resin back surface 72 faces the z2 side in the thickness direction z, and faces the same side as the element back surface 202 and the first back surface 112. As shown in FIG. 2, the first back surface 112 of the die pad portion 11 is exposed from this resin back surface 72.
  • the first back surface 112 is, for example, flush with the resin back surface 72.
  • the back surface mounting portion 121 of each of the multiple terminal portions 12, the back surface mounting portion 141 of each of the multiple terminal portions 14, and the back surface mounting portion 171 of the terminal portion 17 are exposed from the resin back surface 72.
  • the first back surface 112 of the die pad portion 11 may be covered with the sealing resin 7, unlike the example shown in the figure.
  • Each of the resin side surfaces 73 to 76 is connected to the resin main surface 71 and the resin back surface 72, and is sandwiched between the resin main surface 71 and the resin back surface 72 in the thickness direction z.
  • the resin side surface 73 and the resin side surface 74 face opposite each other in the first direction x.
  • the resin side surface 73 faces the x1 side of the first direction x
  • the resin side surface 74 faces the x2 side of the first direction x.
  • the resin side surface 75 and the resin side surface 76 face opposite each other in the second direction y.
  • the resin side surface 75 faces the y1 side of the second direction y
  • the resin side surface 76 faces the y2 side of the second direction y.
  • each of the multiple terminal portions 12 protrudes from the resin side surface 73.
  • a portion of each of the multiple terminal portions 14 and the terminal portion 17 protrudes from the resin side surface 74.
  • the resin side surfaces 73 to 76 are each slightly inclined with respect to the thickness direction z.
  • the shapes of the sealing resin 7 shown in Figures 1, 2, and 4 to 6 are examples. The shape of the sealing resin 7 is not limited to the illustrated shapes.
  • the semiconductor device A10 includes a semiconductor element 2 supported on the first main surface 111 of the die pad portion 11 (first lead 1A), a conductive portion 31 conductively joined to the z1 side of the thickness direction z of the semiconductor element 2, and a first heat sink 4 fixed to the z1 side of the thickness direction z of the conductive portion 31.
  • the first heat sink 4 has a first heat sink surface 421 facing the z1 side of the thickness direction z, and the first heat sink surface 421 is exposed from the resin main surface 71 of the sealing resin 7.
  • the thermal conductivity of the first heat sink 4 is higher than that of the sealing resin 7.
  • the first heat sink surface 421 faces the opposite side to the first back surface 112, which is the mounting surface of the first lead 1A (die pad portion 11).
  • a heat sink (not shown) or the like to this first heat dissipation surface 421
  • heat generated by the semiconductor element 2 can be efficiently dissipated from the side opposite the die pad portion 11 (the z1 side in the thickness direction z) of the semiconductor element 2.
  • the first heat sink 4 includes a first insulating layer 41 that overlaps with the conductive portion 31 when viewed from the z1 side in the thickness direction z.
  • the semiconductor device A10 configured as described above can improve heat dissipation and voltage resistance.
  • the first heat sink 4 includes a first insulating layer 41, a first metal layer 42, and a second metal layer 43 stacked on top of each other.
  • the first metal layer 42 is stacked on the z1 side of the first insulating layer 41 in the thickness direction z, and has a first heat sink surface 421.
  • the second metal layer 43 is stacked on the z2 side of the first insulating layer 41 in the thickness direction z, and is joined to the conductive main surface 311 (conductive portion 31).
  • the first heat sink 4 configured as described above can be configured, for example, from a DBC substrate.
  • the semiconductor device A10 equipped with this first heat sink 4 has a structure suitable for improving heat dissipation and voltage resistance.
  • the first insulating layer 41 of the first heat sink 4 overlaps the entire conductive main surface 311 to which the first heat sink 4 is fixed in the conductive portion 31 when viewed in the thickness direction z. This configuration is more preferable in terms of improving the voltage resistance of the semiconductor device A10.
  • Fig. 7 shows a semiconductor device according to a first modification of the first embodiment.
  • Fig. 7 is a cross-sectional view showing a semiconductor device A11 of this modification, and shows the same cross section as Fig. 4 shown in the above embodiment.
  • elements that are the same as or similar to the semiconductor device A10 of the above embodiment are given the same reference numerals as in the above embodiment, and descriptions thereof will be omitted as appropriate.
  • the configuration of the first heat sink 4 differs from that of the semiconductor device A10 of the above embodiment.
  • the first heat sink 4 includes a conductive plate 44 and a first insulating layer 45.
  • the conductive plate 44 is made of, for example, a metal plate material.
  • the material of the conductive plate 44 is, for example, copper or a copper alloy.
  • the conductive plate 44 is rectangular when viewed in the thickness direction z.
  • the lower surface of the conductive plate 44 (the surface facing the z2 side in the thickness direction z) is joined to the conductive main surface 311 (conductive portion 31) via a joining material 64.
  • the first insulating layer 45 is disposed on the z1 side of the conductor plate 44 in the thickness direction z, and is joined to the conductor plate 44.
  • the first insulating layer 45 is, for example, rectangular when viewed in the thickness direction z. When viewed in the thickness direction z, the first insulating layer 45 overlaps the entire conductor plate 44 and the entire conductive main surface 311.
  • the first insulating layer 45 covers the entire upper surface of the conductor plate 44 (the surface facing the z1 side in the thickness direction z) and a part of the resin main surface 71 of the sealing resin 7.
  • the first insulating layer 45 is made of a material with a relatively high thermal conductivity.
  • the configuration of the first insulating layer 45 is not particularly limited, and is made of, for example, a ceramic sheet or an insulating resin sheet.
  • the first insulating layer 45 has a first heat dissipation surface 451 facing the z1 side in the thickness direction z.
  • the first heat dissipation surface 451 is exposed from the sealing resin 7.
  • the first heat dissipation surface 451 is located on the z1 side in the thickness direction z of the main resin surface 71 of the sealing resin 7.
  • the thermal conductivity of the above-mentioned first heat sink 4 (each of the conductive plate 44 and the first insulating layer 45) is higher than the thermal conductivity of the sealing resin 7.
  • the semiconductor device A11 includes a semiconductor element 2 supported on the first main surface 111 of the die pad portion 11 (first lead 1A), a conductive portion 31 conductively joined to the z1 side of the thickness direction z of the semiconductor element 2, and a first heat sink 4 fixed to the z1 side of the thickness direction z of the conductive portion 31.
  • the first heat sink 4 has a first heat sink surface 451 facing the z1 side of the thickness direction z, and the first heat sink surface 451 is exposed from the resin main surface 71 of the sealing resin 7.
  • the thermal conductivity of the first heat sink 4 is higher than that of the sealing resin 7.
  • the first heat sink surface 451 faces the opposite side to the first back surface 112, which is the mounting surface of the first lead 1A (die pad portion 11).
  • a heat sink (not shown) or the like to this first heat dissipation surface 451
  • heat generated by the semiconductor element 2 can be efficiently dissipated from the side opposite the die pad portion 11 (the z1 side in the thickness direction z) of the semiconductor element 2.
  • the first heat sink 4 includes a first insulating layer 45 that overlaps with the conductive portion 31 when viewed from the z1 side in the thickness direction z.
  • the semiconductor device A11 having the above configuration can improve heat dissipation and voltage resistance.
  • the first insulating layer 45 of the first heat sink 4 overlaps the entire conductive main surface 311 to which the first heat sink 4 is fixed in the conductive portion 31 when viewed in the thickness direction z. This configuration is more preferable in terms of improving the voltage resistance of the semiconductor device A11.
  • Second modification of the first embodiment 8 to 12 show a semiconductor device according to a second modified example of the first embodiment.
  • Fig. 8 is a plan view showing a semiconductor device A12 of this modified example.
  • Fig. 9 is a plan view showing the semiconductor device A12 of this modified example (transmitting the sealing resin and the first heat sink).
  • Fig. 10 is a cross-sectional view taken along line X-X in Fig. 9.
  • Fig. 11 is a cross-sectional view taken along line XI-XI in Fig. 9.
  • Fig. 12 is a cross-sectional view taken along line XII-XII in Fig. 9.
  • the configurations of the first heat sink 4 and the conductive member 3 are different from those of the semiconductor device A10 of the above embodiment.
  • the first heat sink 4 includes a first insulating layer 46 and a third metal layer 47.
  • the conductive member 3 has a conductive portion 35, a lead-side joint portion 36, and an intermediate portion 37.
  • the first heat sink 4 is disposed on the z1 side of the conductive member 3 (conductive portion 35) in the thickness direction z.
  • the first insulating layer 46 is made of a material with a relatively high thermal conductivity, such as ceramics.
  • the material of the first insulating layer 46 is not particularly limited, and examples of the material include alumina, aluminum nitride, and silicon nitride.
  • the first insulating layer 46 may be made of an insulating resin sheet in addition to ceramics.
  • the first insulating layer 46 is rectangular when viewed in the thickness direction z.
  • the third metal layer 47 is laminated on the z1 side of the first insulating layer 46 in the thickness direction z.
  • the material of the third metal layer 47 is not particularly limited, and may include, for example, copper.
  • the material of the third metal layer 47 may include aluminum instead of copper.
  • the third metal layer 47 is rectangular when viewed in the thickness direction z.
  • the third metal layer 47 has a first heat dissipation surface 471.
  • the first heat dissipation surface 471 faces the z1 side in the thickness direction z.
  • the first heat dissipation surface 471 is exposed from the resin main surface 71 of the sealing resin 7. In the illustrated example, the first heat dissipation surface 471 is flush with the resin main surface 71.
  • the thermal conductivity of the first heat sink 4 (each of the first insulating layer 46 and the third metal layer 47) is higher than the thermal conductivity of the sealing resin 7.
  • the conductive member 3 (conductive portion 35, lead-side joint portion 36, and intermediate portion 37) are laminated on the z2 side of the first insulating layer 45 in the thickness direction z.
  • the constituent material of the conductive member 3 is the same as the constituent material of the third metal layer 47.
  • the first heat sink 4 (first insulating layer 46 and third metal layer 47) and the conductive member 3 are composed of, for example, a DBC substrate.
  • the conductive portion 35 is bonded to the source electrode 21 of the semiconductor element 2 via a conductive bonding material 61.
  • the conductive bonding material 61 conductively bonds the conductive portion 35 (conductive member 3) and the source electrode 21.
  • the conductive bonding material 61 is, for example, solder.
  • the conductive portion 35 has a conductive main surface 351.
  • the conductive main surface 351 faces the z1 side in the thickness direction z.
  • the conductive main surface 351 is an example of a fixing portion to which the first insulating layer 46 (first heat sink 4) is fixed.
  • the lead-side joint 36 is joined to the pad portion 13 of the second lead 1B via a conductive bonding material 63.
  • the conductive bonding material 63 electrically connects the lead-side joint 32 (conductive member 3) and the pad portion 13 (second lead 1B).
  • the conductive bonding material 63 is, for example, solder.
  • the intermediate portion 37 is located between the conductive portion 35 and the lead side joint portion 36 in the first direction x.
  • the intermediate portion 37 is connected to both the conductive portion 35 and the lead side joint portion 36.
  • the conductive portion 35 is conductive to the pad portion 13 (second lead 1B) via the intermediate portion 37 and the lead side joint portion 36.
  • the conductive member 3 forms a path for the main current switched by the semiconductor element 2.
  • the intermediate portion 37 is connected to the conductive portion 35 toward the y2 side in the second direction y, and extends toward the x2 side in the first direction x.
  • the semiconductor device A12 of this modified example includes a conductive member 69 instead of the wire 68 of the above embodiment.
  • the conductive member 69 is bonded to the gate electrode 23 of the semiconductor element 2 and the third lead 1C.
  • the conductive member 69 is, for example, made of a metal plate material.
  • the conductive member 69 is made of, for example, copper or a copper alloy.
  • the conductive member 69 is, for example, a metal plate material that has been punched or bent.
  • the conductive member 69 has an element-side joint 691, a lead-side joint 692, and an intermediate portion 693. As shown in FIG. 11, the element-side joint 691, the lead-side joint 692, and the intermediate portion 693 are appropriately bent and connected when viewed in the second direction y.
  • the element-side joint 691 is joined to the gate electrode 23 via a conductive joint material 65.
  • the conductive joint material 65 electrically connects the element-side joint 691 and the gate electrode 23.
  • the conductive joint material 65 is, for example, solder.
  • the lead-side joint 692 is joined to the pad 16 of the third lead 1C via a conductive joint material 66.
  • the conductive joint material 66 electrically connects the lead-side joint 692 (conductive member 69) and the pad 16 (third lead 1C).
  • the conductive joint material 66 is, for example, solder.
  • the intermediate portion 693 is located between the element-side joint 691 and the lead-side joint 692 in the first direction x.
  • the intermediate portion 693 is connected to both the element-side joint 691 and the lead-side joint 692.
  • the element-side joint 691 is electrically connected to the pad 16 (third lead 1C) via the intermediate portion 693 and the lead-side joint 692.
  • the first insulating layer 46 of the first heat sink 4 is larger in size in a plan view (as viewed in the thickness direction z) than both the third metal layer 47 and the conductive portion 35.
  • the first insulating layer 46 overlaps with both the third metal layer 47 and the conductive member 3 (conductive portion 35).
  • the first insulating layer 46 overlaps with all of both the third metal layer 47 and the conductive portion 35.
  • the semiconductor device A12 includes a semiconductor element 2 supported on the first main surface 111 of the die pad portion 11 (first lead 1A), a conductive portion 35 conductively joined to the z1 side of the thickness direction z of the semiconductor element 2, and a first heat sink 4 fixed to the z1 side of the thickness direction z of the conductive portion 31.
  • the first heat sink 4 has a first heat sink surface 471 facing the z1 side of the thickness direction z, and the first heat sink surface 471 is exposed from the resin main surface 71 of the sealing resin 7.
  • the thermal conductivity of the first heat sink 4 is higher than that of the sealing resin 7.
  • the first heat sink surface 471 faces the opposite side to the first back surface 112, which is the mounting surface of the first lead 1A (die pad portion 11).
  • a heat sink (not shown) or the like to this first heat dissipation surface 471
  • heat generated by the semiconductor element 2 can be efficiently dissipated from the side opposite the die pad portion 11 (the z1 side in the thickness direction z) of the semiconductor element 2.
  • the first heat sink 4 includes a first insulating layer 46 that overlaps with the conductive portion 35 when viewed from the z1 side in the thickness direction z.
  • the semiconductor device A12 configured as described above can improve heat dissipation and voltage resistance.
  • the first heat sink 4 includes a first insulating layer 46 and a third metal layer 47.
  • the third metal layer 47 is laminated on the z1 side of the first insulating layer 46 in the thickness direction z, and has a first heat sink surface 471.
  • the conductive portion 35 is laminated on the z2 side of the first insulating layer 46 in the thickness direction z.
  • the first heat sink 4 and conductive member 3 configured as described above can be configured, for example, from a DBC substrate.
  • the semiconductor device A12 including this first heat sink 4 and conductive member 3 has a structure suitable for improving heat dissipation and voltage resistance.
  • the first insulating layer 46 of the first heat sink 4 overlaps the entire conductive main surface 351 to which the first heat sink 4 is fixed in the conductive portion 35 when viewed in the thickness direction z. This configuration is more preferable for improving the voltage resistance of the semiconductor device A12.
  • FIG. 13 to 19 show a semiconductor device according to the second embodiment of the present disclosure.
  • FIG. 13 is a plan view showing the semiconductor device A20 of this embodiment.
  • FIG. 14 is a bottom view showing the semiconductor device A20.
  • FIG. 15 is a plan view showing the semiconductor device A20 (through the sealing resin and the first heat sink).
  • FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 15.
  • FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 15.
  • FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 15.
  • FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 15.
  • the semiconductor device A20 includes a first lead 1A, a plurality of lead terminals 191, a plurality of lead terminals 192, a plurality of semiconductor elements 2, a plurality of conductive members 3, a first heat sink 4, a second heat sink 5, conductive bonding materials 61, 62, and 63, bonding materials 64 and 671, and a sealing resin 7.
  • the first lead 1A has a die pad portion 11, an extension portion 125, and a terminal portion 126.
  • the first back surface 112 of the die pad portion 11 is exposed from the sealing resin 7. Meanwhile, in this embodiment, the fourth metal layer 52 of the second heat sink 5, which will be described later, is joined to this first back surface 112.
  • the extension portion 125 is located on the x2 side in the first direction x with respect to the die pad portion 11.
  • the extension portion 125 is connected to the x2 side in the first direction x of the die pad portion 11 and extends to the x2 side in the first direction x.
  • the extension portion 125 is connected to the center of the die pad portion 11 in the second direction y.
  • the terminal portion 126 is connected to the x2 side in the first direction x of the extension portion 125 and extends to the x2 side in the first direction x.
  • a part of the terminal portion 126 is exposed from the sealing resin 7.
  • the part of the terminal portion 126 exposed from the sealing resin 7 extends from the resin side surface 74 to the x2 side in the first direction x.
  • the multiple (two in this embodiment) lead terminals 191 each extend in the first direction x.
  • the two lead terminals 191 are arranged on either side of the terminal portion 126 in the second direction y.
  • a portion of each lead terminal 191 is exposed from the sealing resin 7.
  • the portion of the lead terminal 191 exposed from the sealing resin 7 extends from the resin side surface 74 to the x2 side in the first direction x.
  • the multiple lead terminals 192 (two in this embodiment) each extend in the first direction x.
  • the two lead terminals 192 are arranged on either side of the terminal portion 126 and the two lead terminals 191 in the second direction y.
  • a portion of each lead terminal 192 is exposed from the sealing resin 7.
  • the portion of the lead terminal 192 exposed from the sealing resin 7 extends from the resin side surface 74 to the x2 side in the first direction x.
  • the portions of the terminal portion 126, the multiple lead terminals 191, and the multiple lead terminals 192 exposed from the sealing resin 7 are aligned in the thickness direction z and overlap each other when viewed in the second direction y.
  • the multiple (two in this embodiment) semiconductor elements 2 are supported on the first main surface 111 of the die pad portion 11 and are arranged spaced apart from each other in the second direction y.
  • the type of the multiple (two) semiconductor elements 2 is not particularly limited, and in this embodiment, the semiconductor element 2 is a power semiconductor chip having a switching function, such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
  • the semiconductor element 2 may be a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a diode. As shown in Figures 15, 17 to 19, the semiconductor element 2 has an element body 20, a source electrode 21, a drain electrode 22 and a gate electrode 23.
  • the configuration of each semiconductor element 2 is the same as in the above embodiment.
  • the source electrode 21 covers most of the element's main surface 201. Specifically, the source electrode 21 is disposed in the rectangular element's main surface 201, excluding the periphery and one corner.
  • the gate electrode 23 is disposed in one corner of the element's main surface 201.
  • the drain electrode 22 covers substantially the entire element's back surface 202.
  • the drain electrodes 22 of the two semiconductor elements 2 are electrically bonded to the first main surface 111 (die pad portion 11) via a conductive bonding material 62.
  • the conductive bonding material 62 electrically bonds the die pad portion 11 and the drain electrodes 22.
  • Each drain electrode 22 is electrically connected to the terminal portion 126 via the die pad portion 11 and the extension portion 125.
  • the semiconductor device A10 has multiple (two) wires 68. As shown in FIG. 15 and FIG. 18, the wires 68 are electrically connected to the gate electrode 23 of one of the two semiconductor elements 2 and one of the two lead terminals 192. The wires 68 electrically connect the gate electrodes 23 and the lead terminals 192.
  • the two conductive members 3 are arranged to correspond to the two semiconductor elements 2, respectively. Each conductive member 3 is joined to the source electrode 21 of the semiconductor element 2 and to the lead terminal 191.
  • the conductive member 3 is made of a metal plate material.
  • the conductive member 3 is made of, for example, copper or a copper alloy.
  • the conductive member 3 is, for example, a metal plate material that has been punched or bent.
  • the conductive member 3 has a conductive portion 31, a lead-side joint portion 32, and an intermediate portion 33. As shown in Figure 17, the conductive portion 31, the lead-side joint portion 32, and the intermediate portion 33 are appropriately bent and connected when viewed in the second direction y.
  • the conductive portion 31 is disposed on the z1 side of the semiconductor element 2 in the thickness direction z.
  • the conductive portion 31 is bonded to the source electrode 21 via a conductive bonding material 61.
  • the conductive bonding material 61 conductively bonds the conductive portion 31 (conductive member 3) and the source electrode 21.
  • the conductive portion 31 has a conductive main surface 311 facing the z1 side of the thickness direction z.
  • the lead-side joint 32 is joined to the end of the lead terminal 191 on the x1 side in the first direction x via a conductive bonding material 63.
  • the conductive bonding material 63 electrically connects the lead-side joint 32 (conductive member 3) and the lead terminal 191.
  • the intermediate portion 33 is located between the conductive portion 31 and the lead side joint portion 32 in the first direction x.
  • the intermediate portion 33 is connected to both the conductive portion 31 and the lead side joint portion 32.
  • the conductive portion 31 is electrically connected to the lead terminal 191 via the intermediate portion 33 and the lead side joint portion 32.
  • each source electrode 21 is electrically connected to the lead terminal 191 via the conductive member 3.
  • the first heat sink 4 is disposed on the z1 side of the conductive portion 31 in the thickness direction z.
  • the first heat sink 4 is fixed to the conductive main surface 311 (conductive portion 31).
  • the first heat sink 4 includes a first insulating layer 41, a first metal layer 42, and a second metal layer 43 that are stacked on top of each other.
  • the first heat sink 4 is composed of, for example, a DBC (Direct Bonded Copper) substrate.
  • the configuration of the first heat sink 4 is similar to that of the first heat sink 4 in the semiconductor device A10 of the above embodiment.
  • the second metal layer 43 laminated on the z2 side of the first insulating layer 41 in the thickness direction z is bonded to the conductive main surface 311 (conductive portion 31) of each of the two conductive members 3 via a bonding material 64.
  • the conductive main surface 311 is an example of a fixing portion to which the second metal layer 43 (first heat sink 4) is fixed.
  • the bonding material 64 may be conductive or insulating, and is, for example, solder.
  • the first metal layer 42 has a first heat dissipation surface 421.
  • the first heat dissipation surface 421 faces the z1 side in the thickness direction z.
  • the first heat dissipation surface 421 is exposed from the sealing resin 7.
  • the first insulating layer 41, the first metal layer 42, and the second metal layer 43 are each an elongated rectangle with the second direction y as the longitudinal direction when viewed in the thickness direction z.
  • the size of the first insulating layer 41 in a plan view (when viewed in the thickness direction z) is larger than that of each of the first metal layer 42 and the second metal layer 43.
  • the first insulating layer 41 overlaps each of the first metal layer 42 and the second metal layer 43 and the conductive portion 31 of each of the two conductive members 3.
  • the first insulating layer 41 overlaps each of the first metal layer 42, the second metal layer 43, and the conductive portion 31 when viewed in the thickness direction z.
  • the second metal layer 43 is provided as a single elongated region in the second direction y in which the two semiconductor elements 2 are arranged, and the second metal layer 43 of the single region is joined to the conductive main surface 311 (conductive portion 31) of each of the two conductive members 3, but is not limited to this.
  • the second metal layer 43 may be composed of multiple (two) regions that are separated from each other, corresponding to each conductive portion 31 of the two conductive members 3 to be joined.
  • the second heat sink 5 is disposed on the z2 side of the die pad portion 11 in the thickness direction z.
  • the second heat sink 5 is fixed to the first back surface 112 (die pad portion 11).
  • the second heat sink 5 includes a second insulating layer 51, a fourth metal layer 52 and a fifth metal layer 53 which are stacked on top of each other.
  • the second heat sink 5 is composed of, for example, a DBC (Direct Bonded Copper) substrate.
  • the second insulating layer 51 is made of a material with a relatively high thermal conductivity, such as ceramics. There are no particular limitations on the material of which the second insulating layer 51 is made, and examples of the material include alumina, aluminum nitride, and silicon nitride.
  • the second insulating layer 51 may be made of an insulating resin sheet in addition to ceramics.
  • the second insulating layer 51 is rectangular when viewed in the thickness direction z.
  • the fourth metal layer 52 is laminated on the z1 side of the second insulating layer 51 in the thickness direction z.
  • the constituent material of the fourth metal layer 52 is not particularly limited, and may include, for example, copper.
  • the constituent material of the fourth metal layer 52 may include aluminum instead of copper.
  • the fourth metal layer 52 is bonded to the first back surface 112 (die pad portion 11) via a bonding material 671.
  • the bonding material 671 may be conductive or insulating, and may be, for example, solder.
  • the fifth metal layer 53 is laminated on the z2 side of the second insulating layer 51 in the thickness direction z.
  • the constituent material of the fifth metal layer 53 is the same as the constituent material of the fourth metal layer 52.
  • the fifth metal layer 53 has a second heat dissipation surface 531.
  • the second heat dissipation surface 531 faces the z2 side in the thickness direction z.
  • the second heat dissipation surface 531 is exposed from the resin back surface 72 of the sealing resin 7.
  • the second insulating layer 51, the fourth metal layer 52, and the fifth metal layer 53 are each rectangular when viewed in the thickness direction z.
  • the second insulating layer 51 is larger in size in a plan view (when viewed in the thickness direction z) than the fourth metal layer 52 and the fifth metal layer 53.
  • the second insulating layer 51 overlaps the fourth metal layer 52, the fifth metal layer 53, and the die pad portion 11 (first back surface 112) when viewed in the thickness direction z.
  • the second insulating layer 51 overlaps all of the fourth metal layer 52, the fifth metal layer 53, and the die pad portion 11 (first back surface 112) when viewed in the thickness direction z.
  • the thermal conductivity of the second heat sink 5 (each of the second insulating layer 51, the fourth metal layer 52, and the fifth metal layer 53) is higher than the thermal conductivity of the sealing resin 7.
  • the sealing resin 7 covers the first lead 1A, the plurality of lead terminals 191 and portions of the plurality of lead terminals 192, the semiconductor element 2, the plurality of wires 68, the conductive member 3, and portions of the first heat sink 4 and the second heat sink 5.
  • the sealing resin 7 is made of, for example, a black epoxy resin.
  • the sealing resin 7 has a resin main surface 71, a resin back surface 72, and resin side surfaces 73 to 76.
  • the resin main surface 71 and the resin back surface 72 face opposite sides in the thickness direction z.
  • the resin main surface 71 faces the z1 side in the thickness direction z, and faces the same side as the element main surface 201 and the first main surface 111.
  • the resin main surface 71 is in a frame shape surrounding the first heat dissipation surface 421 of the first metal layer 42 of the first heat sink 4 in a plan view (viewed in the thickness direction z).
  • the first heat dissipation surface 421 is exposed from this resin main surface 71.
  • the first heat dissipation surface 421 is flush with the resin main surface 71.
  • the first heat dissipation surface 421 may be located on the z1 side of the thickness direction z from the resin main surface 71, unlike the illustrated example.
  • the first metal layer 42 including the first heat dissipation surface 421 protrudes from the resin main surface 71 toward the z1 side in the thickness direction z.
  • the first heat dissipation surface 421 may also be located on the z2 side in the thickness direction z from the resin main surface 71.
  • the first metal layer 42 including the first heat dissipation surface 421 is recessed from the resin main surface 71 toward the z2 side in the thickness direction z.
  • the resin back surface 72 faces the z2 side in the thickness direction z, and faces the same side as the element back surface 202 and the first back surface 112. As shown in FIG. 14, the resin back surface 72 is frame-shaped in a plan view (viewed in the thickness direction z) surrounding the second heat dissipation surface 531 of the fifth metal layer 53 of the second heat sink 5. The second heat dissipation surface 531 is exposed from this resin back surface 72. The second heat dissipation surface 531 is, for example, flush with the resin back surface 72.
  • Each of the resin side surfaces 73 to 76 is connected to the resin main surface 71 and the resin back surface 72, and is sandwiched between the resin main surface 71 and the resin back surface 72 in the thickness direction z.
  • the resin side surface 73 and the resin side surface 74 face opposite each other in the first direction x.
  • the resin side surface 73 faces the x1 side of the first direction x
  • the resin side surface 74 faces the x2 side of the first direction x.
  • the resin side surface 75 and the resin side surface 76 face opposite each other in the second direction y.
  • the resin side surface 75 faces the y1 side of the second direction y
  • the resin side surface 76 faces the y2 side of the second direction y.
  • each of the terminal portion 126, the multiple lead terminals 191, and the multiple lead terminals 192 protrudes from the resin side surface 73.
  • the resin side surfaces 73 to 76 are each slightly inclined with respect to the thickness direction z.
  • the shapes of the sealing resin 7 shown in FIGS. 13, 14, and 16 to 19 are examples. The shape of the sealing resin 7 is not limited to the illustrated shape.
  • the semiconductor device A20 includes a plurality of semiconductor elements 2 supported on the first main surface 111 of the die pad portion 11 (first lead 1A), a conductive portion 31 conductively joined to the z1 side of the thickness direction z of the semiconductor elements 2, and a first heat sink 4 fixed to the z1 side of the thickness direction z of the conductive portion 31.
  • the first heat sink 4 has a first heat sink surface 421 facing the z1 side of the thickness direction z, and the first heat sink surface 421 is exposed from the resin main surface 71 of the sealing resin 7.
  • the thermal conductivity of the first heat sink 4 is higher than that of the sealing resin 7.
  • the heat generated by the plurality of semiconductor elements 2 can be released from the first heat sink surface 421 via the conductive portion 31 and the first heat sink 4.
  • a heat sink or the like (not shown) to the first heat sink surface 421
  • the heat generated by the plurality of semiconductor elements 2 can be efficiently released from the opposite side of the die pad portion 11 (the z1 side of the thickness direction z) of the semiconductor element 2.
  • the first heat sink 4 includes a first insulating layer 41 that overlaps the conductive portion 31 when viewed from the z1 side in the thickness direction z.
  • the semiconductor device A10 having the above configuration can improve heat dissipation and voltage resistance.
  • the semiconductor device A20 further includes a second heat sink 5.
  • the second heat sink 5 is fixed to the first back surface 112 (the surface facing the z2 side in the thickness direction z) of the die pad portion 11.
  • the second heat sink 5 has a second heat sink surface 531 facing the z2 side in the thickness direction z, and the second heat sink surface 531 is exposed from the resin back surface 72 of the sealing resin 7.
  • the thermal conductivity of the second heat sink 5 is higher than that of the sealing resin 7.
  • the second heat sink 5 By attaching a heat sink or the like (not shown) in close contact with the second heat sink surface 531, the heat generated in the multiple semiconductor elements 2 can be efficiently released from the die pad portion 11 side (the z2 side in the thickness direction z).
  • the second heat sink 5 also includes a second insulating layer 51 that overlaps with the die pad portion 11 when viewed from the z1 side in the thickness direction z.
  • the semiconductor device A20 equipped with the above-mentioned second heat sink 5 is more preferable in terms of improving heat dissipation and voltage resistance.
  • the first heat sink 4 includes a first insulating layer 41, a first metal layer 42, and a second metal layer 43 stacked on top of each other.
  • the first metal layer 42 is stacked on the z1 side of the thickness direction z of the first insulating layer 41, and has a first heat sink surface 421.
  • the second metal layer 43 is stacked on the z2 side of the thickness direction z of the first insulating layer 41, and is joined to the conductive main surface 311 (conductive portion 31).
  • the second heat sink 5 includes a second insulating layer 51, a fourth metal layer 52, and a fifth metal layer 53 stacked on top of each other.
  • the fourth metal layer 52 is stacked on the z1 side of the thickness direction z of the second insulating layer 51, and is joined to the first back surface 112 of the die pad portion 11.
  • the fifth metal layer 53 is stacked on the z2 side of the thickness direction z of the second insulating layer 51, and has a second heat sink surface 531.
  • the first heat sink 4 and the second heat sink 5 of the above configuration can each be configured, for example, by a DBC substrate.
  • the semiconductor device A20 which is equipped with the above-mentioned first heat sink 4 and second heat sink 5, has a structure suitable for improving heat dissipation and voltage resistance.
  • the first insulating layer 41 of the first heat sink 4 overlaps, in the thickness direction z, the entire conductive main surface 311 to which the first heat sink 4 is fixed in the conductive portion 31.
  • the second insulating layer 51 of the second heat sink 5 overlaps, in the thickness direction z, the entire first back surface 112 to which the second heat sink 5 is fixed in the die pad portion 11.
  • a semiconductor device A20 having such a configuration is more preferable in terms of improving voltage resistance.
  • the semiconductor device A20 of this embodiment has been described as having a configuration example including multiple semiconductor elements 2, a first heat sink 4 arranged on the z1 side of the semiconductor elements 2 in the thickness direction z, and a second heat sink 5 arranged on the z2 side of the semiconductor elements 2 in the thickness direction z, the present disclosure is not limited to this.
  • the semiconductor device of the present disclosure may also have a configuration including only one semiconductor element 2, a first heat sink 4 arranged on the z1 side of the semiconductor element 2 in the thickness direction z, and a second heat sink 5 arranged on the z2 side of the semiconductor element 2 in the thickness direction z.
  • Fig. 20 shows a semiconductor device according to a first modification of the second embodiment.
  • Fig. 20 is a cross-sectional view showing a semiconductor device A21 of this modification, and shows a cross section similar to that of Fig. 17 shown in the second embodiment.
  • the semiconductor device A21 of this modified example is additionally provided with a heat sink 8.
  • the material constituting the heat sink 8 is, for example, either copper or nickel, or an alloy of these.
  • the heat sink 8 has a first surface 81 and a second surface 82.
  • the first surface 81 faces the z1 side in the thickness direction z and faces the second heat sink surface 531 of the second heat sink 5 (fifth metal layer 53).
  • the second heat sink surface 531 is exposed from the sealing resin 7.
  • the second heat sink surface 531 and the first surface 81 of the heat sink 8 are bonded via a bonding material 672.
  • the bonding material 672 may be conductive or insulating, but for example, solder is used.
  • the second surface 82 faces the z2 side in the thickness direction z.
  • the second surface 82 is exposed from the resin back surface 72 of the sealing resin 7. In the illustrated example, the second surface 82 is flush with the resin back surface 72.
  • the second surface 82 is a portion that is bonded by a bonding material such as solder when mounting the semiconductor device A21 on a circuit board (not shown), for example.
  • the portion of the lead terminal 191 exposed from the sealing resin 7 has a bent shape when viewed in the second direction y.
  • the tip of the lead terminal 191 on the x2 side in the first direction x is located closer to the z2 side in the thickness direction z than the other portions.
  • the tip of the lead terminal 192 that is electrically connected to the gate electrode 23 of the semiconductor element 2 and the terminal portion 126 that is electrically connected to the drain electrode 22 of the semiconductor element 2 are also bent like the lead terminal 191, and the tip of the x2 side in the first direction x is located closer to the z2 side in the thickness direction z than the other portions.
  • the tip of each of the lead terminals 191, 192, and terminal portion 126 is a portion that is joined by a joining material such as solder when the semiconductor device A21 is mounted on a circuit board (not shown), for example.
  • the semiconductor device A21 of this modified example provides the same effects as the semiconductor device A20 of the second embodiment.
  • the semiconductor device A21 includes a heat sink 8 bonded to the second heat sink surface 531 of the second heat sink 5. With this configuration, heat generated in the semiconductor element 2 can be efficiently dissipated to the heat sink 8 via the die pad portion 11 and the second heat sink 5.
  • the semiconductor device A21 configured in this way is preferable for improving heat dissipation.
  • the semiconductor device according to the present disclosure is not limited to the above-mentioned embodiment.
  • the specific configuration of each part of the semiconductor device according to the present disclosure can be freely designed in various ways.
  • a first lead including a die pad portion having a first main surface facing one side in a thickness direction and a first back surface facing the other side in the thickness direction; a semiconductor element supported on the first main surface; a conductive portion that is disposed on one side of the semiconductor element in the thickness direction and is conductively joined to the semiconductor element; a sealing resin that covers at least a portion of the die pad portion and the semiconductor element; a first heat sink fixed to one side of the conductive portion in the thickness direction and having a thermal conductivity higher than that of the sealing resin; the first heat sink includes a first insulating layer overlapping the conductive portion when viewed in the thickness direction, and has a first heat sink surface facing one side in the thickness direction; the sealing resin has a resin main surface facing one side in the thickness direction and a resin back surface spaced from the resin main surface to the other side in the thickness direction and facing the other side in the thickness direction, The first heat dissipation surface is exposed from
  • the first heat sink includes the first insulating layer, a first metal layer stacked on one side of the first insulating layer in the thickness direction, and a second metal layer stacked on the other side of the first insulating layer in the thickness direction, the second metal layer is bonded to the conductive portion; 2.
  • the semiconductor device of claim 1 wherein the first metal layer has the first heat dissipation surface.
  • the first heat sink includes a conductive plate joined to the conductive portion and the first insulating layer joined to one side of the conductive plate in the thickness direction, 2.
  • the conductive portion is made of a metal plate.
  • the first heat sink includes the first insulating layer and a third metal layer stacked on one side of the first insulating layer in the thickness direction, the conductive portion is laminated on the other side of the first insulating layer in the thickness direction, 2.
  • the third metal layer has the first heat dissipation surface.
  • Appendix 6. The semiconductor device according to claim 1, wherein the first heat dissipation surface is flush with the resin main surface or is located on one side of the resin main surface in the thickness direction.
  • Appendix 7. the conductive portion has a fixing portion to which the first heat sink is fixed, 7.
  • the semiconductor device wherein the first insulating layer overlaps with the entire fixed portion when viewed in the thickness direction.
  • Appendix 8. a second lead arranged to be spaced apart from the first lead in a direction perpendicular to the thickness direction; 8.
  • Appendix 9. The semiconductor device according to claim 1, wherein the first back surface is exposed from the resin back surface.
  • Appendix 10. a second heat sink fixed to the first back surface and having a higher thermal conductivity than the sealing resin; the second heat sink includes a second insulating layer overlapping the die pad portion when viewed in the thickness direction, and has a second heat dissipation surface facing the other side in the thickness direction; 10.
  • the second heat dissipation surface is exposed from the resin back surface.
  • the second heat sink includes the second insulating layer, a fourth metal layer stacked on one side of the second insulating layer in the thickness direction, and a fifth metal layer stacked on the other side of the second insulating layer in the thickness direction, the fourth metal layer is bonded to the first back surface; 11.
  • the fifth metal layer has the second heat dissipation surface.
  • Appendix 12. 12 The semiconductor device according to claim 10, wherein the second heat dissipation surface is flush with the resin rear surface.
  • Appendix 13 13.
  • the semiconductor device according to claim 10 wherein the second insulating layer overlaps the entire first back surface when viewed in the thickness direction.
  • Appendix 14 A plurality of the semiconductor elements are provided, 14. The semiconductor device according to claim 10, wherein the semiconductor elements are arranged on the first main surface and spaced apart from each other in a direction perpendicular to the thickness direction. Appendix 15. 15. The semiconductor device according to claim 10, wherein the semiconductor element is a switching element. Appendix 16. the semiconductor element has a main surface facing one side in the thickness direction, a back surface facing the other side in the thickness direction, a source electrode and a gate electrode disposed on the main surface, and a drain electrode disposed on the back surface; the drain electrode is conductively joined to the first main surface, 16. The semiconductor device according to claim 15, wherein the conductive portion is conductively joined to the source electrode.

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
PCT/JP2023/040000 2022-12-02 2023-11-07 半導体装置 Ceased WO2024116743A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2024561286A JPWO2024116743A1 (https=) 2022-12-02 2023-11-07

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022193471 2022-12-02
JP2022-193471 2022-12-02

Publications (1)

Publication Number Publication Date
WO2024116743A1 true WO2024116743A1 (ja) 2024-06-06

Family

ID=91323373

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2023/040000 Ceased WO2024116743A1 (ja) 2022-12-02 2023-11-07 半導体装置

Country Status (2)

Country Link
JP (1) JPWO2024116743A1 (https=)
WO (1) WO2024116743A1 (https=)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012015287A (ja) * 2010-06-30 2012-01-19 Denso Corp 半導体モジュールの製造方法
JP2013038309A (ja) * 2011-08-10 2013-02-21 Denso Corp 半導体モジュールおよびそれを備えた半導体装置
JP2015056638A (ja) * 2013-09-13 2015-03-23 株式会社東芝 半導体装置およびその製造方法
JP2020080348A (ja) * 2018-11-12 2020-05-28 ローム株式会社 半導体装置
US20220013439A1 (en) * 2020-07-10 2022-01-13 Stmicroelectronics S.R.L. Packaged high voltage mosfet device with connection clip and manufacturing process thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012015287A (ja) * 2010-06-30 2012-01-19 Denso Corp 半導体モジュールの製造方法
JP2013038309A (ja) * 2011-08-10 2013-02-21 Denso Corp 半導体モジュールおよびそれを備えた半導体装置
JP2015056638A (ja) * 2013-09-13 2015-03-23 株式会社東芝 半導体装置およびその製造方法
JP2020080348A (ja) * 2018-11-12 2020-05-28 ローム株式会社 半導体装置
US20220013439A1 (en) * 2020-07-10 2022-01-13 Stmicroelectronics S.R.L. Packaged high voltage mosfet device with connection clip and manufacturing process thereof

Also Published As

Publication number Publication date
JPWO2024116743A1 (https=) 2024-06-06

Similar Documents

Publication Publication Date Title
JP7733144B2 (ja) 半導体装置
JP7827899B2 (ja) 半導体装置
CN115547967A (zh) 半导体封装件用夹片结构体及包括其的半导体封装件
US20240404977A1 (en) Semiconductor device and semiconductor module
US20240047433A1 (en) Semiconductor device
JP7545845B2 (ja) 半導体装置
WO2024116743A1 (ja) 半導体装置
JP7835681B2 (ja) 半導体装置
JP7794761B2 (ja) 半導体装置
WO2023149257A1 (ja) 半導体装置
WO2024029336A1 (ja) 半導体装置
WO2024018790A1 (ja) 半導体装置
WO2022153902A1 (ja) 半導体装置
JP2001144229A (ja) 樹脂封止型半導体装置
WO2022264833A1 (ja) 半導体装置
US20250233085A1 (en) Semiconductor device
WO2024116899A1 (ja) 半導体装置、および半導体装置の製造方法
WO2024241819A1 (ja) 電子装置
WO2024106219A1 (ja) 半導体装置
WO2025158868A1 (ja) 半導体装置
WO2023120353A1 (ja) 半導体装置
WO2024018851A1 (ja) 半導体装置
WO2022259825A1 (ja) 半導体装置
WO2023199808A1 (ja) 半導体装置
WO2024018795A1 (ja) 半導体装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23897397

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2024561286

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 23897397

Country of ref document: EP

Kind code of ref document: A1