WO2024116490A1 - 電子部品 - Google Patents

電子部品 Download PDF

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Publication number
WO2024116490A1
WO2024116490A1 PCT/JP2023/030362 JP2023030362W WO2024116490A1 WO 2024116490 A1 WO2024116490 A1 WO 2024116490A1 JP 2023030362 W JP2023030362 W JP 2023030362W WO 2024116490 A1 WO2024116490 A1 WO 2024116490A1
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WO
WIPO (PCT)
Prior art keywords
electrode
conductor
glass substrate
coil
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/030362
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English (en)
French (fr)
Japanese (ja)
Inventor
宏充 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to CN202380081479.3A priority Critical patent/CN120266233A/zh
Priority to JP2024561161A priority patent/JP7806930B2/ja
Publication of WO2024116490A1 publication Critical patent/WO2024116490A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type
    • H01F17/02—Fixed inductances of the signal type without magnetic core
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general

Definitions

  • the present invention relates to electronic components.
  • a conventional electronic component is described in JP 2020-174169 A (Patent Document 1).
  • This electronic component includes a glass substrate, an outer conductor in contact with the outer surface of the glass substrate, and a protective film in contact with the outer surface of the glass substrate and the outer conductor so as to cover the outer conductor.
  • an embodiment including a capacitor and a coil ( Figure 16) is described, in which the capacitor has a first electrode and a second electrode, and the coil is configured by winding a conductor in a spiral shape along an axis.
  • the first electrode of the capacitor is arranged horizontally in the axial direction relative to the coil.
  • this configuration poses the problem that it is difficult to reduce the size in a planar direction parallel to the axial direction.
  • the objective of the present invention is to provide an electronic component that can be made smaller.
  • an electronic component comprises: a glass substrate having a first surface and a second surface opposite each other; a coil partially embedded in the glass substrate and wound around an axis; a capacitor provided on the glass substrate, electrically connected to the coil, and having a first electrode and a second electrode opposed to each other; The first electrode and the second electrode overlap the coil in a direction perpendicular to the axis.
  • the first and second electrodes of the capacitor and the coil overlap in a direction perpendicular to the axis (plan view), which reduces the size in a planar direction parallel to the axis, making it possible to miniaturize the electronic component.
  • the mounting surface can be reduced.
  • This disclosure makes it possible to provide electronic components that can be made smaller.
  • FIG. 2 is a top view of the electronic component according to the first embodiment.
  • FIG. 3 is a cross-sectional view taken along line III-III of FIG.
  • FIG. 11 is a top view of an electronic component according to a second embodiment.
  • 6 is a cross-sectional view taken along line VI-VI of FIG. 4.
  • FIG. 13 is a top view of the electronic component according to the third embodiment.
  • FIG. 8 is a cross-sectional view taken along line VIII-VIII of FIG. 7. IX-IX cross-sectional view of FIG. 8.
  • FIG. 13 is a top view of an electronic component according to a fourth embodiment.
  • FIG. 13 is a top view of an electronic component according to a fifth embodiment. This is a cross-sectional view taken along line XIV-XIV of Figure 13. This is a cross-sectional view of Figure 13 taken along the line XV-XV.
  • FIG. 13 is a top view of an electronic component according to a sixth embodiment. This is a cross-sectional view taken along the line XVII-XVII of Figure 16. This is a cross-sectional view of Figure 16 along XVIII-XVIII.
  • FIG. 13 is a top view of an electronic component according to a seventh embodiment.
  • FIG. 23 is a top view of an electronic component according to an eighth embodiment. This is a cross-sectional view of Figure 23 along the line XXIV-XXIV. This is a cross-sectional view of Figure 23 along the line XXV-XXV.
  • FIG. 13 is a top view of an electronic component according to a ninth embodiment. This is a cross-sectional view taken along line XXVII-XXVII of Figure 26.
  • FIG. 19 is a top view of the electronic component of the tenth embodiment. This is a cross-sectional view taken along the line XXX-XXX of Figure 29. This is a cross-sectional view of XXXI-XXXI in Figure 29.
  • FIG. 30 is an exploded plan view of FIG. 29 .
  • FIG. 23 is a cross-sectional view of an electronic component according to an eleventh embodiment.
  • FIG. 23 is a cross-sectional view of an electronic component according to a twelfth embodiment.
  • Fig. 1 is a schematic top view of the electronic component 1 as viewed from the top side.
  • Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1.
  • Fig. 3 is a cross-sectional view taken along line III-III in Fig. 1.
  • Fig. 1 depicts the electronic component 1 as transparent so that the structure can be easily understood, but the electronic component 1 may be semi-transparent or opaque.
  • Fig. 1 depicts the first external terminal 41 and the second external terminal 42 with double-dashed lines, and omits the first protective layer 15 and the third protective layer 17.
  • the electronic component 1 includes a glass substrate 10, a coil 20, a capacitor 30, a third protective layer 17, a first protective layer 15, a second protective layer 16, a first external terminal 41, and a second external terminal 42.
  • the electronic component 1 is a surface-mount electronic component used in, for example, a high-frequency signal transmission circuit.
  • the glass substrate 10 has a first surface 10t and a second surface 10b located on opposite sides to each other.
  • the coil 20 is partially embedded in the glass substrate 10 and wound around the axis AX. A portion of the coil 20 is exposed from the first surface 10t of the glass substrate 10. A portion of the coil 20 is exposed from the second surface 10b of the glass substrate 10.
  • the capacitor 30 is provided on the first surface 10t of the glass substrate 10, and is electrically connected to the coil 20.
  • the capacitor 30 has a first electrode 31 and a second electrode 32 that face each other, and the first electrode 31 and the second electrode 32 overlap the coil 20 in a direction perpendicular to the axis AX.
  • the third protective layer 17 covers the capacitor 30 and is provided on the first surface 10 t of the coil 20 .
  • the first protective layer 15 covers a portion of the exposed coil 20 and is provided on the third protective layer 17 .
  • the second protective layer 16 covers a portion of the exposed coil 20 and is provided on the second surface 10 b of the coil 20 .
  • the first external terminal 41 and the second external terminal 42 are provided on the second protective layer 16.
  • the first external terminal 41 is electrically connected to the coil 20, and the second external terminal 42 is electrically connected to the capacitor 30.
  • the coil 20 and the capacitor 30 are connected in series. Note that the coil 20 and the capacitor 30 may also be connected in parallel.
  • the glass substrate 10 is a rectangular parallelepiped having a length, a width, and a height.
  • the glass substrate 10 has a first end face 10e1 and a second end face 10e2 at both ends in the length direction, a first side face 10s1 and a second side face 10s2 at both ends in the width direction, and a second face 10b and a first face 10t at both ends in the height direction.
  • the outer surface 100 of the glass substrate 10 includes the first end face 10e1 and the second end face 10e2, the first side face 10s1 and the second side face 10s2, the second face 10b, and the first face 10t.
  • the second face 10b is one of the main faces of the glass substrate 10, and the first face 10t is located on the back side of the second face 10b.
  • the first face 10t and the second face 10b are parallel to the axis AX.
  • parallel includes not only being completely parallel to the coil axis AX, but also being substantially parallel, such as being slightly curved with respect to the axis AX, for example having an angle of ⁇ 5% with respect to the axis AX.
  • the outer surface 100 of the glass substrate 10 does not simply mean a surface facing the outer periphery of the glass substrate 10, but a surface that is a boundary between the outside and the inside of the glass substrate 10.
  • “above the outer surface 100 of the glass substrate 10” does not mean an absolute direction such as vertically upward defined by the direction of gravity, but refers to a direction toward the outside of the outside and the inside with the outer surface 100 as a boundary, based on the outer surface 100.
  • the lengthwise direction (longitudinal direction) of the glass substrate 10, which is the direction from the first end face 10e1 to the second end face 10e2, is referred to as the X direction.
  • the widthwise direction of the glass substrate 10, which is the direction from the first side face 10s1 to the second side face 10s2, is referred to as the Y direction.
  • the heightwise direction of the glass substrate 10, which is the direction from the second face 10b to the first face 10t is referred to as the Z direction.
  • the X direction, Y direction, and Z direction are mutually perpendicular, and when arranged in the order X, Y, Z, they form a left-handed system.
  • the glass substrate 10 has insulating properties.
  • the glass substrate 10 is preferably a photosensitive glass substrate such as Foturan II (registered trademark of Schott AG).
  • the glass substrate 10 preferably contains cerium oxide (ceria: CeO 2 ).
  • the cerium oxide acts as a sensitizer, making processing by photolithography easier.
  • the glass substrate 10 can be processed by mechanical processing such as drilling and sandblasting, dry/wet etching using a photoresist/metal mask, laser processing, etc., it may be a glass plate that does not have photosensitivity.
  • the glass substrate 10 may be made by sintering a glass paste, or may be formed by a known method such as the float method.
  • the coil 20 is wound in a spiral shape along an axis AX.
  • the axis AX of the coil 20 is disposed parallel to the second surface 10b of the glass substrate 10.
  • the coil 20 includes a plurality of second coil conductors 21b, a plurality of first coil conductors 21t, a plurality of first through conductors 23, and a plurality of second through conductors 24.
  • the coil 20 is configured as a spiral, with the first through conductors 23, the first coil conductor 21t, the second through conductors 24, and the second coil conductor 21b being electrically connected in this order.
  • the coil 20 has a first end and a second end, the second end being connected to the first external terminal 41, and the first end being connected to the capacitor 30 via the third via conductor 243v.
  • the third via conductor 243v is a via conductor located closest to the second end face 10e2 side of the glass substrate 10, and has only a pad portion.
  • the coil 20 has a plurality of turns.
  • the multiple first through conductors 23 penetrate the glass substrate 10, extend from the second coil conductor 21b toward the first coil conductor 21t, and are arranged along the axis AX.
  • the multiple first coil conductors 21t are provided on the third protective layer 17 .
  • the second through conductor 24 is provided on the opposite side of the axis AX to the first through conductor 23.
  • the multiple second through conductors 24 penetrate the glass substrate 10, extend from the first coil conductor 21t toward the second coil conductor 21b, and are arranged along the axis AX.
  • the multiple second coil conductors 21 b are provided on the second surface 10 b of the glass substrate 10 . That is, a portion of the coil 20 is exposed from the first surface 10 t of the glass substrate 10 , and a portion of the coil 20 is exposed from the second surface 10 b of the glass substrate 10 .
  • the first coil conductor 21t is shaped to extend in the Y direction. All of the first coil conductors 21t are arranged in parallel along the X direction.
  • the second coil conductors 21b extend in the Y direction at a slight incline toward the X direction. All of the second coil conductors 21b are arranged in parallel along the X direction.
  • the first through conductors 23 and the second through conductors 24 extend in a direction perpendicular to the second surface 10b and the first surface 10t, respectively. All of the first through conductors 23 and all of the second through conductors 24 are arranged in parallel along the X direction.
  • the first penetrating conductor 23 is disposed on the first side surface 10s1 side with respect to the axis AX within the through hole of the glass substrate 10.
  • the first penetrating conductor 23 is connected to the first coil conductor 21t through a first via conductor 23v that penetrates the third protective layer 17.
  • the first via conductor 23v has a first pad portion 23v1 provided on the first penetrating conductor 23 and a first via wiring 23v2 provided on the first pad portion 23v1 and connected to the first coil conductor 21t.
  • the second penetrating conductor 24 is disposed on the second side surface 10s2 side with respect to the axis AX within the through hole of the glass substrate 10.
  • the second penetrating conductor 24 is connected to the second coil conductor 21b, and is further connected to the first coil conductor 21t via a second via conductor 24v that penetrates the third protective layer 17.
  • the second via conductor 24v has a second pad portion provided on the second penetrating conductor 24 and a second via wiring provided on the second pad portion and connected to the first coil conductor 21t.
  • the second coil conductor 21b and the first coil conductor 21t are made of a conductive material such as copper, silver, gold, or an alloy of these.
  • the second coil conductor 21b and the first coil conductor 21t may be a metal film formed by plating, vapor deposition, sputtering, or the like, or may be a metal sintered body formed by applying and sintering a conductive paste.
  • the material of the first through conductor 23 and the second through conductor 24 is the same as the material of the second coil conductor 21b and the first coil conductor 21t.
  • the second coil conductor 21b and the first coil conductor 21t are preferably formed by a semi-additive method, which allows the second coil conductor 21b and the first coil conductor 21t to be formed with low electrical resistance, high precision, and high aspect ratio.
  • the first through conductor 23 and the second through conductor 24 can be formed in through holes pre-formed in the glass substrate 10 using the materials and manufacturing methods exemplified for the second coil conductor 21b and the first coil conductor 21t.
  • the first via conductor 23v, the second via conductor 24v, and the third via conductor 243v can be formed using the same material and method as the first coil conductor.
  • the capacitor 30 is provided on the first surface 10t of the glass substrate 10 and is electrically connected to the coil 20.
  • the capacitor 30 has a first electrode 31 and a second electrode 32 facing each other, and a dielectric film 33 disposed between the first electrode 31 and the second electrode 32.
  • the first electrode 31 and the second electrode 32 of the capacitor 30 overlap the coil 20.
  • the capacitor 30 is disposed inside the coil 20. With the above-described configuration, it becomes possible to further reduce the size of the electronic component 1. Note that the capacitor 30 may be disposed outside the coil 20. The capacitor 30 is provided between the first coil conductor 21t and the second coil conductor 21b of the coil 20, and between the first through conductor 23 and the second through conductor 24. A part of the capacitor 30 is disposed inside the coil 20. Note that the entire capacitor 30 may be disposed inside the coil 20.
  • inside coil 20 refers to the area surrounded by the surfaces contacting the inner circumferences of the first penetrating conductor 23 and the second penetrating conductor 24 facing each other, and the surfaces contacting the inner circumferences of the first coil conductor 21t and the second coil conductor 21b facing each other.
  • the principal surface of the first electrode 31 and the principal surface of the second electrode 32 of the capacitor 30 are parallel to the axis AX of the coil 20.
  • the principal surface of the first electrode 31 is parallel to the first surface 10t of the glass substrate 10
  • the principal surface of the second electrode 32 is parallel to the first surface 10t of the glass substrate 10
  • the axis AX is parallel to the first surface 10t of the glass substrate 10.
  • the dielectric film 33 of the capacitor 30 completely covers the first electrode 31. This configuration prevents the first electrode 31 and the second electrode 32 from coming into contact. Note that the dielectric film 33 of the capacitor 30 does not have to completely cover the first electrode 31.
  • the second electrode 32 of the capacitor 30 is electrically connected to the first coil conductor 21t of the coil 20. Specifically, the second electrode 32 of the capacitor 30 is connected to the first coil conductor 21t through the third via conductor 243v.
  • the first electrode 31 of the capacitor 30 is provided on the first surface 10t of the glass substrate 10 and is connected to the lead conductor 34, which is connected to the second external terminal 42 through the fourth via conductor 34v.
  • the fourth via conductor 34v has a fourth pad portion 34v1 provided on the lead conductor 34 and a fourth via wiring 34v2 provided on the fourth pad portion 34v1.
  • the lead conductor 34 and the third via conductor 243v are spaced apart in a direction perpendicular to the axis AX, i.e., in a plan view.
  • the material of the first electrode 31 and the second electrode 32 is the same as the material of the first coil conductor 21t and the second coil conductor 21b.
  • the third protective layer 17 is provided on the first surface 10t of the glass substrate 10, and covers the first surface 10t of the glass substrate 10 and the capacitor 30. By covering the capacitor 30, the third protective layer 17 protects the capacitor 30 from external forces and prevents damage to the capacitor 30.
  • the first protective layer 15 is provided on the third protective layer 17 and covers the third protective layer 17 and the first coil conductor 21t. By covering the first coil conductor 21t, the first protective layer 15 protects the first coil conductor 21t from external forces and prevents damage to the first coil conductor 21t.
  • the second protective layer 16 is provided on the second surface 10b of the glass substrate 10, and covers the second surface 10b of the glass substrate 10 and the second coil conductor 21b. By covering the second coil conductor 21b, the second protective layer 16 protects the second coil conductor 21b from external forces and prevents damage to the second coil conductor 21b.
  • the first protective layer 15, the second protective layer 16, and the third protective layer 17 are insulating and made of a resin such as epoxy or polyimide.
  • the first external terminal 41 is provided on the second protective layer 16 on the first end face 10e1 side with respect to the center of the glass substrate 10 in the X direction.
  • the second external terminal 42 is provided on the second protective layer 16 on the second end face 10e2 side with respect to the center of the glass substrate 10 in the X direction.
  • the first external terminal 41 is connected to a second end of the coil 20. Specifically, the first external terminal 41 is electrically connected to the first penetrating conductor 23. That is, the first external terminal 41 is connected to the first penetrating conductor 23 via a first via conductor 23v embedded in the second protective layer 16.
  • the second external terminal 42 is electrically connected to the first electrode 31 of the capacitor 30. Specifically, the second external terminal 42 is connected to the first electrode 31 via the fourth via conductor 34v embedded in the second protective layer 16 and the lead conductor 34.
  • the first external terminal 41 has an underlayer and a plating layer covering the underlayer.
  • the underlayer contains a conductive material such as Ag or Cu.
  • the plating layer contains a conductive material such as Ni, Sn, Pd, or Au.
  • the second external terminal 42 has an underlayer and a plating layer covering the underlayer. Note that the first external terminal 41 and the second external terminal 42 may be composed of a single layer of conductive material.
  • the glass substrate 10 is made of, for example, photosensitive glass, which makes it easy to process through-holes and the like. It is also desirable that the surface of the glass substrate 10 has a very high degree of flatness.
  • a through hole is provided in the glass substrate 10, penetrating from the first surface 10t to the second surface 10b.
  • the first through conductor 23, the second through conductor 24, and the lead conductor 34 are each disposed in the through hole. Specifically, the first through conductor 23 is disposed on the first side surface 10s1 side with respect to the axis AX within the through hole of the glass substrate 10, the second through conductor 24 is disposed on the second side surface 10s2 side with respect to the axis AX within the through hole of the glass substrate 10, and the lead conductor 34 is disposed in the through hole of the glass substrate 10 that is closest to the second end surface 10e2.
  • a first electrode 31 of the capacitor 30 is provided on the first surface 10t of the glass substrate 10 so as to be connected to the lead conductor 34. Furthermore, a dielectric film 33 is provided on the first electrode 31, and a second electrode 32 of the capacitor 30 is provided on the dielectric film 33. Further, on the first surface 10t of the glass substrate 10, a first pad portion 23v1 connected to the first through conductor 23 and a second pad portion (not shown) connected to the second through conductor 24 are provided.
  • the third protective layer 17 is provided so as to cover the capacitor 30, the first pad portion 23v1, and the second pad portion.
  • a through hole for forming a via wiring is provided in the third protective layer 17, and a via wiring is formed. Specifically, a through hole is provided between a first surface, which is a surface of the third protective layer 17 located on the opposite side to the glass substrate 10, and a first pad portion 23v1, and a first via wiring 23v2 is formed.
  • the first pad portion 23v1 and the first via wiring 23v2 are connected to each other to form a first via conductor 23v.
  • a through hole is provided between the first surface and the second pad portion of the third protective layer 17, and a second via wiring 24v2 is formed.
  • the second pad portion and the second via wiring 24v2 are connected to each other to form a second via conductor 24v. Furthermore, a through hole is provided between the first surface of the third protective layer 17 and the second electrode 32 of the capacitor 30, and a third via conductor 243v is formed.
  • a first coil conductor 21t is formed on the third protective layer 17.
  • the first coil conductor 21t connects the first via conductor 23v and the second via conductor 24v.
  • the first coil conductor 21t also connects the third via conductor 243v that is closest to the second end face 10e2 of the glass substrate 10 and the first via conductor 23v that is closest to the third via conductor 243v.
  • the first protective layer 15 is provided on the third protective layer 17 so as to cover the first coil conductor 21t.
  • the second coil conductor 21b is provided on the second surface 10b of the glass substrate 10.
  • the second coil conductor 21b connects the first through conductor 23 and the second through conductor 24.
  • the fourth pad portion 34v1 is provided on the second surface 10b of the glass substrate 10 so as to be connected to the lead conductor 34.
  • the second protective layer 16 is provided on the second surface 10b of the glass substrate 10 so as to cover the second coil conductor 21b and the fourth pad portion 34v1.
  • a through hole for providing a via wiring is provided in the second protective layer 16, and a fourth via wiring 34v2 is formed.
  • the fourth pad portion 34v1 and the fourth via wiring 34v2 are connected to each other to form the fourth via conductor 34v.
  • a first external terminal 41 and a second external terminal 42 are provided on the surface of the second protective layer 16 that is located opposite the second surface 10b of the glass substrate 10.
  • the first external terminal 41 and the second external terminal 42 are spaced apart.
  • the first external terminal 41 is electrically connected to the end of the coil 20 on the second surface 10b of the glass substrate 10, and the second external terminal 42 is connected to the fourth via conductor 34v.
  • the lead conductor 34 and the third via conductor 243v are spaced apart in a plan view, but they may overlap in a plan view.
  • the above embodiment makes it possible to miniaturize the electronic component 1.
  • Fig. 4 is a schematic top view of electronic component 1A as viewed from the top side.
  • Fig. 5 is a cross-sectional view taken along line V-V in Fig. 4.
  • Fig. 6 is a cross-sectional view taken along line VI-VI in Fig. 4.
  • the second embodiment differs from the first embodiment in the positions of capacitor 30 and third protective layer 17. This difference in configuration will be described below. The other configurations are the same as those of the first embodiment, and description thereof will be omitted.
  • the capacitor 30 is provided on the second surface 10b of the glass substrate 10 and is electrically connected to the second external terminal 42.
  • the capacitor 30 By providing the capacitor 30 on the second external terminal 42 side with respect to the glass substrate 10, when the capacitor 30 is connected to the ground of the mounting substrate, the L component between the capacitor and the ground can be reduced, and as a result, deterioration of high frequency characteristics can be suppressed.
  • the second external terminal 42 side is used as the mounting surface, by providing the capacitor 30 on the second external terminal 42 side with respect to the glass substrate 10, the center of gravity of the electronic component 1A can be lowered.
  • the capacitor 30 is provided on the second surface 10b of the glass substrate 10.
  • a first electrode 31 of the capacitor 30 is provided on the second surface 10b of the glass substrate 10.
  • a dielectric film 33 is provided on the first electrode 31 of the capacitor 30, and a second electrode 32 of the capacitor 30 is provided on the dielectric film 33. That is, the capacitor 30 has a first electrode 31 and a second electrode 32 that face each other and are provided on the second surface 10b of the glass substrate 10, and a dielectric film 33 disposed between the first electrode 31 and the second electrode 32.
  • the third protective layer 17 covers the capacitor 30 and is provided on the second surface 10b of the coil 20.
  • the first protective layer 15 is provided on the first surface 10t of the glass substrate 10.
  • the second protective layer 16 is provided on the third protective layer 17.
  • the coil 20 is electrically connected in the order of the first through conductor 23, the first coil conductor 21t, the second through conductor 24, and the second coil conductor 21b to form a spiral.
  • the first through conductor 23 and the second through conductor 24 are provided on the first surface 10t and connected to the first coil conductor 21t.
  • the first coil conductor 21 t is present on the first surface 10 t of the glass substrate 10
  • the second coil conductor 21 b is present on the surface of the third protective layer 17 opposite the glass substrate 10
  • a first via conductor 23v connected to the first through conductor 23 and a second via conductor 24v connected to the second through conductor 24 are formed on the second surface 10b of the glass substrate 10.
  • the first via conductor 23v includes a first pad portion 23v1 provided on the first through conductor 23 and a first via wiring 23v2 provided on the first pad portion 23v1
  • the second via conductor 24v includes a second pad portion provided on the second via conductor 24v and a second via wiring 24v2 provided on the second pad portion.
  • the first protective layer 15 covers the first coil conductor 21t.
  • the second protective layer 16 covers the second coil conductor 21b.
  • the first via conductor 23v and the second via conductor 24v penetrate the third protective layer 17.
  • the second through conductor 24 provided in the through hole closest to the second end face 10 e 2 of the glass substrate 10 is connected to the first electrode 31 of the capacitor 30 .
  • the second electrode 32 of the capacitor 30 is connected to the second external terminal 42 via a fifth via wiring 35v1 that penetrates the third protective layer 17, and a fifth pad portion 35v2 and a fifth via wiring 35v3 that penetrate the second protective layer 16.
  • the capacitor 30 is provided between the second surface 10 b of the glass substrate 10 and the second protective layer, between the first through conductor 23 and the second through conductor 24 .
  • Fig. 7 is a schematic top view of electronic component 1B as viewed from the top side.
  • Fig. 8 is a cross-sectional view taken along line VIII-VIII in Fig. 7.
  • Fig. 9 is a cross-sectional view taken along line IX-IX in Fig. 7.
  • the third embodiment differs from the second embodiment in the positions of dielectric film 33 and fifth via conductor 35v of capacitor 30. This difference in configuration will be described below. The other configurations are the same as those of the second embodiment, and description thereof will be omitted.
  • the second penetrating conductor 24 and the dielectric film 33 are spaced apart.
  • the first electrode 31 of the capacitor 30 is provided on the second surface 10b of the glass substrate 10. Unlike the second embodiment, the first electrode 31 of the capacitor 30 has a surface that is not in contact with the dielectric film 33 and the second electrode 32. The first electrode 31 has a surface that does not overlap with the dielectric film 33 and the second electrode 32 on the surface opposite to the second surface 10b of the glass substrate 10. Specifically, as shown in FIG. 9, the first electrode 31 does not have the dielectric film 33 and the second electrode 32 on the extension of the second through conductor 24. Furthermore, in a plan view, the position of the second through conductor 24 and the position of the second electrode 32 are separated. With this configuration, the dielectric film 33 and the second electrode 32 can be made small, and the amount of material used can be reduced. In addition, the position of the fifth via conductor 35v and the position of the second through conductor 24 are separated.
  • Fig. 10 is a schematic top view of electronic component 1C as viewed from the top side.
  • Fig. 11 is a cross-sectional view taken along line XI-XI in Fig. 10.
  • Fig. 12 is a cross-sectional view taken along line XII-XII in Fig. 10.
  • the fourth embodiment differs from the third embodiment in the position of capacitor 30. This different configuration will be described below. The other configurations are the same as those in the third embodiment, and description thereof will be omitted.
  • the coil 20 has a first end 210 and a second end 220.
  • the first end 210 is connected to a first electrode 31 of the capacitor 30.
  • the second end 220 is connected to a via conductor (not shown) that penetrates the second protective layer 16 and the third protective layer 17.
  • the first end 210 is an end of the second penetrating conductor 24 that is connected to the first electrode 31.
  • the second end 220 is an end of the first penetrating conductor 23 that is connected to a via conductor (not shown).
  • the capacitor 30 is located closer to the first end 210 than to the second end 220. That is, the coil 20 is located on the second end surface 10e2 side in a plan view.
  • the phrase "located closer to the first end 210 than the second end 220" means that the capacitor 30 is located closer to the second end face 10e2 than a plane that passes through the center of the coil 20 on the axis AX of the coil 20 and is perpendicular to the axis AX of the coil 20.
  • the capacitor 30 may be located closer to the second end face 10e2 than the first end face 10e1.
  • Fig. 13 is a schematic top view of electronic component 1D as viewed from the top side.
  • Fig. 14 is a cross-sectional view taken along line XIV-XIV of Fig. 13.
  • Fig. 15 is a cross-sectional view taken along line XV-XV of Fig. 13.
  • the fifth embodiment differs from the third embodiment in the number of turns of coil 20D and the shape of capacitor 30, and does not have third protective layer 17. This different configuration will be described below. The other configurations are the same as those of the third embodiment, and description thereof will be omitted.
  • the number of turns of the coil 20D is less than one.
  • the coil 20D is composed of a first through conductor 23 that penetrates the glass substrate 10 from the second surface 10b to the first surface 10t, a first coil conductor 21t that is connected to the first through conductor 23 and provided on the glass substrate 10, and a second through conductor 24 that is connected to the first coil conductor 21t and penetrates the glass substrate 10 from the first surface 10t to the second surface 10b.
  • the capacitor 30 is provided on the second surface 10b of the glass substrate 10 and is connected to the second through conductor 24.
  • the coil 20D does not have the second coil conductor 21b of the third embodiment.
  • the first through conductor 23 of the coil 20D is connected to a first via conductor 23v.
  • the first via conductor 23v has a first pad portion 23v1 connected to the first through conductor 23 and a first via wiring 23v2 connected to the first pad portion 23v1.
  • the capacitor 30 is not located inside the coil 20D. Specifically, the capacitor 30 is not located between the first coil conductor 21t and the second coil conductor 21b, and is not located between the first through conductor 23 and the second through conductor 24.
  • the first electrode 31 of the capacitor 30 has a notch at a corner on the side where the second end face 10e2 and the second side face 10s2 intersect in a plan view.
  • the first electrode 31 has a portion that overlaps the second penetrating conductor 24.
  • the second electrode 32 and the dielectric film 33 are between the first penetrating conductor 23 and the second penetrating conductor 24, and do not overlap the second penetrating conductor 24.
  • the first electrode 31 of the capacitor 30 may be a rectangle having a length equal to the length in the X direction of a region that passes between the first penetrating conductor 23 and the second penetrating conductor 24 in a plan view.
  • the capacitor 30 is connected to the second penetrating conductor 24 at the first electrode 31, and is connected to the sixth via conductor 36v at the second electrode 32.
  • the second penetrating conductor 24 and the sixth via conductor 36v are spaced apart from each other.
  • the second protective layer 16 is provided on the second surface 10b of the glass substrate 10 and covers the capacitor 30.
  • the first via conductor 23v and the sixth via conductor 36v penetrate the second protective layer 16.
  • Fig. 16 is a schematic top view of electronic component 1E as viewed from the top side.
  • Fig. 17 is a cross-sectional view taken along line XVII-XVII of Fig. 16.
  • Fig. 18 is a cross-sectional view taken along line XVIII-XVIII of Fig. 16.
  • the sixth embodiment differs from the fifth embodiment in the form of capacitor 30. This different configuration will be described below. The other configurations are the same as those of the fifth embodiment, and description thereof will be omitted.
  • the capacitor 30 is disposed closer to the second external terminal 42 than the first external terminal 41. Specifically, the capacitor 30 is located closer to the second external terminal 42 than the center line between the first external terminal 41 and the second external terminal 42 in a plan view. Note that, with a plane passing through the center line between the first external terminal 41 and the second external terminal 42 as a reference, the capacitor 30 may be located on the first external conductor side.
  • the fifth embodiment further includes a second protective layer 16 provided on the second surface 10b of the glass substrate 10 to cover the capacitor 30, and a first external terminal 41 and a second external terminal 42 provided on the second protective layer 16. The first external terminal 41 and the coil 20D are connected through a first via conductor 23v that penetrates the third protective layer 17.
  • the second external terminal 42 and the capacitor 30 are connected through a sixth via conductor 36v that penetrates the third protective layer 17.
  • the capacitor 30 is disposed closer to the second external terminal 42 than the first external terminal 41.
  • Fig. 19 is a schematic top view of the electronic component 1F as viewed from the top side.
  • Fig. 20 is a cross-sectional view taken along line XX-XX in Fig. 19.
  • Fig. 21 is a cross-sectional view taken along line XXI-XXI in Fig. 19.
  • Fig. 22 is a cross-sectional view taken along line XXII-XXII in Fig. 19.
  • the seventh embodiment differs from the sixth embodiment in the position of the first via conductor 23v. This different configuration will be described below. The other configurations are the same as those in the sixth embodiment, and description thereof will be omitted.
  • the first via conductor 23v includes a first pad portion 23v1 connected to the first through conductor 23, and a first via wiring 23v2 connected to the first pad portion 23v1 and the first external terminal 41.
  • the first through conductor 23 and the first via wiring 23v2 are spaced apart.
  • the first via conductor 23v in this embodiment is an example of a first via conductor described in the claims.
  • the first pad portion 23v1 is an example of a pad portion described in the claims.
  • the first via wiring 23v2 is an example of a via portion described in the claims.
  • Fig. 23 is a schematic top view of electronic component 1G as viewed from the top side.
  • Fig. 24 is a cross-sectional view taken along line XXIV-XXIV of Fig. 23.
  • Fig. 25 is a cross-sectional view taken along line XXV-XXV of Fig. 23.
  • the eighth embodiment differs from the seventh embodiment in the sizes of first protective layer 15 and second protective layer 16. This difference in configuration will be described below. Note that in Fig. 23, first protective layer 15 is drawn with a dashed line. The other configurations are the same as those of the seventh embodiment, and description thereof will be omitted.
  • the first protective layer 15 When viewed from a direction perpendicular to the first surface 10t of the glass substrate 10, the first protective layer 15 is located inside the outer periphery of the first surface 10t of the glass substrate 10.
  • the second protective layer 16 When viewed from a direction perpendicular to the second surface 10b, the second protective layer 16 is located inside the outer periphery of the second surface 10b of the glass substrate 10.
  • the area of the first protective layer 15 is smaller than the area of the glass substrate 10 in a direction perpendicular to the axis AX.
  • the area of the second protective layer 16 is also smaller than the area of the glass substrate 10. The above configuration makes it easier to process the glass substrate 10.
  • the glass substrate 10 when cutting the glass substrate 10, it is possible to crystallize the portion of the glass substrate 10 to be cut and cut it by etching. Also, when cutting with a dicer, for example, it is possible to prevent the first protective layer 15 and the second protective layer 16 from peeling off from the glass substrate 10 due to the load of the dicer.
  • the outer periphery of the first protective layer 15 is preferably shaped to follow the outer periphery of the glass substrate 10.
  • the outer periphery of the second protective layer 16 is preferably shaped to follow the outer periphery of the glass substrate 10.
  • FIG. 26 is a schematic top view of the electronic component 1H as viewed from the top side.
  • FIG. 27 is a cross-sectional view taken along line XXVII-XXVII of FIG. 26.
  • FIG. 28 is a cross-sectional view taken along line XXVIII-XXVIII of FIG. 26.
  • the coils 20D and 201D and the capacitors 30 and 301 are connected in parallel.
  • the ninth embodiment differs from the fifth embodiment in the position of the sixth via conductors 36v, the number of coils, the number of capacitors, and the number of external terminals.
  • the different configurations are described below. The other configurations are the same as those of the fifth embodiment, and the description thereof will be omitted.
  • the first electrode 31 of the capacitor 30 is connected to the first through conductor 23 of the coil 20D.
  • the second electrode 32 of the capacitor 30 is connected to the second through conductor 24 of the coil 20D.
  • the first electrode 31 of the capacitor 30 is connected to the first external terminal 41 through the first via conductor 23v.
  • the second electrode 32 of the capacitor 30 is connected to the second external terminal 42 through the sixth via conductor 36v.
  • the sixth via conductor 36v is located so as to overlap the second penetrating conductor 24 when viewed in a direction perpendicular to the first surface 10t.
  • the capacitor 301 has a similar configuration to the capacitor 30. Specifically, the first electrode 31 of the capacitor 301 is connected to the first through conductor 23 of the coil 201D. The second electrode 32 of the capacitor 301 is connected to the second through conductor 24 of the coil 201D. The first electrode 31 of the capacitor 301 is connected to the first external terminal 41 through the first via conductor 23v. The second electrode 32 of the capacitor 30 is connected to the second external terminal 421 through the sixth via conductor 36v. The sixth via conductor 36v is located at a position overlapping the second through conductor 24 when viewed from a direction perpendicular to the first surface 10t.
  • the dielectric film 33 of the capacitor 30 and the dielectric film 33 of the capacitor 301 are a common member. That is, the dielectric film 33 is located extending inside both the coils 20D and 201D. The dielectric film 33 of the capacitor 30 and the dielectric film 33 of the capacitor 301 may be provided separately.
  • coils 20D and 201D have less than one turn, but may have multiple turns.
  • FIG. 29 is a schematic top view of electronic component 1J as viewed from the top side.
  • Fig. 30 is a cross-sectional view taken along line XXX-XXX in Fig. 29.
  • Fig. 31 is a cross-sectional view taken along line XXXI-XXXI in Fig. 29.
  • Fig. 32 is an exploded plan view of Fig. 29.
  • the tenth embodiment differs from the first embodiment in the structure and position of capacitor 30J and the presence of fourth protective layer 18. This different configuration will be described below. The other configurations are the same as those of the first embodiment, and description thereof will be omitted.
  • a portion of the capacitor 30J is embedded in the glass substrate 10.
  • the first electrode 31 and the second electrode 32 are embedded in the glass substrate 10.
  • the glass substrate 10 is between the first electrode 31 and the second electrode 32.
  • the electronic component 1J can be further miniaturized.
  • the dielectric film 33 of the capacitor 30J is made of glass, which provides higher reliability for the electronic component.
  • the electronic component 1J can be manufactured more inexpensively.
  • the capacitor 30J includes a first electrode portion 310 and a second electrode portion 320.
  • the first electrode portion 310 and the second electrode portion 320 each have a comb-tooth structure.
  • the first electrode portion 310 includes a first support portion 31s and a plurality of first electrodes 31 provided on the first support portion 31s.
  • the first support portion 31s is present on the second surface 10b of the glass substrate 10 and has a base portion 313 extending from the first side surface 10s1 to the second side surface 10s2 along the first end surface 10e1, and two teeth portions 311, 312 extending from the base portion 313 in the direction from the first end surface 10e1 to the second end surface 10e2.
  • the first teeth portion 311 is provided at a first end portion 313a of the base portion 313, and the second teeth portion 312 is provided at the center of the base portion 313.
  • One electrode is provided for one tooth portion.
  • One first electrode 31 is formed on the first tooth portion 311, and another first electrode 31 is provided on the second tooth portion 312.
  • the first tooth portion 311 and the second tooth portion 312 penetrate the glass substrate 10 in the direction from the first surface 10t to the second surface 10b.
  • the second electrode portion 320 includes a second support portion 32s and a plurality of second electrodes 32 provided on the second support portion 32s.
  • the second support portion 32s is present on the second surface 10b of the glass substrate 10 and has a base portion 323 extending from the second side surface 10s2 to the first side surface 10s1 along the second end surface 10e2, and two teeth portions 321, 322 extending from the base portion 323 in the direction from the second end surface 10e2 to the first end surface 10e1.
  • the first teeth portion 321 is provided at a first end portion 323a of the base portion 323, and the second teeth portion 322 is provided at the center of the base portion 323.
  • One electrode is provided for one tooth portion.
  • One second electrode 32 is formed on the first tooth portion 321, and another second electrode 32 is provided on the second tooth portion 322.
  • the first tooth portion 321 and the second tooth portion 322 penetrate the glass substrate 10 in the direction from the first surface 10t to the second surface 10b.
  • the second tooth portion 312 of the first support portion 31s, the first tooth portion 321 of the second support portion 32s, the first tooth portion 311 of the first support portion 31s, and the second tooth portion 322 of the second support portion 32s are arranged in this order.
  • the number of teeth is not particularly limited, and one or three or more teeth may be provided on the first support portion 31s.
  • the first electrode 31 may be one or three or more.
  • the second support portion 32s may be provided in the same manner as the first support portion 31s.
  • the second electrode 32 may be provided in the same manner as the first electrode 31.
  • the principal surface of the first electrode 31 is perpendicular to the first surface 10t of the glass substrate 10 and parallel to the axis AX of the coil 20.
  • the principal surface of the second electrode 32 is similar to the principal surface of the first electrode 31.
  • the glass substrate 10 exists between the second tooth portion 312, the first tooth portion 321, the first tooth portion 311 and the second tooth portion 322, and acts as a dielectric.
  • the fourth protective layer 18 covers the base 313 and the base 323, and is provided on the second surface 10b of the glass substrate 10.
  • the second protective layer 16 covers the fourth protective layer 18, and is provided on the side of the fourth protective layer 18 opposite the glass substrate 10.
  • the first penetrating conductor 23 is connected to the second coil conductor 21b through an eighth via conductor (not shown) that penetrates the fourth protective layer 18.
  • the eighth via conductor has an eighth pad portion connected to the first penetrating conductor 23 and an eighth coil wiring connected to the eighth pad portion.
  • the second penetrating conductor 24 is connected to the second coil conductor 21b through a tenth via conductor 241v that penetrates the fourth protective layer 18.
  • the tenth via conductor 241v has a tenth pad portion 241v1 connected to the second penetrating conductor 24 and a tenth via wiring 241v2 connected to the tenth pad portion 241v1.
  • the second coil conductor 21b is provided on the fourth protective layer 18 when viewed in a direction perpendicular to the second surface 10b.
  • the first penetrating conductor 23 closest to the first end surface 10e1 is connected to the first external terminal 41 via the second end 313b of the base 313, an eighth via conductor, and a ninth via conductor (not shown) provided on the eighth via conductor.
  • the eighth via conductor has an eighth pad portion provided on the first penetrating conductor 23 and an eighth via wiring provided on the eighth pad portion.
  • the ninth via conductor has a ninth pad portion provided on the eighth via wiring, and a ninth via wiring provided on the ninth pad portion and connected to the first external terminal 41.
  • the second through conductor 24 closest to the second end surface 10e2 is connected to the second external terminal 42 via the second end 323b of the base 323, the tenth via conductor 241v, and an eleventh via conductor 242v provided on the tenth via conductor 241v.
  • the second through conductor 24 overlaps with the tenth via conductor 241v and the eleventh via conductor 242v in a direction perpendicular to the first surface 10t, i.e., in a plan view.
  • the tenth via conductor 241v has a tenth pad portion 241v1 provided on the second through conductor 24 and a tenth via wiring 241v2 provided on the tenth pad portion 241v1.
  • the eleventh via conductor 242v has an eleventh pad portion 242v1 provided on the tenth via wiring 241v2, and an eleventh via wiring 242v2 provided on the eleventh pad portion 242v1 and connected to the second external terminal 42.
  • FIG. 33 is a cross-sectional view of an electronic component 1K.
  • Fig. 33 corresponds to Fig. 31 of the tenth embodiment.
  • the eleventh embodiment differs from the tenth embodiment in the structure of the dielectric of the capacitor 30J. This different configuration will be described below.
  • the other configurations are the same as those of the tenth embodiment, and description thereof will be omitted.
  • the crystallized portion 101 exists at least partially between the first electrode 31 and the second electrode 32.
  • the crystallized portion 101 which is crystallized glass having a higher Q value than normal glass, exists between the first electrode 31 and the second electrode 32 of the capacitor 30J.
  • the crystallized portion 101 reduces the dielectric loss of the electronic component 1K, and higher reliability is obtained for the electronic component 1K.
  • the electronic component IJ can be manufactured more inexpensively.
  • the crystallized portion 101 exists in the entire region between the first electrode 31 and the second electrode 32.
  • the crystallized portion 101 may exist partially between the first electrode 31 and the second electrode 32.
  • the crystallized portion 101 is a crystallized portion of the glass substrate 10.
  • the transparency of the crystallized portion 101 is lower than the transparency of the remaining portion of the glass substrate 10, which is in an amorphous state and not crystallized.
  • the crystallized portion 101 it is possible to adjust the effective dielectric constant of the glass substrate 10.
  • the stray capacitance formed between the first electrode 31 and the second electrode 32 can be increased or decreased, and in particular, the self-resonant frequency of the electronic component 1K can be adjusted.
  • the dielectric constant of the glass substrate 10 is 6.4, while the dielectric constant of the crystallized portion 101 can be reduced to 5.8. This allows the stray capacitance between the conductors near the crystallized portion 101 to be reduced.
  • the crystallized portion 101 can be formed by irradiating the portion of the glass substrate 10 to be crystallized with ultraviolet light, followed by heat treatment (e.g., baking).
  • the ultraviolet light irradiation can be performed by irradiating the glass substrate 10 with ultraviolet light having a wavelength of about 310 nm.
  • the ultraviolet light irradiation for example, metal ions such as cerium ions in the glass substrate 10 are oxidized by light energy and emit electrons.
  • the processing depth of the crystallized portion 101 can be controlled by adjusting the amount of ultraviolet light irradiation according to the thickness of the glass substrate 10.
  • a contact aligner or a stepper capable of obtaining ultraviolet light with a wavelength of about 310 nm can be used.
  • a laser irradiation device including a femtosecond laser can be used as a light source.
  • the laser light can be focused inside the glass substrate 10, so that electrons can be emitted from the metal oxide only at the focused portion.
  • the glass substrate 10 may be crystallized after the first electrode 31 and the second electrode 32 are provided thereon, or the first electrode 31 and the second electrode 32 may be provided after the crystallized portion 101 is formed.
  • Fig. 34 is a cross-sectional view of electronic component 1L.
  • Fig. 34 corresponds to Fig. 31 of the tenth embodiment.
  • the twelfth embodiment differs from the tenth embodiment in the structure of the dielectric of capacitor 30J. This different configuration will be described below.
  • the other configurations are the same as those of the tenth embodiment, and description thereof will be omitted.
  • a cavity 102 exists at least partially between the first electrode 31 and the second electrode 32.
  • a cavity 102 with a higher Q value than the glass substrate 10 exists between the first electrode 31 and the second electrode 32 of the capacitor 30J.
  • the dielectric loss of the electronic component 1L is reduced, and higher reliability is obtained for the electronic component 1L.
  • the electronic component 1L can be manufactured more inexpensively.
  • the entire space between the first electrode 31 and the second electrode 32 may be a cavity. There is no solid or liquid in the cavity, but a gas such as air is present.
  • the present disclosure includes the following aspects. ⁇ 1> a glass substrate having a first surface and a second surface opposite each other; a coil partially embedded in the glass substrate and wound around an axis; a capacitor provided on the glass substrate, electrically connected to the coil, and having a first electrode and a second electrode opposed to each other; The first electrode and the second electrode overlap the coil in a direction perpendicular to the axis.
  • an external terminal is provided on the second surface side of the glass substrate
  • the capacitor has a dielectric film disposed between the first electrode and the second electrode;
  • the coil has a through conductor that passes through the glass substrate from the first surface to the second surface, the through conductor is connected to the first electrode of the capacitor;
  • the coil has a first end and a second end;
  • the number of turns of the coil is less than one, and the coil is composed of a first penetrating conductor penetrating the glass substrate from the second surface to the first surface, a first coil conductor connected to the first penetrating conductor and provided on the glass substrate, and a second penetrating conductor connected to the first coil conductor and penetrating the glass substrate from the first surface to the second surface;
  • ⁇ 8> a protective layer provided on the second surface to cover the capacitor; and a first external terminal and a second external terminal provided on the protective layer, the first external terminal and the coil are connected through a first via conductor penetrating the protective layer; the second external terminal and the capacitor are connected through a second via conductor penetrating the protective layer;
  • the first via conductor includes a pad portion connected to the first through conductor and a via portion connected to the pad portion and a first external terminal,
  • a first protective layer covering a first surface of the glass substrate and a second protective layer covering a second surface of the glass substrate are provided, When viewed from a direction perpendicular to the first surface, the first protective layer is located inside an outer periphery of the first surface of the glass substrate,
  • ⁇ 12> the first electrode and the second electrode are embedded in the glass substrate;
  • ⁇ 13> the first electrode and the second electrode are embedded in the glass substrate;
  • ⁇ 14> the first electrode and the second electrode are embedded in the glass substrate;

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  • Microelectronics & Electronic Packaging (AREA)
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WO2021079737A1 (ja) * 2019-10-24 2021-04-29 株式会社村田製作所 積層型ｌｃフィルタ
JP2022050298A (ja) * 2020-09-17 2022-03-30 株式会社村田製作所 インダクタ部品
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Publication number Priority date Publication date Assignee Title
JP2007035673A (ja) * 2005-07-22 2007-02-08 Toko Inc 積層インダクタおよび積層複合部品の製造方法
JP2007134793A (ja) * 2005-11-08 2007-05-31 Alps Electric Co Ltd フィルタ
JP2016527743A (ja) * 2013-05-31 2016-09-08 クアルコム，インコーポレイテッド ガラス貫通ビア技術を使用するハイパスフィルタおよびローパスフィルタのための設計
JP2015046788A (ja) * 2013-08-28 2015-03-12 株式会社村田製作所 高周波部品
WO2017056620A1 (ja) * 2015-10-01 2017-04-06 株式会社村田製作所 積層帯域通過フィルタ
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WO2020255791A1 (ja) * 2019-06-18 2020-12-24 凸版印刷株式会社 Ｌｃ共振回路を有する多層配線基板、およびｌｃ共振回路を有する多層配線基板を用いた電子部品パッケージ
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