WO2024045433A1 - 金属纳米结构及其离子束刻蚀加工方法 - Google Patents

金属纳米结构及其离子束刻蚀加工方法 Download PDF

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WO2024045433A1
WO2024045433A1 PCT/CN2022/140699 CN2022140699W WO2024045433A1 WO 2024045433 A1 WO2024045433 A1 WO 2024045433A1 CN 2022140699 W CN2022140699 W CN 2022140699W WO 2024045433 A1 WO2024045433 A1 WO 2024045433A1
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metal
etching
ion beam
photoresist
layer
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PCT/CN2022/140699
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French (fr)
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罗先刚
高平
岳伟生
张涛
赵博文
蒲明博
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中国科学院光电技术研究所
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

Definitions

  • the present disclosure relates to the field of semiconductor processing technology, and specifically to a metal nanostructure and an ion beam etching processing method thereof.
  • metal nanostructures plays a very important role in semiconductor technology and plasma nanophotonic devices.
  • metallic chromium (Cr) film is usually used as the absorber layer of the mask due to its good physical and chemical stability, long service life, and high contrast.
  • noble metal nanostructures such as gold (Au) and silver (Ag) are used in sensing detection and the generation of special optical properties due to their strong light-matter interaction characteristics.
  • Au gold
  • Ag silver
  • etching patterns on metal layers such as Cr layers there are two types: dry etching and wet etching.
  • wet etching involves immersing the sample in a chemical etching solution, which corrodes the metal material exposed in the photoresist opening pattern.
  • the characteristic of wet etching is isotropy. This method is mainly used to etch micron-level patterns. But for pattern etching below microns, dry etching is the main method.
  • reactive ion etching is mainly used for etching metal layers in large-scale integrated circuit processes.
  • the chemical gas in the glow discharge reacts strongly with the metal film, causing an etching effect on the exposed diaphragm.
  • Reactive ion beam etching has ideal etching rate and selectivity, and the etching accuracy is also high.
  • extremely toxic gases such as chlorine or chlorine-based gases are often used as reaction gases. This has strict requirements on laboratory conditions, gas storage and processing, and general laboratories It is difficult to meet the conditions for using these toxic gases.
  • Ion beam etching uses the principle of glow discharge to decompose argon gas into argon ions.
  • the argon ions are accelerated by the anode electric field and physically bombard the sample surface to achieve the etching effect.
  • the ion beam with a certain energy enters the working room and shoots towards the solid surface to bombard the solid surface atoms, causing the material atoms to sputter to achieve the purpose of etching, which is a purely physical etching.
  • Ion beam etching has the characteristics of good directionality, no undercutting, and high steepness, and the etching pattern line width CD can be less than 100nm.
  • the ion beam etching rate is much lower than reactive ion beam etching, the selectivity is not as good as reactive ion beam etching.
  • the etching depth in the ion beam is positively related to the etching time.
  • etching can usually be completed within 1 to 3 minutes, which is relatively fast. Therefore, in general laboratories, ion beam etching methods are widely used in metal nanofabrication.
  • the sputtered ions and gases generated by the argon ion beam bombarding the surface of the metal film will affect the collimation of the ion beam and the energy reaching the sample surface; on the other hand, the sample will A thermal effect is produced, which will also affect the etching resistance of the photoresist and the etching accuracy of the chromium film layer.
  • the precision of conventional methods for etching metal film layers is usually greater than 100nm, which is a challenge for etching patterns below 100nm or even below 50nm.
  • the present disclosure provides a metal nanostructure and an ion beam etching processing method thereof to solve technical problems such as low etching accuracy of traditional ion beam etching methods.
  • the present disclosure provides a method for processing metal nanostructures using ion beam etching, including: S1, placing a sample to be processed in an ion beam etching equipment.
  • the sample to be processed includes a substrate, a metal, and a metal nanostructure in sequence from bottom to top.
  • the film layer and the photoresist nano-pattern layer, the photoresist nano-pattern layer exposes the etching area of the metal film layer; S2, uses an ion beam to etch the etching area of the metal film layer, and the etching time is the first time t 1 ; S3, intermittent ion beam etching, the intermittent time is the second duration t 2 ; S4, repeat S2 ⁇ S3 until the etching depth reaches the target thickness; S5, remove the photoresist nanopattern layer to obtain the target metal nanostructure .
  • S1 also includes preparing the sample to be processed, including: S11, cleaning the substrate; S12, depositing a layer of metal on the surface of the substrate to obtain a metal film layer; S13, coating photoresist on the metal film layer, exposing and developing A photoresist nanopattern layer is obtained.
  • S12 also includes: depositing an adhesion-promoting layer on the surface of the substrate to improve the adhesion between the substrate and the metal film layer.
  • the substrate in S11 includes one of quartz, silicon wafer, and sapphire;
  • the metal in S12 includes one of chromium, gold, and silver;
  • the photoresist in S13 includes positive photoresist or negative photoresist. Photoresist.
  • the range of the first duration t 1 in S2 is 5s ⁇ t 1 ⁇ 250s; the range of the second duration t 2 in S3 is 5s ⁇ t 2 ⁇ 250s; and t 2 ⁇ t 1 .
  • the number of times S2 to S3 is repeated in S4 is greater than 3.
  • the removal of the photoresist nanopattern layer in S5 includes: S51, using oxygen plasma to remove the photoresist nanopattern layer; S52, wet cleaning the sample to be processed to obtain the target metal nanostructure.
  • the target metal nanostructure obtained in S5 includes one of metal nanoround holes, metal nanosquare holes, metal nanogrooves, metal nanoslits and metal nanolattice; the characteristic size range of the metal nanostructure is 5nm ⁇ 100nm .
  • Another aspect of the present disclosure provides a metal nanostructure, which is processed according to the aforementioned method of processing a metal nanostructure using ion beam etching.
  • Another aspect of the present disclosure provides an application of the aforementioned method of processing metal nanostructures using ion beam etching in ultraviolet lithography chromium mask processing, metal plasma nanostructure processing, metal nanoantenna processing, and metasurface processing. .
  • the disclosed metal nanostructure and its ion beam etching processing method adopt an intermittent etching method of ion beam etching for a first time and intermittent etching for a second time.
  • ions The vacuum degree in the beam etching cavity is restored, which improves the collimation of the ion beam and reduces the energy loss when the ion beam reaches the sample surface; at the same time, the temperature rise effect caused by ion beam etching is reduced, and the The photoresist on the surface of the metal film layer deforms and improves the etching resistance, thereby improving the etching precision and the quality of the etched pattern, and can achieve the etching of metal nanostructures with feature sizes of 100nm or even below 50nm.
  • the disclosed method is simple to operate and does not require the use of toxic reaction gases. It only needs to control the etching method to achieve high-resolution and high-quality processing of metal nanostructures.
  • Figure 1 schematically illustrates a flow chart of a method for processing metal nanostructures using ion beam etching according to an embodiment of the present disclosure
  • Figure 2 schematically shows an etching time-power schematic diagram of an intermittent etching method according to an embodiment of the present disclosure
  • Figure 3 schematically shows a structural diagram of a sample to be processed in an intermittent etching method according to an embodiment of the present disclosure
  • Figure 4 schematically shows a schematic diagram of pressure changes in the cavity during ion beam etching during an etching cycle according to an embodiment of the present disclosure
  • 5a and 5b schematically show scanning electron microscope images of pattern structures of different sizes and shapes etched on the Cr film in Example 1 of the present disclosure
  • Figures 6a and 6b schematically show scanning electron microscopy images of the Cr photolithography mask grating pattern processed according to Embodiment 2 of the present disclosure
  • Figures 7a and 7b schematically show scanning electron microscopy images of square and cross nanopore pattern structures obtained by processing on a chromium film according to Embodiment 3 of the present disclosure
  • Figure 8 schematically shows a scanning electron microscope image of a nanograting structure prepared on an Ag film according to Embodiment 4 of the present disclosure
  • Figure 9 schematically shows a scanning electron microscope image of an open resonant ring SRR metasurface device prepared on an Au film according to Embodiment 5 of the present disclosure
  • Figure 10 schematically shows a scanning electron microscope image of a Bowtie nanopore prepared on an Au film according to Example 6 of the present disclosure.
  • the accelerated ion beam interacts with the surface of the sample to be processed, causing atoms on the surface of the sample to be processed to be sputtered into the etching cavity, causing the purity of the etching gas in the etching cavity to decrease.
  • the collision of the ion beam with other atoms in the etching cavity will affect the collimation of the ion beam and the energy of the ion beam reaching the surface of the sample to be processed.
  • the ion beam interacts with the surface of the sample to be processed to generate heat, which increases the temperature of the surface of the sample to be processed, which affects the etching resistance of the photoresist and the contrast of the substrate etching pattern.
  • the present disclosure provides a method for processing metal nanostructures using ion beam etching.
  • the sample to be processed is placed in the ion beam etching equipment, and the sample to be processed is automatically From bottom to top, it includes the substrate, the metal film layer and the photoresist nano-pattern layer.
  • the photoresist nano-pattern layer exposes the etching area of the metal film layer;
  • S2 uses ion beam to etch the etching area of the metal film layer.
  • the etching time is the first duration t 1 ; S3, intermittent ion beam etching, and the intermittent time is the second duration t 2 ; S4, repeat S2 ⁇ S3 until the etching depth reaches the target thickness; S5, remove the photoresist Nanopatterning layer to obtain the target metal nanostructure.
  • the intermittent etching method provided by the present disclosure first uses an ion beam to etch the surface of the sample to be processed for a first time t 1 and pauses for a second time t 2 ; then etches for a first time t 1 and pauses for a second time.
  • the etching is completed after two time periods t 2 and N cycles (t 1 +t 2 ), and the etching power is 200 ⁇ 300W.
  • the vacuum degree of the etching cavity will be restored to a certain extent (as shown in Figure 4), thereby improving the purity of the etching gas in the cavity in the next etching cycle.
  • the temperature of the substrate will be reduced, so the etching accuracy of the sample pattern can be improved.
  • This disclosure adopts an intermittent etching method.
  • the vacuum degree in the ion beam etching cavity is restored, which improves the collimation of the ion beam and reduces the time required for the ion beam to reach the area to be processed. Energy loss at the sample surface.
  • the temperature rise effect caused by ion beam etching can be reduced during the intermittent process, reducing the photoresist deformation on the surface of the metal film layer and improving the etching resistance. Utilizing the effects of the above two aspects, the etching precision and the quality of the etched pattern are ultimately improved, and the etching of metal nanostructures with a characteristic size of 100nm or even below 50nm can be achieved.
  • S1 also includes preparing a sample to be processed, including: S11, cleaning the substrate; S12, depositing a layer of metal on the surface of the substrate to obtain a metal film layer; S13, applying photolithography on the metal film layer Glue, exposure and development to obtain a photoresist nano-pattern layer.
  • a photoresist nanopattern layer Before etching metal nanostructures, a photoresist nanopattern layer must first be prepared. Preparing the photoresist nanopattern layer includes: cleaning the substrate using conventional semiconductor cleaning methods to remove contaminants on its surface; Deposit a metal film layer on the surface. The deposition methods include magnetron sputtering deposition, electron beam evaporation deposition, etc.; then spin-coat photoresist on the metal film layer. The thickness of the photoresist is 80nm to 100nm. The photoresist is spin-coated.
  • S12 also includes: depositing an adhesion-promoting layer on the surface of the substrate to improve the adhesion between the substrate and the metal film layer.
  • an adhesion-promoting layer can be deposited between the substrate and the metal film layer to improve the adhesion between the two. , to facilitate the subsequent ion beam etching process.
  • the substrate in S11 includes one of quartz, silicon wafer, and sapphire;
  • the metal in S12 includes one of chromium, gold, and silver;
  • the photoresist in S13 includes positive photoresist. Resist or negative photoresist.
  • the materials of the substrate include quartz, silicon wafer, sapphire, etc.; the materials of the metal film layer include chromium, gold, silver, etc.; the ion beam is an argon ion beam.
  • the photoresist can be positive photoresist such as PMMA (MicroChem Corp, USA), ZEP520A (Zeon Corp, Japan), AR-P6200 (All Resist Gmbh, Germany), or HSQ (Micro Resist Technology Gmbh, Germany), Ma -N2400 series (Micro Resist Technology Gmbh, Germany) and other negative photoresists.
  • the shape of the substrate includes circular, square and other shapes; the diameter of the circular substrate is D, and its value range is 5mm ⁇ D ⁇ 220mm; the side length of the square substrate is L, and its value range is 5mm ⁇ L ⁇ 220mm.
  • the range of the first duration t 1 in S2 is 5s ⁇ t 1 ⁇ 250s; the range of the second duration t 2 in S3 is 5s ⁇ t 2 ⁇ 250s; and t 2 ⁇ t 1 .
  • the number of times S2 to S3 is repeated in S4 is greater than 3.
  • the etching period is N, and its value range is N>0.
  • N is greater than 3, which is determined by the thickness d of the metal film layer.
  • the removal of the photoresist nanopattern layer in S5 includes: S51, using oxygen plasma to remove the photoresist nanopattern layer; S52, wet cleaning the sample to be processed to obtain the target metal nanostructure.
  • the target metal nanostructure obtained in S5 includes one of metal nanoround holes, metal nanosquare holes, metal nanogrooves, metal nanoslits and metal nanolattice; the characteristic size of the metal nanostructure The range is 5nm ⁇ 100nm.
  • the disclosed method can realize the preparation of metal nanostructures with a characteristic size below 100nm, especially the processing of gaps with a minimum characteristic size of 22nm on the Cr film; the metal nanostructures that can be prepared are not limited to the above 5 types, and the others are as mentioned above. Structures within the feature size range can also be achieved by designing the nanopatterned layer of photoresist.
  • the present disclosure also provides a metal nanostructure, which is processed according to the aforementioned method of using ion beam etching to process metal nanostructures.
  • the disclosed method is simple to operate and does not require the use of toxic reaction gases. It only needs to control the etching method to achieve high-resolution and high-quality metal nanostructure processing and obtain the target metal nanostructure.
  • the present disclosure also provides an application of the aforementioned method of processing metal nanostructures using ion beam etching in ultraviolet lithography chromium mask processing, metal plasma nanostructure processing, metal nanoantenna processing, and metasurface processing.
  • the disclosed metal film nanostructure etching processing method can be used for processing ultraviolet photolithography chromium masks, metal plasma nanostructures, metal nanoantennas, metasurfaces, etc., and is widely used.
  • the disclosed method for processing metal nanostructures using ion beam etching includes performing the following steps in sequence:
  • Each etching cycle includes: using ion beam to etch the sample to be processed for a first period of time t 1 ; and intermittent for a second period of time t 2 to increase the vacuum degree of the cavity and reduce the temperature of the sample.
  • the number of etching cycles N is determined according to the thickness of the metal film layer.
  • This embodiment takes the preparation of chromium film nanopatterns as an example to illustrate.
  • the implementation steps are as follows:
  • Step 11 Prepare a round transparent quartz substrate; the thickness of the quartz substrate is 3mm and the diameter is 25.4mm. Clean the quartz substrate using conventional semiconductor cleaning methods to remove surface contaminants; this is equivalent to the above step S11.
  • Step 12 Sputter a layer of chromium film (metal film layer) with a thickness of 40 nm on the surface of the quartz substrate; equivalent to the above step S12.
  • Step 13 Use a glue leveling machine to spin-coat a layer of positive electron beam photoresist on the surface of the chromium layer.
  • the thickness of the photoresist is 80 ⁇ 100nm. After the photoresist is spin-coated, it is pre-baked on a constant-temperature hot plate at 150°C to evaporate and remove the organic solvent in the photoresist;
  • Step 14 Place the quartz substrate coated with positive electron beam photoresist in the electron beam lithography equipment, use electron beam lithography technology to directly write and expose nanopatterns with different sizes and shapes on the photoresist, and then Develop to obtain a photoresist nanopattern layer; which is equivalent to the above step S13.
  • Step 16 Treat with oxygen plasma and then use chemical liquid to remove the residual photoresist on the surface of the chromium film after ion beam etching to obtain the required nano-pattern of the chromium film; equivalent to step S5 above.
  • Step 17 Use scanning electron microscopy to characterize the etched chromium film nanopatterns.
  • Figures 5a and 5b show patterns with different sizes and shapes etched on the Cr film using this embodiment. It can be seen that the mask pattern has clear edges and the pattern size is evenly distributed; the smallest pattern feature size CD is 22nm.
  • This embodiment takes the preparation of Cr photolithography mask grating pattern as an example to illustrate.
  • the implementation steps are as follows:
  • Step 21 Clean the quartz substrate with a diameter of 25.4mm and a thickness of 3mm, and deposit a layer of metal Cr film on the quartz substrate using the magnetron sputtering method.
  • the thickness of the Cr film is 40nm; equivalent to the above steps S11 to S12.
  • Step 22 Spin-coat 80nm electron beam photoresist on the quartz substrate coated with Cr film and perform pre-baking.
  • the spin-coated electron beam photoresist model is AR-P6200; the pre-baking temperature is 150°C and the pre-baking time is 10min;
  • Step 23 Directly write the grating pattern through the electron beam exposure system. After the exposure is completed, the exposed pattern is developed with a developer to obtain a photoresist grating pattern layer; which is equivalent to the above step S13.
  • Step 24 Use ion beam etching equipment to etch the developed grating pattern layer using the intermittent etching method of the present disclosure.
  • etching pump the vacuum of the etching equipment cavity to 6 ⁇ 10 -7 Torr, and then start the radio frequency power to use argon ion beam for etching.
  • the radio frequency power during etching is 244W
  • the cavity pressure during etching is 1.8 ⁇ 10 -4 Torr
  • Step 25 Use oxygen plasma to remove the electron beam photoresist, and then wet clean it to obtain a Cr photolithography mask nano grating structure; equivalent to the above step S5.
  • Figures 6a and 6b are scanning electron microscopy photos of the processed Cr photolithography mask grating pattern.
  • the grating slit width is 22 ⁇ 25nm, and the grating period is 130nm.
  • This example takes the preparation of square and cross nanopore Cr structures as an example.
  • the implementation steps are as follows:
  • Step 31 Clean the quartz substrate with a side length of 76.2mm and a thickness of 6.35mm. Use the magnetron sputtering method to coat a layer of chromium film on the quartz substrate.
  • the thickness of the chromium film is 40nm; equivalent to the above steps S11 to S12.
  • Step 32 Use the method of steps 22 to 25 in Example 2 to prepare a square hole chromium membrane structure.
  • 7a and 7b are electron microscopy images of square and cross nanopore pattern structures obtained by processing a chromium film using the intermittent etching method of the present disclosure.
  • the corners of the square hole pattern are relatively clear, and the minimum size of the square hole is 40nm.
  • the minimum size of the cross-shaped nanopore is 20nm.
  • This embodiment takes the processing of nanopores and nanograting structures on Ag films as an example to illustrate.
  • the implementation steps are as follows:
  • Step 41 Clean the quartz substrate, use electron beam evaporation method to coat a 3nm Cr film on a circular quartz substrate with a diameter of 25mm, and then coat a 50nm Ag film, where the Cr film serves as an adhesion layer to increase the Ag Adhesion between the film and the quartz surface; equivalent to the above steps S11 to S12.
  • Step 42 Spin-coat a layer of AZ3170 photoresist on the quartz substrate with a thickness of 30nm; bake the photoresist with a hot plate for 60 seconds, and the hot plate temperature is 110°C;
  • Step 43 Expose the photoresist using UV near-field lithography, and obtain the designed photoresist nanopattern layer after development; equivalent to the above step S13.
  • Step 44 Use ion beam etching equipment to etch the developed photoresist nanopattern layer using the intermittent etching method of the present disclosure.
  • etching pump the vacuum of the etching equipment cavity to 6 ⁇ 10 -7 Torr, and then start the radio frequency power to use argon ion beam for etching.
  • the radio frequency power during etching is 244W
  • the cavity pressure during etching is 1.8 ⁇ 10 -4 Torr
  • Step 45 Use oxygen plasma to remove the remaining photoresist on the surface of the Ag film, and then wet clean it to obtain the Ag nanopore and nanograting structure; equivalent to the above step S5.
  • Figure 8 is a scanning electron microscope photo of a nanograting prepared by the intermittent etching method of the present disclosure.
  • the gap width in the nanograting is 70nm.
  • This embodiment takes the processing of Au nanostructures as an example to illustrate.
  • the implementation steps are as follows:
  • Step 51 Clean the silicon substrate, and use the magnetron sputtering method to first coat a 5nm Cr film on the 2.5mm ⁇ 2.5mm silicon substrate, and then coat a 50nm Au film, where the Cr film is The adhesion layer improves the adhesion between the Ag film and the quartz surface; it is equivalent to the above steps S11 to S12.
  • Step 52 Spin-coat a layer of negative photoresist Ma-N2401 on the surface of the plated Au film.
  • the thickness of the photoresist is 100nm. Bake the photoresist-coated piece on a hot plate for 1 minute. The hot plate temperature is 95°C;
  • Step 53 Use electron beam lithography to expose the designed SRR metasurface pattern. After the exposure is completed, develop it to obtain the designed photoresist nanopattern layer; which is equivalent to the above step S13.
  • Step 54 Use ion beam etching equipment to etch the developed photoresist nanopattern layer using the intermittent etching method of the present disclosure.
  • etching pump the vacuum of the etching equipment cavity to 6 ⁇ 10 -7 Torr, and then start the radio frequency power to use argon ion beam for etching.
  • the radio frequency power during etching is 244W
  • the cavity pressure during etching is 1.8 ⁇ 10 -4 Torr
  • Step 55 Use oxygen plasma to remove the remaining photoresist on the surface of the Au nanostructure, and then wet clean it to obtain an Au SRR structure metasurface device; equivalent to step S5 above.
  • Figure 9 is a scanning electron microscope photograph of an open resonant ring SRR metasurface device prepared by the intermittent etching method of the present disclosure.
  • the splitting gap width of the SRR resonance ring is 36nm.
  • This embodiment takes processing Bowtie-shaped nanopores on a gold film as an example.
  • the implementation steps are as follows:
  • Step 61 Clean the quartz substrate, and use the magnetron sputtering method to first coat a 5nm Cr film on the quartz substrate with a size of 2.5mm ⁇ 2.5mm, and then coat a 50nm Au film; equivalent to step S11 above. ⁇ S12.
  • Step 62 Spin-coat a layer of electron beam photoresist PMMA on the surface of the plated Au film.
  • the thickness of the photoresist is 150nm. Bake the photoresist-coated piece on a hot plate for 1 minute.
  • the hot plate temperature is 150°C;
  • Step 63 Use electron beam lithography to expose the designed Bowtie pattern. After the exposure is completed, develop to obtain the designed Bowtie photoresist nanopattern layer; which is equivalent to the above step S13.
  • Step 64 Use ion beam etching equipment to etch the developed photoresist nanopattern layer using the intermittent etching method of the present disclosure.
  • etching pump the vacuum of the etching equipment cavity to 6 ⁇ 10 -7 Torr, and then start the radio frequency power to use argon ion beam for etching.
  • the radio frequency power during etching is 244W
  • the cavity pressure during etching is 1.8 ⁇ 10 -4 Torr
  • Step 65 Use oxygen plasma to remove the remaining electron beam photoresist on the surface of the Au film, and then wet clean it to obtain a gold film nanopore structure; equivalent to the above step S5.
  • Figure 10 is a scanning electron microscope photo of a gold film Bowtie nanopore prepared by the intermittent etching method of the present disclosure.
  • the gap size of the processed gold film Bowtie-shaped nanopore is 35 nm.
  • a metal film layer sample to be etched is placed into an ion beam etching equipment, and an argon ion beam is used for etching; the metal film layer is subjected to multiple cycles of intermittent etching.
  • Each etching cycle includes: using an argon ion beam to etch the sample to be processed for a first period of time; and intermittent for a second period of time.
  • the purity of the etching ions in the cavity of the etching equipment is restored, and the temperature of the sample is reduced, which improves the collimation and energy retention of the etching ions and the etching resistance of the photoresist. sex.

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Abstract

本公开提供了一种使用离子束刻蚀加工金属纳米结构的方法，该方法包括：S1，将待加工样品置于离子束刻蚀设备中，待加工样品自下而上依次包括衬底、金属膜层和光刻胶纳米图形层，光刻胶纳米图形层暴露出金属膜层的刻蚀区；S2，使用离子束刻蚀金属膜层的刻蚀区，刻蚀的时间为第一时长t 1；S3，间歇离子束刻蚀，间歇的时间为第二时长t 2；S4，重复S2～S3，直至刻蚀深度达到目标厚度；S5，去除光刻胶纳米图形层，得到目标金属纳米结构。本公开的方法能够提高离子束的准直性、降低由于离子束刻蚀所引起的温度升高效应，从而提高刻蚀精度和刻蚀图形的质量。

Description

金属纳米结构及其离子束刻蚀加工方法
本公开要求于2022年09月01日提交的、申请号为202211076513.1的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及半导体加工技术领域，具体涉及一种金属纳米结构及其离子束刻蚀加工方法。
背景技术
纳米器件的发展对纳米结构关键尺寸(Critical Dimension，CD)的要求越来越严格。金属纳米结构的加工在半导体工艺、等离子纳米光子学器件中具有十分重要的作用。在半导体加工中，金属铬(Cr)膜由于其物理、化学稳定性好、使用寿命长、反差高，通常被用作掩模版的吸收层。在等离子纳米光学器件中，金(Au)、银(Ag)等贵金属纳米结构，由于其强烈的光-物质相互作用特性，被应用于传感检测和特殊光学性质的产生。对于Cr层等金属层上图形的刻蚀，有干法刻蚀和湿法刻蚀两种。湿法刻蚀是把样品浸泡在化学腐蚀液中，腐蚀液腐蚀暴露在光刻胶开口图形中的金属材料。湿法刻蚀的特性是各项同性，这种方法主要用于刻蚀微米级的图形。但对于微米以下的图形刻蚀，干法刻蚀是一种主要的方法。
目前，大规模集成电路工艺中金属层的刻蚀主要采用反应离子刻蚀。在反应离子刻蚀中，辉光放电的化学气体与金属膜发生强烈化学反应，对暴露的隔膜产生刻蚀作用。反应离子束刻蚀具有理想的刻蚀速率和选择比，刻蚀精度也较高。但在反应离子刻蚀金属膜结构的过程中，常采用氯气或氯基气体等具有极大毒性的气体作为反应气体，这对实验室条件、气体存储和处理具有严格要求，一般性的实验室难满足使用这些毒性气体的条件。
离子束刻蚀利用辉光放电原理将氩气分解为氩离子，氩离子经过阳 极电场的加速对样品表面进行物理轰击，以达到刻蚀的作用。具有一定能量的离子束进入工作室，射向固体表面轰击固体表面原子，使材料原子发生溅射而达到刻蚀的目的，属于纯物理刻蚀。离子束刻蚀具有方向性好、无钻蚀、陡直度高的特点，刻蚀图形线宽CD可小于100nm。
虽然离子束刻蚀速率比反应离子束刻蚀要低很多，选择比也不如反应离子束刻蚀。对于几十纳米厚的金属膜层刻蚀，由于离子束刻蚀不需要毒性的反应气体，对实验室条件的要求更低。在离子束刻蚀深度与刻蚀时间正相关。对于几十纳米厚的金属膜，通常可以在1～3分钟内完成刻蚀，时间比较快。因此，在一般的实验室中，离子束刻蚀方法在金属纳米加工中得到了广泛应用。但是在离子束刻蚀过程中，氩离子束轰击金属膜表面产生的溅射离子和气体，会影响离子束的准直性及到达样品表面的能量；另一方面，样品在刻蚀过程中会产生热效应，这也会影响光刻胶的抗刻蚀性和对铬膜层的刻蚀精度。
因此，常规方法刻蚀金属膜层的精度通常大于100nm，对于100nm以下甚至50nm以下图形的刻蚀是一个挑战。
发明内容
(一)要解决的技术问题
针对上述问题，本公开提供了一种金属纳米结构及其离子束刻蚀加工方法，用于解决传统离子束刻蚀方法刻蚀精度低等技术问题。
(二)技术方案
本公开一方面提供了一种使用离子束刻蚀加工金属纳米结构的方法，包括：S1，将待加工样品置于离子束刻蚀设备中，待加工样品自下而上依次包括衬底、金属膜层和光刻胶纳米图形层，光刻胶纳米图形层暴露出金属膜层的刻蚀区；S2，使用离子束刻蚀金属膜层的刻蚀区，刻蚀的时间为第一时长t 1；S3，间歇离子束刻蚀，间歇的时间为第二时长t 2；S4，重复S2～S3，直至刻蚀深度达到目标厚度；S5，去除光刻胶纳米图形层，得到目标金属纳米结构。
进一步地，S1还包括制备待加工样品，包括：S11，清洗衬底；S12，在衬底表面沉积一层金属得到金属膜层；S13，在金属膜层上涂覆光刻胶，曝光、显影得到光刻胶纳米图形层。
进一步地，S12之前还包括：在衬底表面沉积增粘层，以提高衬底与金属膜层之间的粘附性。
进一步地，S11中的衬底包括石英、硅片、蓝宝石中的一种；S12中的金属包括铬、金和银中的一种；S13中的光刻胶包括正性光刻胶或负性光刻胶。
进一步地，S2中第一时长t 1的范围为5s≤t 1≤250s；S3中第二时长t 2的范围为5s≤t 2≤250s；且t 2≥t 1。
进一步地，S4中重复S2～S3的次数大于3。
进一步地，S5中去除光刻胶纳米图形层包括：S51，利用氧等离子体去除光刻胶纳米图形层；S52，湿法清洗待加工样品，得到目标金属纳米结构。
进一步地，S5中得到的目标金属纳米结构包括金属纳米圆孔、金属纳米方孔、金属纳米槽、金属纳米缝隙和金属纳米点阵中的一种；金属纳米结构的特征尺寸范围为5nm～100nm。
本公开另一方面提供了一种金属纳米结构，该金属纳米结构为根据前述的使用离子束刻蚀加工金属纳米结构的方法加工得到。
本公开还有一方面提供了一种根据前述的使用离子束刻蚀加工金属纳米结构的方法在紫外光刻铬掩模版加工、金属等离子纳米结构加工、金属纳米天线加工、超表面加工中的应用。
(三)有益效果
本公开的金属纳米结构及其离子束刻蚀加工方法，一方面通过采用离子束刻蚀第一时长、间歇刻蚀第二时长的间歇刻蚀法，在每次刻蚀的间歇时间里，离子束刻蚀腔体中的真空度得到恢复，提高了离子束的准直性，降低了离子束到达样品表面时能量损失；同时降低了由于离子束刻蚀所引起的温度升高效应，降低了金属膜层表面的光刻胶形变并提高了抗刻蚀性能，从而提高了刻蚀精度和刻蚀图形的质量，可实现特征尺 寸在100nm甚至50nm以下的金属纳米结构的刻蚀。另一方面，本公开的方法操作简单，不需要使用有毒反应气体，只需调控刻蚀方法，就可以实现高分辨、高质量的金属纳米结构的加工。
附图说明
图1示意性示出了根据本公开实施例中使用离子束刻蚀加工金属纳米结构的方法流程图；
图2示意性示出了根据本公开实施例中间歇刻蚀方法的刻蚀时间-功率示意图；
图3示意性示出了根据本公开实施例中间歇刻蚀法中待加工样品的结构示意图；
图4示意性示出了根据本公开实施例中离子束刻蚀在一个刻蚀周期内腔体中的压强变化示意图；
图5a、图5b示意性示出了根据本公开本实施例1中在Cr膜上刻蚀加工的具有不同大小和不同形状的图形结构的扫描电镜图；
图6a、图6b示意性示出了根据本公开实施例2中加工得到的Cr光刻掩模光栅图形的扫描电镜图；
图7a、图7b示意性示出了根据本公开实施例3在铬膜上加工得到方形和十字叉纳米孔图形结构的扫描电镜图；
图8示意性示出了根据本公开实施例4在Ag膜上制备的纳米光栅结构的扫描电镜图；
图9示意性示出了根据本公开实施例5在Au膜上制备的开口共振环SRR超表面器件的扫描电镜图；
图10示意性示出了根据本公开实施例6在Au膜上制备的Bowtie纳米孔的扫描电镜图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，以下结合具体实施例，并参照附图，对本公开进一步详细说明。
在此使用的术语仅仅是为了描述具体实施例，而并非意在限制本公开。在此使用的术语“包括”、“包含”等表明了所述特征、步骤、操作和/或部件的存在，但是并不排除存在或添加一个或多个其他特征、步骤、操作或部件。
说明书与权利要求中所使用的序数例如“第一”、“第二”、“第三”等的用词，以修饰相应的元件，其本身并不意含或代表该元件有任何的序数，也不代表某一元件与另一元件的顺序、或是制造方法上的顺序，该些序数的使用仅用来使具有某命名的一元件得以和另一具有相同命名的元件能作出清楚区分。
在离子束刻蚀过程中，被加速的离子束与待加工样品表面发生作用，使得待加工样品表面的原子被溅射到刻蚀腔体中，造成刻蚀腔体内刻蚀气体的纯度降低。离子束与刻蚀腔体中的其它原子碰撞，会影响离子束的准直性和到达待加工样品表面的离子束能量，因此，会影响离子束的刻蚀精度和刻蚀图形质量；另一方面，在离子束刻蚀过程中，离子束与待加工样品表面相互作用产生热量，使得待加工样品表面的温度升高，会影响光刻胶的抗刻蚀性和基底刻蚀图形的对比度。
针对上述两个问题，本公开提供了一种使用离子束刻蚀加工金属纳米结构的方法，请参见图1，包括：S1，将待加工样品置于离子束刻蚀设备中，待加工样品自下而上依次包括衬底、金属膜层和光刻胶纳米图形层，光刻胶纳米图形层暴露出金属膜层的刻蚀区；S2，使用离子束刻蚀金属膜层的刻蚀区，刻蚀的时间为第一时长t 1；S3，间歇离子束刻蚀，间歇的时间为第二时长t 2；S4，重复S2～S3，直至刻蚀深度达到目标厚度；S5，去除光刻胶纳米图形层，得到目标金属纳米结构。
本公开提供的间歇刻蚀方法，如图2所示，先使用离子束刻蚀待加工样品表面第一时长t 1，停歇第二时长t 2；然后再刻蚀第一时长t 1，停歇第二时长t 2，N个周期(t 1+t 2)后完成刻蚀，刻蚀功率为200～300W。在停 歇的时间里，刻蚀腔体的真空度将得到一定程度的恢复(如图4所示)，从而提高下一个刻蚀周期中腔体刻蚀气体的纯度，同时在这段停歇时间里衬底的温度会降低，因此可以提高样品图形的刻蚀精度。
本公开采用间歇刻蚀法，一方面，在每次刻蚀的间歇时间里，离子束刻蚀腔体中的真空度得到恢复，提高了离子束的准直性，降低了离子束到达待加工样品表面时的能量损失。另一方面，在间歇过程中可以降低由于离子束刻蚀所引起的温度升高效应，降低了金属膜层表面的光刻胶形变并提高了抗刻蚀性能。利用上述两个方面的效应，最终提高了刻蚀精度和刻蚀图形的质量，可实现特征尺寸在100nm甚至50nm以下的金属纳米结构的刻蚀。
在上述实施例的基础上，S1还包括制备待加工样品，包括：S11，清洗衬底；S12，在衬底表面沉积一层金属得到金属膜层；S13，在金属膜层上涂覆光刻胶，曝光、显影得到光刻胶纳米图形层。
在进行金属纳米结构的刻蚀之前，先要制备光刻胶纳米图形层，制备光刻胶纳米图形层包括：使用常规的半导体清洗方法清洗衬底，以去除其表面的污染物；在衬底表面沉积金属膜层，沉积的方法包括磁控溅射沉积、电子束蒸发沉积等；再在该金属膜层上旋涂光刻胶，光刻胶的厚度为80nm～100nm，光刻胶旋涂以后，在恒温热板上进行前烘，蒸发去除光刻胶中的有机溶剂；通过光刻方法对上一步得到的光刻胶层进行曝光，显影后得到所设计的光刻胶纳米图形层。光刻胶纳米图形层制备完成后，再置于离子束刻蚀设备中进行刻蚀，本公开的间歇刻蚀法的结构示意图如图3所示。
在上述实施例的基础上，S12之前还包括：在衬底表面沉积增粘层，以提高衬底与金属膜层之间的粘附性。
如银等金属若直接沉积在衬底上，可能存在粘附性较差的问题，这时可通过在衬底和金属膜层之间沉积增粘层，以提高两者之间的粘附性，便于进行后续的离子束刻蚀工艺。
在上述实施例的基础上，S11中的衬底包括石英、硅片、蓝宝石中的一种；S12中的金属包括铬、金和银中的一种；S13中的光刻胶包括正 性光刻胶或负性光刻胶。
衬底的材料包括石英、硅片、蓝宝石等；金属膜层的材料包括铬、金和银等；离子束为氩离子束。光刻胶可为PMMA(MicroChem Corp，USA)、ZEP520A(Zeon Corp，Japan)、AR-P6200(All Resist Gmbh，Germany)等正性光刻胶，或HSQ(Micro Resist Technology Gmbh，Germany)、Ma-N2400系列(Micro Resist Technology Gmbh，Germany)等负性光刻胶。
衬底形状包括圆形、方形等形状；圆形衬底的直径为D，其取值范围5mm<D≤220mm；方形衬底的边长为L，其取值范围5mm<L≤220mm。
在上述实施例的基础上，S2中第一时长t 1的范围为5s≤t 1≤250s；S3中第二时长t 2的范围为5s≤t 2≤250s；且t 2≥t 1。
金属膜层厚度d的取值范围为10nm≤d≤100nm；总刻蚀时间t＝N(t 1+t 2)，第一时长t 1的取值范围为5s≤t 1≤250s，优选为5s≤t 1≤150s，进一步优选为10s≤t 1≤20s；第二时长t 2的取值范围为5s≤t 2≤250s，优选为50s≤t 2≤150s，进一步优选为60s≤t 2≤120s，其中t 2≥t 1，t 2≥t 1可以使得刻蚀腔体中的真空度得到更好地恢复。
在上述实施例的基础上，S4中重复S2～S3的次数大于3。
刻蚀周期为N，其取值范围N>0，优选地N大于3，其由金属膜层的厚度d所决定。
在上述实施例的基础上，S5中去除光刻胶纳米图形层包括：S51，利用氧等离子体去除光刻胶纳米图形层；S52，湿法清洗待加工样品，得到目标金属纳米结构。
使用氧等离子对光刻胶层进行等离子体刻蚀，去除金属纳米结构表面残留的光刻胶后，再湿法清洗，得到目标金属纳米结构。
在上述实施例的基础上，S5中得到的目标金属纳米结构包括金属纳米圆孔、金属纳米方孔、金属纳米槽、金属纳米缝隙和金属纳米点阵中的一种；金属纳米结构的特征尺寸范围为5nm～100nm。
本公开的方法可以实现特征尺寸在100nm以下的金属纳米结构的制备，尤其是可以在Cr膜上实现最小特征尺寸22nm缝隙的加工；可 以制备的金属纳米结构也不限于上述5种，其它在上述特征尺寸范围内的结构也可通过对光刻胶纳米图形层的设计而实现。
本公开还提供了一种金属纳米结构，该金属纳米结构为根据前述的使用离子束刻蚀加工金属纳米结构的方法加工得到。
本公开的方法操作简单，不需要使用有毒反应气体，只需调控刻蚀方法，就可以实现高分辨、高质量的金属纳米结构的加工，得到目标金属纳米结构。
本公开还提供一种根据前述的使用离子束刻蚀加工金属纳米结构的方法在紫外光刻铬掩模版加工、金属等离子纳米结构加工、金属纳米天线加工、超表面加工中的应用。
本公开的金属膜纳米结构刻蚀加工方法可用于紫外光刻铬掩模版、金属等离子纳米结构、金属纳米天线、超表面等的加工，应用广泛。
下面通过具体实施方式对本公开作进一步说明。在以下实施例中对上述金属纳米结构及其离子束刻蚀加工方法进行具体说明。但是，下述实施例仅用于对本公开进行例示，本公开的范围不限于此。
本公开的使用离子束刻蚀加工金属纳米结构的方法，包括依次执行以下的步骤：
S11，清洗衬底；
S12，在衬底表面沉积金属膜层；
S13，在金属膜层上涂覆光刻胶，曝光、显影得到光刻胶纳米图形层。
S2～S4，将衬底上具有光刻胶纳米图形和厚度为d的金属膜层的待加工样品放置到离子束刻蚀机内，利用离子束对金属膜层实施多个周期的间歇刻蚀。各刻蚀周期包括：利用离子束刻蚀待加工样品第一时长t 1；间歇第二时长t 2以提高腔体真空度和降低样品温度。刻蚀的周期数N根据金属膜层的厚度确定。
S5，去除残留的光刻胶纳米图形层，得到目标金属纳米结构。
根据上述步骤S11～步骤S5，以下提供了6个具体实施例。
实施例1：
本实施例以制备铬膜纳米图形为例进行说明，实施步骤如下：
步骤11：准备一块圆形透明石英基底；石英基底的厚度为3mm，直径为25.4mm。将石英基底用常规的半导体清洗方法进行清洗，去除表面的污染物；相当于上述步骤S11。
步骤12：在石英基底表面溅射一层厚度为40nm的铬膜(金属膜层)；相当于上述步骤S12。
步骤13：采用匀胶机在铬层表面旋涂一层正性电子束光刻胶，光刻胶的厚度为80～100nm。光刻胶旋涂以后，在150℃的恒温热板上进行前烘，蒸发去除光刻胶中的有机溶剂；
步骤14：将涂有正性电子束光刻胶的石英基片放置在电子束光刻设备中，用电子束光刻技术在光刻胶上直写曝光具有不同尺寸和形状的纳米图形，然后显影得到光刻胶纳米图形层；相当于上述步骤S13。
步骤15：将带有光刻胶纳米图形层的石英基底放入离子束刻蚀机中，采用本公开的间歇刻蚀方法用离子束刻蚀图形。首先将样品放入到刻蚀腔体中，抽真空至需要的值；然后依次执行用氩离子束刻蚀第一时长t 1＝10s，间歇第二时长t 2＝60s，共20个周期(即N＝20)；相当于上述步骤S2～S4。
步骤16：用氧等离子体处理然后用化学液去除离子束刻蚀后铬膜表面的残留光刻胶，得到需要的铬膜纳米图形；相当于上述步骤S5。
步骤17：用扫描电镜表征刻蚀得到的铬膜纳米图形。图5a和图5b所示为利用本实施例在Cr膜上刻蚀加工的具有不同大小和不同形状的图形。可以看出，掩模图形边缘清晰、图形大小分布均匀；最小的图形特征尺寸CD为22nm。
实施例2：
本实施例以制备Cr光刻掩模光栅图形为例进行说明，实施步骤如下：
步骤21：清洗直径为25.4mm、厚度为3mm的石英基底，在该石英基底上采用磁控溅射方法沉积一层金属Cr膜，Cr膜的厚度为40nm；相当于上述步骤S11～S12。
步骤22：在镀有Cr膜的石英基片上旋涂80nm电子束光刻胶并进 行前烘，所旋涂的电子束光刻胶型号为AR-P6200；前烘温度为150℃，前烘时间为10min；
步骤23：通过电子束曝光系统直写光栅图形。曝光完成后用显影液显影所曝光图形，得到光刻胶光栅图形层；相当于上述步骤S13。
步骤24：通过离子束刻蚀设备采用本公开的间歇刻蚀法对显影后的光栅图形层进行刻蚀。在刻蚀时，将刻蚀设备腔体真空度抽到6×10 -7Torr，然后启动射频功率用氩离子束刻蚀，刻蚀时的射频功率为244W，刻蚀时的腔体压强为1.8×10 -4Torr，用氩离子束刻蚀第一时长t 1＝15s，间歇第二时长t 2＝60s，刻蚀15个周期(N＝20)；相当于上述步骤S2～S4。
步骤25：利用氧等离子体去除电子束光刻胶，然后再湿法清洗，得到Cr光刻掩模纳米光栅结构；相当于上述步骤S5。
图6a和图6b是加工得到的Cr光刻掩模光栅图形扫描电镜照片。光栅缝隙宽度为22～25nm，光栅周期为130nm。
实施例3：
本实施例以制备方形和十字叉纳米孔Cr结构为例进行说明，实施步骤如下：
步骤31：清洗边长为76.2mm、厚度为6.35mm的石英基底，在该石英基底上采用磁控溅射方法镀一层铬膜，铬膜的厚度为40nm；相当于上述步骤S11～S12。
步骤32：采用实施例2中步骤22～步骤25的方法制备方形孔铬膜结构。在实施间歇刻蚀过程中，用氩离子束刻蚀第一时长t 1＝20s，间歇第二时长t 2＝120s，刻蚀10个周期(N＝20)；相当于上述步骤S13～S5。
图7a和图7b是利用本公开的间歇刻蚀法在铬膜上加工得到方形和十字叉纳米孔图形结构的电镜图。方孔图形的边角比较清晰，方孔的最小尺寸为40nm。十字叉纳米孔的最小尺寸为20nm。
实施例4：
本实施例以在Ag膜上加工纳米孔和纳米光栅结构为例进行说明，实施步骤如下：
步骤41：清洗石英基片，利用电子束蒸发方法在直径为25mm的圆 形石英基片上镀一层3nm的Cr膜，然后镀一层50nm的Ag膜，其中的Cr膜作为粘附层提高Ag膜和石英表面之间的粘附性；相当于上述步骤S11～S12。
步骤42：在石英基片上旋涂一层AZ3170光刻胶，厚度为30nm；对光刻胶用热板烘60s，热板温度为110℃；
步骤43：利用紫外近场光刻方法对光刻胶进行曝光，显影后得到所设计的光刻胶纳米图形层；相当于上述步骤S13。
步骤44：利用离子束刻蚀设备采用本公开的间歇刻蚀法对显影后的光刻胶纳米图形层进行刻蚀。在刻蚀时，将刻蚀设备腔体真空度抽到6×10 -7Torr，然后启动射频功率用氩离子束刻蚀，刻蚀时的射频功率为244W，刻蚀时的腔体压强为1.8×10 -4Torr，用氩离子束刻蚀第一时长t 1＝10s，间歇第二时长t 2＝80s，刻蚀6个周期(N＝6)；相当于上述步骤S2～S4。
步骤45：利用氧等离子体去除Ag膜表面残留的光刻胶，然后再湿法清洗，得到Ag纳米孔和纳米光栅结构；相当于上述步骤S5。
图8是利用本公开的间歇刻蚀法制备的纳米光栅扫描电镜照片，图8中纳米光栅中缝隙宽度为70nm。
实施例5：
本实施例以加工Au纳米结构为例进行说明，实施步骤如下：
步骤51：清洗硅衬底，利用磁控溅射方法在大小为2.5mm×2.5mm的硅衬底上先镀一层5nm的Cr膜，然后镀一层50nm的Au膜，其中的Cr膜作为粘附层提高Ag膜和石英表面之间的粘附性；相当于上述步骤S11～S12。
步骤52：在所镀的Au膜表面旋涂一层负性光刻胶Ma-N2401，光刻胶的厚度为100nm。涂完光刻胶的片子在热板上烘烤1分钟，热板温度为95℃；
步骤53：利用电子束光刻对所设计的SRR超表面图形进行曝光，曝光完成后进行显影，得到所设计的光刻胶纳米图形层；相当于上述步骤S13。
步骤54：利用离子束刻蚀设备采用本公开的间歇刻蚀法对显影后的光刻胶纳米图形层进行刻蚀。在刻蚀时，将刻蚀设备腔体真空度抽到6×10 -7Torr，然后启动射频功率用氩离子束刻蚀，刻蚀时的射频功率为244W，刻蚀时的腔体压强为1.8×10 -4Torr，用氩离子束刻蚀第一时长t 1＝15s，间歇第二时长t 2＝60s，刻蚀6个周期(N＝6)；相当于上述步骤S2～S4。
步骤55：利用氧等离子体去除Au纳米结构表面残留的光刻胶，然后再湿法清洗，得到Au SRR结构超表面器件；相当于上述步骤S5。
图9是采用本公开的间歇刻蚀法制备的开口共振环SRR超表面器件的扫描电镜照片。SRR共振环的劈裂缝隙宽度为36nm。
实施例6：
本实施例以在金膜上加工Bowtie形状纳米孔为例进行说明，实施步骤如下：
步骤61：清洗石英衬底，利用磁控溅射方法在大小为2.5mm×2.5mm的石英衬底上先镀一层5nm的Cr膜，然后镀一层50nm的Au膜；相当于上述步骤S11～S12。
步骤62：在所镀的Au膜表面旋涂一层电子束光刻胶PMMA，光刻胶的厚度为150nm。涂完光刻胶的片子在热板上烘烤1分钟，热板温度为150℃；
步骤63：利用电子束光刻对所设计的Bowtie图形进行曝光，曝光完成后进行显影，得到所设计的Bowtie光刻胶纳米图形层；相当于上述步骤S13。
步骤64：利用离子束刻蚀设备采用本公开的间歇刻蚀法对显影后的光刻胶纳米图形层进行刻蚀。在刻蚀时，将刻蚀设备腔体真空度抽到6×10 -7Torr，然后启动射频功率用氩离子束刻蚀，刻蚀时的射频功率为244W，刻蚀时的腔体压强为1.8×10 -4Torr，用氩离子束刻蚀第一时长t 1＝12s，间歇第二时长t 2＝80s，刻蚀6个周期(N＝6)；相当于上述步骤S2～S4。
步骤65：利用氧等离子体去除Au膜表面残留的电子束光刻胶，然 后再湿法清洗，得到金膜纳米孔结构；相当于上述步骤S5。
图10是采用本公开的间歇刻蚀法制备的金膜Bowtie纳米孔的扫描电镜照片，所加工的金膜Bowtie形状纳米孔的缝隙大小为35nm。
本公开将待刻蚀的金属膜层样品放置到离子束刻蚀设备内，利用氩离子束进行刻蚀；对该金属膜层实施多个周期的间歇刻蚀。各刻蚀周期包括：利用氩离子束刻蚀待加工样品第一时长；间歇第二时长。在间歇刻蚀的第二时长中，刻蚀设备腔体内刻蚀离子的纯度得到恢复，样品的温度得到降低，提高了刻蚀离子的准直性和能量保持性以及光刻胶的耐刻蚀性。
以上所述的具体实施例，对本公开的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本公开的具体实施例而已，并不用于限制本公开，凡在本公开的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (10)

  1. 一种使用离子束刻蚀加工金属纳米结构的方法，其特征在于，包括：
    S1，将待加工样品置于离子束刻蚀设备中，所述待加工样品自下而上依次包括衬底、金属膜层和光刻胶纳米图形层，所述光刻胶纳米图形层暴露出所述金属膜层的刻蚀区；
    S2，使用离子束刻蚀所述金属膜层的刻蚀区，所述刻蚀的时间为第一时长t 1；
    S3，间歇所述离子束刻蚀，所述间歇的时间为第二时长t 2；
    S4，重复所述S2～S3，直至刻蚀深度达到目标厚度；
    S5，去除所述光刻胶纳米图形层，得到目标金属纳米结构。
  2. 根据权利要求1所述的使用离子束刻蚀加工金属纳米结构的方法，其特征在于，所述S1还包括制备所述待加工样品，包括：
    S11，清洗所述衬底；
    S12，在所述衬底表面沉积一层金属得到所述金属膜层；
    S13，在所述金属膜层上涂覆光刻胶，曝光、显影得到所述光刻胶纳米图形层。
  3. 根据权利要求2所述的使用离子束刻蚀加工金属纳米结构的方法，其特征在于，所述S12之前还包括：
    在所述衬底表面沉积增粘层，以提高所述衬底与所述金属膜层之间的粘附性。
  4. 根据权利要求2所述的使用离子束刻蚀加工金属纳米结构的方法，其特征在于，所述S11中的衬底包括石英、硅片、蓝宝石中的一种；
    所述S12中的金属包括铬、金和银中的一种；
    所述S13中的光刻胶包括正性光刻胶或负性光刻胶。
  5. 根据权利要求1所述的使用离子束刻蚀加工金属纳米结构的方法，其特征在于，所述S2中第一时长t 1的范围为5s≤t 1≤250s；所述S3中第二时长t 2的范围为5s≤t 2≤250s；且t 2≥t 1。
  6. 根据权利要求1所述的使用离子束刻蚀加工金属纳米结构的方法， 其特征在于，所述S4中重复所述S2～S3的次数大于3。
  7. 根据权利要求1所述的使用离子束刻蚀加工金属纳米结构的方法，其特征在于，所述S5中去除所述光刻胶纳米图形层包括：
    S51，利用氧等离子体去除所述光刻胶纳米图形层；
    S52，湿法清洗所述待加工样品，得到目标金属纳米结构。
  8. 根据权利要求1所述的使用离子束刻蚀加工金属纳米结构的方法，其特征在于，所述S5中得到的目标金属纳米结构包括金属纳米圆孔、金属纳米方孔、金属纳米槽、金属纳米缝隙和金属纳米点阵中的一种；
    所述金属纳米结构的特征尺寸范围为5nm～100nm。
  9. 一种金属纳米结构，其特征在于，所述金属纳米结构为根据权利要求1～8中任意一项所述的使用离子束刻蚀加工金属纳米结构的方法加工得到。
  10. 一种根据权利要求1～8中任意一项所述的使用离子束刻蚀加工金属纳米结构的方法在紫外光刻铬掩模版加工、金属等离子纳米结构加工、金属纳米天线加工、超表面加工中的应用。
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CN104142530A (zh) * 2013-05-06 2014-11-12 中国科学院物理研究所 一种金属纳米叉指光栅的制备方法
CN104326440A (zh) * 2014-10-31 2015-02-04 中国科学院光电技术研究所 一种精确控制深度的微纳米结构的制作方法
CN111766222A (zh) * 2020-07-24 2020-10-13 江苏致微光电技术有限责任公司 一种基于柔性基底的lspr传感器及其制备方法和应用
CN115440585A (zh) * 2022-09-01 2022-12-06 中国科学院光电技术研究所 金属纳米结构及其离子束刻蚀加工方法

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