WO2024041303A1 - 电路板及电子设备 - Google Patents

电路板及电子设备 Download PDF

Info

Publication number
WO2024041303A1
WO2024041303A1 PCT/CN2023/109643 CN2023109643W WO2024041303A1 WO 2024041303 A1 WO2024041303 A1 WO 2024041303A1 CN 2023109643 W CN2023109643 W CN 2023109643W WO 2024041303 A1 WO2024041303 A1 WO 2024041303A1
Authority
WO
WIPO (PCT)
Prior art keywords
pad
circuit board
via hole
plane
component
Prior art date
Application number
PCT/CN2023/109643
Other languages
English (en)
French (fr)
Inventor
李忠信
Original Assignee
北京比特大陆科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 北京比特大陆科技有限公司 filed Critical 北京比特大陆科技有限公司
Publication of WO2024041303A1 publication Critical patent/WO2024041303A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits

Definitions

  • the present application relates to the field of electronic technology, and in particular to a circuit board and electronic equipment.
  • This application provides a circuit board and electronic equipment to solve the problem of molten solder easily flowing into via holes.
  • a first aspect of the present application provides a circuit board.
  • the circuit board includes a substrate.
  • the substrate includes a first plane and a second plane arranged oppositely.
  • a first pad portion is formed on the first plane.
  • a second pad portion is formed on the second plane, and the substrate is formed with at least one via hole penetrating the substrate at the position of the first pad portion;
  • the second pad portion at least includes an outer pad, the outer pad is located outside the at least one via hole, and a solder resist structure is provided between the outer pad and the at least one via hole, so The solder resist structure is used to separate the outer pad and the at least one via hole.
  • the first pad portion at least includes a first pad, the first pad is located outside the at least one via hole, and the first pad is used to install a first component.
  • the first pad part further includes a first via area pad, and the first pad is located outside the first via area pad.
  • the second pad part further includes a second via area pad, and the outer pad is located outside the second via area pad.
  • the solder mask structure includes solder mask ink.
  • the solder mask structure includes at least one solder mask area adjacent the at least one via hole.
  • the distance between the projection of the center of the first pad portion on the second plane and the center of the second pad portion is less than a first preset distance.
  • the distance between the center of the via area pad and the center of the second pad portion is less than the second preset distance.
  • the circuit board further includes a first component installed on the first pad part and/or a second component installed on the second pad part; the first component It includes at least one of a heat dissipation component, a structural component, and a chip, and the second component includes at least one of a heat dissipation component, a structural component, and a chip.
  • the first component is a chip
  • the second component is a heat dissipation component
  • a second aspect of the present application provides an electronic device.
  • the electronic device includes the circuit board according to the first aspect of the present application.
  • the circuit board includes a substrate, the substrate includes a first plane and a second plane arranged oppositely, a first pad portion is formed on the first plane, and the third plane A second pad portion is formed on two planes, and the substrate is formed with at least one via hole penetrating the substrate at the position of the first pad portion; the second pad portion at least includes an outer pad, The outer pad is located outside the at least one via hole, and a solder resist structure is provided between the outer pad and the at least one via hole. The solder resist structure is used to separate the outer pad and the at least one via hole. the at least one via hole. Due to the solder mask structure Separating the outer pad and the via hole prevents the solder from the outer pad from flowing into the via hole, avoids affecting the components on the first pad part, and improves the quality of the circuit board.
  • Figure 1 is a schematic structural diagram of a circuit board provided by an embodiment of the present application.
  • Figure 2 is a schematic structural diagram of the second plane of a circuit board provided by an embodiment of the present application.
  • Figure 3 is a partially enlarged schematic view of the second pad portion in Figure 2;
  • Figure 4 is a schematic structural diagram of a first plane of a circuit board provided by an embodiment of the present application.
  • Figure 5 is a partial enlarged schematic view of the first pad portion in Figure 4.
  • FIG. 6 is a schematic structural diagram of the second plane of a circuit board provided by an embodiment of the present application. 10. Circuit board; 100. Substrate; 101. Outer pad; 102. Via hole; 103. Solder resist structure; 104. Second via area pad; 105. First soldering pad; 106. First via area pad.
  • FIG. 1 is a schematic structural diagram of a circuit board provided by an embodiment of the present application.
  • components are mounted on both the first plane and the second plane of the circuit board substrate 100.
  • the first plane located above the substrate is mounted with a chip
  • the second plane located below the substrate is mounted with a heat sink.
  • a via hole 102 is formed through the substrate 100 so that the heat generated by the chip can be directed to the heat sink through the via hole 102 for heat dissipation.
  • molten solder usually flows into the via hole 102 and blocks the via hole 102, affecting the installation of the components on the other plane or the other side. run. For example, if the heat sink on the second plane is soldered first, excess molten solder flows into the first plane through the via hole 102, which may cause the chip on the first plane to fail to be soldered, or the chip to have poor heat dissipation after soldering, resulting in poor circuit board quality.
  • Figure 2 is a schematic structural diagram of the second plane of a circuit board provided by an embodiment of the present application.
  • Figure 3 is a partially enlarged schematic diagram of the second pad portion in Figure 2.
  • Figure 4 is a schematic diagram of the second plane of the circuit board of the present application.
  • An embodiment provides a schematic structural diagram of a first plane of a circuit board.
  • FIG. 5 is a partially enlarged schematic diagram of the first pad portion in FIG. 4 .
  • the circuit board includes a substrate, the substrate includes a first plane and a second plane arranged oppositely, a first pad portion is formed on the first plane, and a first pad portion is formed on the second plane. a second pad portion, and the substrate is formed with at least one via hole penetrating the substrate at the position of the first pad portion; the second pad portion at least includes an outer pad, and the outer pad Located outside the at least one via hole, a solder resist structure is provided between the outer pad and the at least one via hole. The solder resist structure is used to separate the outer pad and the at least one via hole. hole.
  • solder resist structure 103 separates the outer pad 101 and at least one via hole 102
  • the inside of the solder resist structure 103 is at least one via hole 102
  • the outside of the solder resist structure 103 is The outside of at least one via hole 102 is an outer pad 103, so that the components installed on the second pad part can cover at least one via hole 102.
  • the heat sink installed on the second pad part can cover the above the vias so that the heat sink can The heat generated by the components on the first plane is conducted.
  • a first pad portion and a second pad portion for mounting components are respectively formed, and the substrate 100 is also formed with at least one via hole 102 penetrating the substrate 100. .
  • the heat generated by the components on the first plane can be directed to the second plane.
  • the second plane can be directed to the second plane.
  • the solder resist structure 103 can prevent the solder of the outer pad 101 from flowing into at least one via hole 102 in a molten state, preventing the solder from clogging the via hole or even causing the solder to condense on another plane, thereby improving the quality of the circuit board.
  • the second pad part further includes a second via area pad, and the outer pad is located outside the second via area pad.
  • the outer pad 101 is located outside the second via hole area pad 104.
  • the solder resist structure 103 separates at least one via hole 102 from the outer pad 101, and also separates the outer pad 101 from the outer pad 101.
  • the second via hole area pad 104 prevents the solder of the outer pad 101 from adhering to the solder of the second via hole area pad 104, and excessive solder enters at least one via hole 102, affecting the quality of the circuit board.
  • the solder mask structure includes solder mask ink.
  • solder resist structure 103 can also be made of other materials that prevent solder from adhering, which is not limited here.
  • the solder of the outer pad 101 can be separated from the solder of the via pad 104 to avoid excess solder from entering the via 102 due to adhesion of a large amount of solder.
  • the first pad portion at least includes a first pad, the first pad is located outside the at least one via hole, and the first pad is used to install a first component.
  • the first pad portion on the first plane of the circuit board 10 further includes a first pad 105 , through which the components of the first pad portion are mounted.
  • the projection of the first pad 105 on the second plane is located in the outer pad 101, so that the components of the first pad part can cooperate with the components of the second pad part.
  • the heat generated by the components of the first pad part is dissipated through the heat sink of the second pad part.
  • it is not limited to this and is not limited here.
  • the first pad part further includes a first via area pad, and the first pad is located outside the first via area pad.
  • At least one via hole 102 is provided with a first via hole area pad 106 in the area where the first plane is located, so as to install the components on the first plane, so that the components on the first pad part are It can fully contact the components of the second pad part through the via hole 102.
  • the chip of the first pad part conducts heat to the heat sink of the second pad part through the via hole 102.
  • it is not limited to this.
  • FIG. 6 is a schematic structural diagram of a second plane of a circuit board provided by an embodiment of the present application.
  • the solder mask structure includes at least one solder mask area adjacent the at least one via hole.
  • solder resist structure 103 may be a connected structure as shown in FIG. 2 , or a structure including multiple solder resist areas as shown in FIG. 6 , or other structures, which are not limited here.
  • the solder resist structure 103 can be selected according to actual needs, for example, according to the manufacturing process of the solder resist structure 103.
  • the manufacturing process of the solder resist structure 103 includes but is not limited to at least one of screen printing, electrostatic spraying, and printing.
  • the solder adding method includes but is not limited to at least one of printing, manual coating, injection, and printing.
  • the circuit board further includes a first component installed on the first pad part and/or a second component installed on the second pad part; the first component It includes at least one of a heat dissipation component, a structural component, and a chip, and the second component includes at least one of a heat dissipation component, a structural component, and a chip.
  • the installation method of the first component and/or the second component includes but is not limited to at least one of reflow soldering, wave soldering, and laser welding.
  • the first component is a chip
  • the second component is a heat dissipation component
  • the first component is a chip
  • the second component is a heat dissipation component
  • the heat generated by the chip on the first plane is directed to the heat dissipation component on the second plane through at least one via hole 102, Ensure the stable operation of the chip.
  • the packaging form of the chip includes but is not limited to Quad Flat No-lead Package (QFN), Small Out-Line Package (SOP), Quad Flat Package (Quad At least one of Flat Package (QFP) and Ball Grid Array Package (BGA).
  • QFN Quad Flat No-lead Package
  • SOP Small Out-Line Package
  • QFP Quad Flat Package
  • BGA Ball Grid Array Package
  • the distance between the projection of the center of the first pad portion on the second plane and the center of the second pad portion is less than a first preset distance.
  • the first pad part and the second pad part are located at corresponding positions on different planes of the substrate, so that the first component installed on the first pad part is in contact with the second pad part.
  • the second components installed on the pad part work better together.
  • the heat dissipation component of the second pad part can more evenly direct the heat generated by the chip in the first pad part to the surroundings, improving heat dissipation efficiency.
  • the projection of the center of the first pad portion on the second plane is located at the same position as the center of the second pad portion.
  • a distance between a center of the via area pad and the second pad portion is less than a second preset distance.
  • the center of the via area pad is located at a corresponding position in the second pad part, so that the first component installed on the first pad part is in contact with the second pad part.
  • the installed second components work better together.
  • the heat dissipation component installed on the second pad portion can evenly guide the heat conducted through the via holes to the surroundings, thereby improving the heat dissipation efficiency.
  • the center of the via area pad and the center of the second pad part are located at the same position.
  • the present application also provides an electronic device, which includes: the circuit board as described above.
  • the electronic device may include one or more circuit boards as described above, which is not limited herein.
  • the electronic device may be a supercomputing device, but of course it is not limited to this. In This is not limited.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

一种电路板及电子设备，解决熔融焊料容易流入过孔（102）的问题。电路板包括基板（100），基板（100）包括相对设置的第一平面和第二平面，第一平面上形成有第一焊盘部，第二平面上形成有第二焊盘部，且基板（100）在第一焊盘部的位置形成有贯穿基板（100）的至少一个过孔（102）；第二焊盘部至少包括外侧焊盘（101），外侧焊盘（101）位于至少一个过孔（102）的外侧，且外侧焊盘（101）与至少一个过孔（102）之间设有阻焊结构（103），阻焊结构（103）用于分隔外侧焊盘（101）和至少一个过孔（102）。由于阻焊结构（103）分隔了外侧焊盘（101）和过孔（102），避免了外侧焊盘（101）的焊料流入过孔（102），避免对第一焊盘部的元器件造成影响，提高了电路板品质。

Description

电路板及电子设备
本申请要求于2022年08月22日提交中国专利局、申请号为202222211973.2，发明名称为“电路板及电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子技术领域，尤其涉及一种电路板及电子设备。
背景技术
在电路板的不同表面均需要设置元器件的情况下，通常先完成其中一个表面的元器件焊接，再进行另一个表面的元器件焊接。然而，发明人发现，在进行其中一个表面的元器件焊接时，容易出现熔融的焊料流入电路板表面的过孔，影响另一个表面元器件焊接和运作的情况，亟需一种能够避免熔融焊料流入过孔的电路板。
申请内容
本申请提供了一种电路板及电子设备，用于解决熔融焊料容易流入过孔的问题。
本申请第一方面提供了一种电路板，所述电路板包括基板，所述基板包括相对设置的第一平面和第二平面，所述第一平面上形成有第一焊盘部，所述第二平面上形成有第二焊盘部，且所述基板在所述第一焊盘部的位置形成有贯穿所述基板的至少一个过孔；
所述第二焊盘部至少包括外侧焊盘，所述外侧焊盘位于所述至少一个过孔的外侧，且所述外侧焊盘与所述至少一个过孔之间设有阻焊结构，所述阻焊结构用于分隔所述外侧焊盘和所述至少一个过孔。
在一些实施方式中，所述第一焊盘部至少包括第一焊盘，所述第一焊盘位于所述至少一个过孔的外侧，所述第一焊盘用于安装第一元器件。
在一些实施方式中，所述第一焊盘部还包括第一过孔区焊盘，所述第一焊盘位于所述第一过孔区焊盘的外侧。
在一些实施方式中，所述第二焊盘部还包括第二过孔区焊盘，所述外侧焊盘位于所述第二过孔区焊盘的外侧。
在一些实施方式中，所述阻焊结构包括阻焊油墨。
在一些实施方式中，所述阻焊结构包括至少一个阻焊区域，所述阻焊区域邻近所述至少一个过孔。
在一些实施方式中，所述第一焊盘部的中心在所述第二平面上的投影，与所述第二焊盘部的中心的距离小于第一预设距离。
在一些实施方式中，所述过孔区焊盘的中心与所述第二焊盘部的中心的距离小于第二预设距离。
在一些实施方式中，所述电路板还包括安装于所述第一焊盘部的第一元器件和/或安装于所述第二焊盘部的第二元器件；所述第一元器件包括散热元器件、结构元器件、芯片中的至少一者，所述第二元器件包括散热元器件、结构元器件、芯片中的至少一者。
在一些实施方式中，所述第一元器件为芯片，所述第二元器件为散热元器件。
本申请第二方面提供了一种电子设备，所述电子设备包括，根据本申请第一方面所述的电路板。
本申请实施例提供的电路板及电子设备，其中电路板包括基板，所述基板包括相对设置的第一平面和第二平面，所述第一平面上形成有第一焊盘部，所述第二平面上形成有第二焊盘部，且所述基板在所述第一焊盘部的位置形成有贯穿所述基板的至少一个过孔；所述第二焊盘部至少包括外侧焊盘，所述外侧焊盘位于所述至少一个过孔的外侧，且所述外侧焊盘与所述至少一个过孔之间设有阻焊结构，所述阻焊结构用于分隔所述外侧焊盘和所述至少一个过孔。由于阻焊结构分 隔了外侧焊盘和过孔，避免了外侧焊盘的焊料流入过孔，避免对第一焊盘部的元器件造成影响，提高了电路板品质。
附图说明
为了更清楚地说明本申请实施例技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请一实施例提供的电路板的结构示意图；
图2是本申请一实施例提供的一种电路板第二平面的结构示意图；
图3是图2中第二焊盘部的局部放大示意图；
图4是本申请一实施例提供的一种电路板第一平面的结构示意图；
图5是图4中第一焊盘部的局部放大示意图；
图6是本申请一实施例提供的一种电路板第二平面的结构示意图。
10、电路板；100、基板；101、外侧焊盘；102、过孔；103、阻
焊结构；104、第二过孔区焊盘；105、第一焊盘；106、第一过孔区焊盘。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
附图中所示的流程图仅是示例说明，不是必须包括所有的内容和操作/步骤，也不是必须按所描述的顺序执行。例如，有的操作/步骤还可以分解、组合或部分合并，因此实际执行的顺序有可能根据实际 情况改变。
下面结合附图，对本申请的一些实施方式作详细说明。在不冲突的情况下，下述的实施例及实施例中的特征可以相互组合。
请参照图1，图1是本申请一实施例提供的电路板的结构示意图。
如图1所示，电路板基板100的第一平面和第二平面均安装有元器件，例如图1中位于基板上方的第一平面安装有芯片，位于基板下方的第二平面安装有散热片，并且形成有贯穿基板100的过孔102，以便使芯片产生的热量能够通过过孔102导向散热片进行散热。
然而，现有技术中的电路板在安装第一平面或第二平面的元器件时，通常会有熔融焊料流入过孔102，对过孔102造成堵塞，影响另一个平面的元器件的安装或运行。举例而言，首先焊接第二平面的散热片，多余的熔融焊料通过过孔102流入第一平面，可能导致第一平面的芯片无法焊接，或者芯片焊接后散热不良，导致电路板品质不佳。
请参见图2-图5，图2是本申请一实施例提供的一种电路板第二平面的结构示意图，图3是图2中第二焊盘部的局部放大示意图，图4是本申请一实施例提供的一种电路板第一平面的结构示意图，图5是图4中第一焊盘部的局部放大示意图。
在一些实施方式中，所述电路板包括基板，所述基板包括相对设置的第一平面和第二平面，所述第一平面上形成有第一焊盘部，所述第二平面上形成有第二焊盘部，且所述基板在所述第一焊盘部的位置形成有贯穿所述基板的至少一个过孔；所述第二焊盘部至少包括外侧焊盘，所述外侧焊盘位于所述至少一个过孔的外侧，且所述外侧焊盘与所述至少一个过孔之间设有阻焊结构，所述阻焊结构用于分隔所述外侧焊盘和所述至少一个过孔。
可以理解的，如图2所示，由于阻焊结构103分隔了所述外侧焊盘101和至少一个过孔102，阻焊结构103的内侧为至少一个过孔102，阻焊结构103的外侧即至少一个过孔102的外侧为外侧焊盘103，使得安装在所述第二焊盘部的元器件能够覆盖至少一个过孔102，例如安装在所述第二焊盘部的散热片能够覆盖于过孔之上，以便散热片对 所述第一平面上的元器件产生的热量进行传导。
示例性的，在基板100的第一平面和第二平面，分别形成有用于安装元器件的第一焊盘部和第二焊盘部，基板100还形成有贯穿基板100的至少一个过孔102。
示例性的，通过至少一个过孔102，能够将所述第一平面上的元器件产生的热量导向所述第二平面，当然也不限于此，在此不做限定。
示例性的，通过阻焊结构103能够防止外侧焊盘101的焊料在熔融状态下流入至少一个过孔102，避免焊料造成过孔堵塞甚至造成焊料在另一平面凝结，提高了电路板的品质。
在一些实施方式中，所述第二焊盘部还包括第二过孔区焊盘，所述外侧焊盘位于所述第二过孔区焊盘的外侧。
如图2、3所示，外侧焊盘101位于第二过孔区焊盘104的外侧，阻焊结构103分隔至少一个过孔102与外侧焊盘101的同时，也分隔了外侧焊盘101与第二过孔区焊盘104，防止外侧焊盘101的焊料与第二过孔区焊盘104的焊料黏连，过多的焊料进入至少一个过孔102，影响电路板的品质。
在一些实施方式中，所述阻焊结构包括阻焊油墨。
示例性的，阻焊结构103也可以是其他使焊料无法附着的材料，在此不做限定。
示例性的，由于阻焊结构103无法附着焊料，外侧焊盘101的焊料能够与过孔区焊盘104的焊料分隔开，避免大量焊料黏连导致多余的焊料进入过孔102。
在一些实施方式中，所述第一焊盘部至少包括第一焊盘，所述第一焊盘位于所述至少一个过孔的外侧，所述第一焊盘用于安装第一元器件。
如图4、5所示，电路板10第一平面的第一焊盘部还包括第一焊盘105，通过第一焊盘105安装所述第一焊盘部的元器件。
示例性的，第一焊盘105的位置在第二平面的投影位于外侧焊盘101中，以便第一焊盘部的元器件能够与第二焊盘部的元器件协同工 作，例如通过第二焊盘部的散热片对第一焊盘部的元器件产生的热量进行散热，当然也不限于此，在此不做限定。
在一些实施方式中，所述第一焊盘部还包括第一过孔区焊盘，所述第一焊盘位于所述第一过孔区焊盘的外侧。
示例性的，至少一个过孔102在第一平面所在的区域设置有第一过孔区焊盘106，以便安装所述第一平面的元器件，以使所述第一焊盘部的元器件能够与所述第二焊盘部的元器件通过过孔102充分接触，例如第一焊盘部的芯片通过过孔102将热量传导至第二焊盘部的散热片，当然也不限于此。
请参照图6，图6是本申请一实施例提供的一种电路板第二平面的结构示意图。
在一些实施方式中，所述阻焊结构包括至少一个阻焊区域，所述阻焊区域邻近所述至少一个过孔。
示例性的，阻焊结构103可以是图2所示的连通的结构，也可以是图6所示的包括多个阻焊区域的结构，还可以是其他结构，在此不做限定。
示例性的，阻焊结构103可以根据实际需求选择，例如根据阻焊结构103的制作工艺选择，具体地，阻焊结构103的制作工艺包括但不限于丝网印刷、静电喷涂、打印中的至少一者；也可以根据焊料添加方式选择，具体地，焊料添加方式包括但不限于印刷、手工涂布、注射、打印中的至少一者。
在一些实施方式中，所述电路板还包括安装于所述第一焊盘部的第一元器件和/或安装于所述第二焊盘部的第二元器件；所述第一元器件包括散热元器件、结构元器件、芯片中的至少一者，所述第二元器件包括散热元器件、结构元器件、芯片中的至少一者。
示例性的，所述第一元器件和/或所述第二元器件的安装方式包括但不限于回流焊、波峰焊、激光焊中的至少一者。
在一些实施方式中，所述第一元器件为芯片，所述第二元器件为散热元器件。
示例性的，所述第一元器件为芯片，所述第二元器件为散热元器件，通过至少一个过孔102将第一平面上的芯片产生的热量导向第二平面上的散热元器件，保证芯片的稳定运行。
示例性的，所述芯片的封装形式包括但不限于方形扁平无引脚封装(Quad Flat No-leadPackage，QFN)、小外形封装(Small Out-Line Package，SOP)、方型扁平式封装(Quad Flat Package，QFP)、球栅阵列封装(Ball Grid Array Package，BGA)中的至少一者。
在一些实施方式中，所述第一焊盘部的中心在所述第二平面上的投影，与所述第二焊盘部的中心的距离小于第一预设距离。
示例性的，所述第一焊盘部和所述第二焊盘部位于所述基板不同平面的对应位置，以便所述第一焊盘部上安装的第一元器件与所述第二焊盘部上安装的第二元器件更好地协同工作，例如第二焊盘部的散热元器件能够更均匀地将第一焊盘部的芯片产生的热量导向四周，提高散热效率。
示例性的，所述第一焊盘部的中心在所述第二平面上的投影，与所述第二焊盘部的中心位于同一位置。
在一些实施方式中，所述过孔区焊盘的中心与所述第二焊盘部的距离中心小于第二预设距离。
示例性的，所述过孔区焊盘的中心位于所述第二焊盘部中的对应位置，以便所述第一焊盘部上安装的第一元器件与所述第二焊盘部上安装的第二元器件更好地协同工作，例如安装于所述第二焊盘部的散热元器件能够将通过过孔传导的热量均匀地导向四周，提高散热效率。
示例性的，所述过孔区焊盘的中心与所述第二焊盘部的中心位于同一位置。
在一些实施方式中，本申请还提供一种电子设备，所述电子设备包括：如上所述的电路板。
示例性的，所述电子设备可以包括一个或多个如上所述的电路板，在此不做限定。
示例性的，所述电子设备可以是超算设备，当然也不限于此，在 此不做限定。
需要说明的是，在本申请中涉及“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。
应当理解，在此本申请中所使用的术语仅仅是出于描述特定实施例的目的而并不意在限制本申请。
还应当理解，在本申请和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合，并且包括这些组合。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到各种等效的修改或替换，这些修改或替换都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (11)

  1. 一种电路板，其中，所述电路板包括基板，所述基板包括相对设置的第一平面和第二平面，所述第一平面上形成有第一焊盘部，所述第二平面上形成有第二焊盘部，且所述基板在所述第一焊盘部的位置形成有贯穿所述基板的至少一个过孔；
    所述第二焊盘部至少包括外侧焊盘，所述外侧焊盘位于所述至少一个过孔的外侧，且所述外侧焊盘与所述至少一个过孔之间设有阻焊结构，所述阻焊结构用于分隔所述外侧焊盘和所述至少一个过孔。
  2. 根据权利要求1所述的电路板，其中，所述第一焊盘部至少包括第一焊盘，所述第一焊盘位于所述至少一个过孔的外侧，所述第一焊盘用于安装第一元器件。
  3. 根据权利要求2所述的电路板，其中，所述第一焊盘部还包括第一过孔区焊盘，所述第一焊盘位于所述第一过孔区焊盘的外侧。
  4. 根据权利要求1所述的电路板，其中，所述第二焊盘部还包括第二过孔区焊盘，所述外侧焊盘位于所述第二过孔区焊盘的外侧。
  5. 根据权利要求1-4任一项所述的电路板，其中，所述阻焊结构包括阻焊油墨。
  6. 根据权利要求1-4任一项所述的电路板，其中，所述阻焊结构包括至少一个阻焊区域，所述阻焊区域邻近所述至少一个过孔。
  7. 根据权利要求1-4任一项所述的电路板，其中，所述第一焊盘部的中心在所述第二平面上的投影，与所述第二焊盘部的中心的距离小于第一预设距离。
  8. 根据权利要求4所述的电路板，其中，所述过孔区焊盘的中心与所述第二焊盘部的中心的距离小于第二预设距离。
  9. 根据权利要求1所述的电路板，其中，所述电路板还包括安装于所述第一焊盘部的第一元器件和/或安装于所述第二焊盘部的第二元器件；所述第一元器件包括散热元器件、结构元器件、芯片中的至少一者，所述第二元器件包括散热元器件、结构元器件、芯片中的至少一者。
  10. 根据权利要求9所述的电路板，其中，所述第一元器件为芯片，所述第二元器件为散热元器件。
  11. 一种电子设备，其中，所述电子设备包括，根据权利要求1-10任一项所述的电路板。
PCT/CN2023/109643 2022-08-22 2023-07-27 电路板及电子设备 WO2024041303A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202222211973.2 2022-08-22
CN202222211973.2U CN218514579U (zh) 2022-08-22 2022-08-22 电路板及电子设备

Publications (1)

Publication Number Publication Date
WO2024041303A1 true WO2024041303A1 (zh) 2024-02-29

Family

ID=85209726

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2023/109643 WO2024041303A1 (zh) 2022-08-22 2023-07-27 电路板及电子设备

Country Status (2)

Country Link
CN (1) CN218514579U (zh)
WO (1) WO2024041303A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN218514579U (zh) * 2022-08-22 2023-02-21 北京比特大陆科技有限公司 电路板及电子设备

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020050380A1 (en) * 2000-06-30 2002-05-02 International Business Machines Corporation Electronic package with plurality of solder-applied areas providing heat transfer
US20080186682A1 (en) * 2006-09-20 2008-08-07 Sumitomo Wiring Systems, Ltd. Method for producing a printed circuit board with a heat radiating structure and a printed circuit board with a heat radiating structure
CN210444551U (zh) * 2019-03-28 2020-05-01 观致汽车有限公司 一种散热焊盘及具有散热焊盘的印刷电路板
CN211481596U (zh) * 2020-02-13 2020-09-11 东莞市金锐显数码科技有限公司 接地焊盘及芯片
CN212628599U (zh) * 2020-08-26 2021-02-26 维沃移动通信有限公司 电路板以及电子设备
CN215581857U (zh) * 2021-05-24 2022-01-18 深圳市一博科技股份有限公司 一种提高电子元器件散热效率的pcb结构
CN218514579U (zh) * 2022-08-22 2023-02-21 北京比特大陆科技有限公司 电路板及电子设备

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020050380A1 (en) * 2000-06-30 2002-05-02 International Business Machines Corporation Electronic package with plurality of solder-applied areas providing heat transfer
US20080186682A1 (en) * 2006-09-20 2008-08-07 Sumitomo Wiring Systems, Ltd. Method for producing a printed circuit board with a heat radiating structure and a printed circuit board with a heat radiating structure
CN210444551U (zh) * 2019-03-28 2020-05-01 观致汽车有限公司 一种散热焊盘及具有散热焊盘的印刷电路板
CN211481596U (zh) * 2020-02-13 2020-09-11 东莞市金锐显数码科技有限公司 接地焊盘及芯片
CN212628599U (zh) * 2020-08-26 2021-02-26 维沃移动通信有限公司 电路板以及电子设备
CN215581857U (zh) * 2021-05-24 2022-01-18 深圳市一博科技股份有限公司 一种提高电子元器件散热效率的pcb结构
CN218514579U (zh) * 2022-08-22 2023-02-21 北京比特大陆科技有限公司 电路板及电子设备

Also Published As

Publication number Publication date
CN218514579U (zh) 2023-02-21

Similar Documents

Publication Publication Date Title
US20070176300A1 (en) Wiring board and semiconductor apparatus
WO2024041303A1 (zh) 电路板及电子设备
US20020050380A1 (en) Electronic package with plurality of solder-applied areas providing heat transfer
JP2005322915A (ja) 構成要素の表面実装アタッチメント
TWI455656B (zh) 印刷電路板以及電子設備
TWI446844B (zh) 印刷電路板及印刷電路板之製造方法
KR20200107200A (ko) 전자 소자 모듈 및 그 제조 방법
US6750084B2 (en) Method of mounting a leadless package and structure therefor
US20120119358A1 (en) Semicondiuctor package substrate and method for manufacturing the same
KR20030001963A (ko) 볼 그리드 어레이 패키지의 실장방법
CN104779236B (zh) 用于ic封装基板的倒装芯片焊盘几何结构
JP2012227349A (ja) 電子部品の実装方法
JPH07288375A (ja) 回路基板
JP2007227484A (ja) プリント配線板構造
JPH10335800A (ja) 半田バンプの形成方法
JP7472478B2 (ja) プリント配線板
JP2001237338A (ja) フリップチップボールグリッドアレイ基板及びその製造法
JPH11307678A (ja) インターポーザ
US20040078966A1 (en) Method of mounting electronic parts on wiring board
JPH0414892A (ja) プリント配線基板のハンダレジスト開口部の構造
JPH09139567A (ja) プリント基板における表面実装部品搭載パッドと層間接続用スルーホールの接続構造
JP2023124189A (ja) プリント配線板
JP2006005158A (ja) 回路基板の製造方法
JP2023022607A (ja) 回路基板構造及び回路基板の製造方法
JP4104700B2 (ja) 多層プリント配線板

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23856393

Country of ref document: EP

Kind code of ref document: A1