WO2024040751A1 - 显示面板及其制备方法、显示装置 - Google Patents

显示面板及其制备方法、显示装置 Download PDF

Info

Publication number
WO2024040751A1
WO2024040751A1 PCT/CN2022/130677 CN2022130677W WO2024040751A1 WO 2024040751 A1 WO2024040751 A1 WO 2024040751A1 CN 2022130677 W CN2022130677 W CN 2022130677W WO 2024040751 A1 WO2024040751 A1 WO 2024040751A1
Authority
WO
WIPO (PCT)
Prior art keywords
insulating layer
groove
layer
backlight module
away
Prior art date
Application number
PCT/CN2022/130677
Other languages
English (en)
French (fr)
Inventor
艾飞
宋德伟
罗成志
Original Assignee
武汉华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电技术有限公司 filed Critical 武汉华星光电技术有限公司
Priority to US17/925,028 priority Critical patent/US20240069381A1/en
Publication of WO2024040751A1 publication Critical patent/WO2024040751A1/zh

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133526—Lenses, e.g. microlenses or Fresnel lenses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement

Definitions

  • the present invention relates to the field of display equipment, in particular to a display panel, a preparation method thereof, and a display device.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display, thin film transistor liquid crystal display
  • development projects for low power consumption, high brightness, and improved light utilization are being promoted.
  • increasing the light transmittance can improve the brightness of TFT-LCD and reduce power loss, which is a difficulty that every panel manufacturer around the world is trying to overcome.
  • the light transmittance of a TFT-LCD panel refers to the ratio of the light intensity before and after the backlight passes through the TFT-LCD panel. Normally, the light transmittance of TFT-LCD is only 3-10%, which means that more than 90% of the light cannot be utilized.
  • the multi-layer film structure composed of insulating materials, organic materials, transparent conductive materials and other materials has a greater impact on the light efficiency.
  • the multi-layer films in conventional Array substrates are all planar structures and have no converging effect on light.
  • the light emitted from the backlight module is relatively divergent, and part of the light will enter the non-opening area from the opening area, causing light loss and waste, and reducing the utilization rate of light.
  • the purpose of the present invention is to provide a display panel, a preparation method thereof, and a display device to solve the problems in the prior art that the array substrate has no light converging effect and the display panel has low light utilization efficiency.
  • the present invention provides a display panel, which includes a backlight module and an array substrate.
  • the backlight module has a light-emitting surface.
  • the array substrate is disposed on the light exit surface of the backlight module and has a plurality of non-opening areas and opening areas connecting the non-opening areas.
  • the array substrate includes an insulating structure located in the opening area.
  • a first groove is provided on a side of the insulating structure away from the backlight module.
  • the first groove is filled with a first insulating layer and a second insulating layer.
  • the second insulating layer is located on the first The insulating layer is close to one side of the backlight module, and the refractive index of the second insulating layer is smaller than the refractive index of the first insulating layer.
  • the insulation structure includes a substrate layer and a third insulation layer, and the third insulation layer is provided on a side of the substrate layer away from the backlight module.
  • the first groove is provided on a surface of the substrate layer or the third insulating layer away from the backlight module.
  • the second insulating layer is disposed in the first groove, and the refractive index of the substrate layer and the third insulating layer are both smaller than the refractive index of the second insulating layer.
  • the second insulating layer has a second groove on a surface away from the backlight module, and the first insulating layer fills the second groove.
  • the material of the third insulating layer contains at least one of organic materials or inorganic materials.
  • the materials of the first insulating layer and the second insulating layer include inorganic materials.
  • the inorganic material includes silicon oxide, silicon oxynitride and silicon nitride.
  • the closer the film layer is to the backlight module the greater the proportion of oxygen atoms in its material.
  • the farther the film layer is from the backlight module the greater the proportion of nitrogen atoms in its material.
  • the first groove is in the shape of a platform, and has a first included angle between its side wall and its bottom surface, and the first included angle ranges from 95° to 135°.
  • the second groove is cone-shaped or frustum-shaped
  • the second groove is at least one of a cone shape, a frustum shape, or a spherical crown shape, and the central axis of the second groove coincides with the central axis of the first groove.
  • the depth of the first groove is 0.2-2 microns.
  • the depth of the second groove is less than or equal to the depth of the first groove, and the depth difference between the first groove and the second groove is less than or equal to 0.5 microns.
  • the first insulation layer includes a main body part and a covering part.
  • the main body portion fills the second groove, and the shape of the main body portion matches the shape of the second groove.
  • the covering portion is provided on a side of the main body portion away from the backlight module, and covers a surface of the substrate layer or the third insulating layer away from the backlight module.
  • the array substrate further includes a thin film transistor, the thin film transistor is located in the non-opening area, and the orthographic projection of the thin film transistor on the substrate layer is consistent with the first groove on the substrate layer.
  • the orthographic projections on do not coincide.
  • the invention also provides a method for preparing a display panel, which method includes the following steps:
  • Preparing an array substrate includes the following steps: providing an insulating structure and defining a non-opening area and an opening area on the insulating structure, wherein the insulating structure includes a first insulating layer and a second insulating layer; A first groove is formed on a side of the structure away from the backlight module, and the first groove is located in the opening area; a second insulating layer and a first insulating layer are sequentially formed in the first groove.
  • the refractive index of the second insulating layer is smaller than the refractive index of the first insulating layer.
  • the present invention also provides a display device, which includes the display panel as described above.
  • a display panel and a preparation method thereof in the present invention form a nested insulating structure in three adjacent film layers in the opening area of the array substrate, and in the nested insulating structure
  • a double lens structure is formed in the lens, which not only achieves total reflection of light, but also can refract light, reflect the light obliquely into the non-opening area back into the opening area, and gather the divergent backlight light in the opening area. , thereby reducing the loss rate of light in the array substrate and improving the display brightness of the display panel.
  • Figure 1 is a schematic diagram of the layered structure of the display panel in Embodiment 1 of the present invention.
  • Figure 2 is a schematic diagram of the layered structure of the array substrate in Embodiment 1 of the present invention.
  • Figure 3 is a layered schematic diagram of a cone-shaped second groove in other embodiments of the present invention.
  • Figure 4 is a layered schematic diagram of the platform-shaped second groove in other embodiments of the present invention.
  • Figure 5 is a schematic flow chart of a display panel preparation method in Embodiment 1 of the present invention.
  • Figure 6 is a schematic diagram of the layered structure of the array substrate after forming the first groove in Embodiment 1 of the present invention.
  • Figure 7 is a schematic diagram of the layered structure of the array substrate after leveling the surface of the second insulating layer through photoresist in Embodiment 1 of the present invention
  • Figure 8 is a schematic diagram of the layered structure of the array substrate after removing the second insulating layer other than the first groove in Embodiment 1 of the present invention.
  • Figure 9 is a schematic diagram of the layered structure of the array substrate after forming the second groove in Embodiment 1 of the present invention.
  • Figure 10 is a schematic diagram of the layered structure of the array substrate after leveling the surface of the first insulating layer through photoresist in Embodiment 1 of the present invention
  • Figure 11 is a schematic diagram of the layered structure of the array substrate after the surface of the first insulating layer is planarized in Embodiment 1 of the present invention
  • Figure 12 is a schematic diagram of the layered structure of the array substrate in Embodiment 2 of the present invention.
  • Figure 13 is a schematic diagram of the layered structure of the array substrate in Embodiment 3 of the present invention.
  • Display panel 1 backlight module 10;
  • Color filter substrate 40 opening area 20A;
  • first groove 222 second insulation layer 223;
  • first insulation layer 225 second groove 224; first insulation layer 225;
  • first buffer layer 241 second buffer layer 24;
  • Pixel electrode layer 29 photoresist 51, 52.
  • inventive embodiments refer to the accompanying drawings to illustrate specific inventive embodiments in which the invention may be implemented.
  • the directional terms mentioned in the present invention such as “up”, “down”, “front”, “back”, “left”, “right”, “inside”, “outside”, “side”, etc., are only Reference is made to the direction of the attached drawings. Therefore, the directional terms used are for the purpose of better and clearer description and understanding of the present invention, but do not indicate or imply that the device or component referred to must have a specific orientation, be in a specific orientation. construction and operation, and therefore should not be construed as limitations of the invention. Furthermore, the terms “first,” “second,” “third,” etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
  • an element When an element is referred to as being “on” another element, it can be directly positioned on the other element; intervening elements may also be present, and the element may be positioned directly on the other element. And the middle part is placed on another part.
  • one element When one element is described as being “mounted on” or “connected to” another element, it can either be directly “mounted on” or “connected to”, or one element may be indirectly “mounted to” or “connected to” through intervening elements. to” another widget.
  • An embodiment of the present invention provides a display device, which may be a liquid crystal display device.
  • the display device includes a display panel 1, and the display panel 1 is used to present a required display image for the display device.
  • the display device can be any display device with a display function, such as a mobile phone, a notebook computer, a tablet computer, etc.
  • the display panel 1 generally includes a backlight module 10 , an array substrate 20 , a liquid crystal layer 30 and a color filter substrate 40 that are stacked in sequence.
  • the backlight module 10 is used to provide a display light source for the display panel 1 .
  • the array substrate 20 is used to control the deflection direction of the liquid crystal molecules in the liquid crystal layer 30, thereby controlling whether the backlight light is transmitted or not, thereby forming an image.
  • the color filter substrate 40 is used to filter the light of a single color emitted from the liquid crystal layer 30 into colored light of multiple colors, thereby achieving color display.
  • the array substrate 20 is disposed on the light exit surface of the backlight module 10 and is provided with a plurality of thin film transistors 21 .
  • the thin film transistors 21 are arrayed in the array substrate 20 . Since the thin film transistor 21 cannot transmit light, a plurality of non-opening areas 20B corresponding to the thin film transistors 21 and opening areas 20A connected to the non-opening areas 20B are formed on the array substrate 20 . Since the thin film transistor 21 is not provided in the opening area 20A, light can pass through.
  • the array substrate 20 includes a light shielding layer 211, an active layer 212, a gate layer 213 and a source and drain layer 214, wherein the active layer 212, the gate layer 213 and the source and drain layer 214 are The main conductive structure of the thin film transistor 21 .
  • the array substrate 20 also includes an insulating structure 22.
  • the insulating structure 22 includes a substrate layer 23, a third insulating layer 221, a second insulating layer 223, a first insulating layer 225, a buffer layer 24, a gate insulating layer 251, and a third insulating layer 223.
  • the substrate layer 23 is a hard film layer, such as glass, quartz, etc., which is used to provide hard support for the array substrate 20 and improve the structural stability of the array substrate 20 .
  • the light-shielding layer 211 is provided on a surface of the substrate layer 23 away from the backlight module 10 and is located in the non-opening area 20B.
  • the light-shielding layer 211 is made of conductive metal material, and is used to block the incident light entering from the substrate layer 23 side for the active layer 212 to prevent the light from affecting the operation of the active layer 212 .
  • the third insulating layer 221 is provided on the substrate layer 23 and covers the light-shielding layer 211 .
  • a plurality of first grooves 222 are provided on a surface of the third insulating layer 221 away from the backlight module 10, and the first grooves 222 are all located in the opening area 20A, that is, the first grooves 222 are located in the opening area 20A.
  • the groove 222 does not coincide with the orthographic projection of the thin film transistor 21 on the substrate layer 23 .
  • the depth D1 of the first groove 222 is 0.2-2 microns, and the thickness of the third insulating layer 221 is greater than the depth D1 of the first groove 222 .
  • the first groove 222 is in the shape of a cone, which may be in the shape of a truncated cone or a four-sided prism. Furthermore, there is a first included angle between the side wall of the first groove 222 and its bottom surface, and the first included angle is 95°-135°.
  • the second insulating layer 223 is filled in the first groove 222 and forms a platform shape that fits the first groove 222, so that the side surfaces of the second insulating layer 223 are in contact with the first groove.
  • the side walls of the groove 222 are in contact with each other, that is, the included angle between the side surface of the second insulating layer 223 and its bottom surface is also 95°-135°.
  • the refractive index of the second insulating layer 223 is greater than the refractive index of the third insulating layer 221 .
  • the third insulating layer 221 and the second insulating layer 223 are combined to form a prism structure.
  • the light entering the second insulating layer 223 obliquely radiates from the opening area 20A to the non-opening area 20B of the array substrate 20 , it will pass through the side of the second insulating layer 223 and produce a full
  • the reflection effect causes the light that is incident obliquely on the side of the second insulating layer 223 to be completely reflected, thereby preventing the light from incident obliquely into the non-opening area 20B, and is re-reflected from the obliquely incident light into the opening area 20A, and thus
  • the light transmittance of the array substrate 20 is improved and the loss of light is reduced.
  • the second insulating layer 223 has a second groove 224 on a surface away from the backlight module 10 .
  • the thickness of the second insulating layer 223 is equal to the depth D1 of the first groove 222 , that is, the distance between a surface of the second insulating layer 223 away from the backlight module 10 and the distance between the third insulating layer 221 A surface of the backlight module 10 is located in the same plane, so the opening of the second groove 224 and the opening of the first groove 222 are also in the same plane, and the opening of the second groove 224 is also in the same plane.
  • the slot width is less than or equal to the slot width of the first groove 222 .
  • the second groove 224 is spherical and has a depth D2 of 0.2-2 microns.
  • an array substrate 20 and a display panel 1 having a cone-shaped second groove 224 as shown in FIG. 3 or a frustum-shaped second groove 224 as shown in FIG. 4 are also provided, wherein The layered structure and preparation method are similar to the spherical cap-shaped second groove 224, so they will not be described in detail here. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.
  • the second groove 224 is cone-shaped or frustum-shaped, there is a second included angle between the side wall of the second groove 224 and the bottom surface of the first groove 222.
  • the second included angle is greater than the first included angle and less than 180°.
  • the first insulating layer 225 is disposed on a surface of the substrate layer 23 and the second insulating layer 223 away from the backlight module 10 , and includes a main body part 2251 and a covering part 2252 .
  • the main body portion 2251 is filled in the second groove 224 and forms a spherical cap shape that fits the second groove 224, causing the surface of the main body portion 2251 to be in contact with the second groove 224.
  • the curved walls fit together.
  • the covering portion 2252 is provided on a side of the main body portion 2251 away from the backlight module 10 , and covers a surface of the substrate layer 23 away from the backlight module 10 . Further, the refractive index of the first insulating layer 225 is greater than the refractive index of the second insulating layer 223 .
  • the second insulation layer 223 and the main body portion 2251 of the first insulation layer 225 are combined to form a converging lens structure.
  • the light incident from the second insulating layer 223 to the first insulating layer 225 must pass through the arc-shaped surface of the main body 2251 and the second insulating layer 223 , and The refraction effect is generated, causing the light incident on the main body part 2251 to be refracted, reducing the incident angle of the incident light, thereby gathering the divergent backlight light, thereby achieving a light gathering effect and improving the brightness of the display panel 1 .
  • the thickness of the main body part 2251 is equal to the depth D2 of the second groove 224 , that is, a surface of the main body part 2251 away from the backlight module 10 and the third insulating layer 221 away from the backlight module 10 One surface is on the same plane.
  • the preferred width of the second groove 224 is equal to the width of the first groove 222 , that is, the maximum width of the main body 2251 is equal to the maximum width of the second insulating layer 223 , so as to maximize the The width of the main body portion 2251 in the second groove 224 is increased, thereby increasing the refractive area of the first insulating layer 225 .
  • the central axis of the second groove 224 coincides with the central axis of the first groove 222, causing the orthographic projections of the first groove 222 and the second groove 224 to coincide, thereby also making the
  • the orthographic projections of the second insulating layer 223 and the main body portion 2251 overlap, so that the second insulating layer 223 and the second insulating layer 223 are embedded in the prism structure formed by the third insulating layer 221 and the second insulating layer 223 .
  • the converging lens structure formed by the main body part 2251 forms a double lens nested structure to enhance the light condensing effect in the opening area 20A.
  • the buffer layer 24 is disposed on a surface of the covering portion 2252 away from the substrate layer 23 .
  • the buffer layer 24 and the covering portion 2252 can form a buffer structure to slow down the impact on the display panel 1 devices during production and transportation, and protect the thin film transistor 21 structure in the array substrate 20 .
  • the active layer 212 is disposed on a surface of the buffer layer 24 away from the light-shielding layer 211 , and the orthographic projection of the light-shielding layer 211 on the substrate layer 23 covers the active layer 212 on the substrate layer 23 .
  • the gate insulation layer 251 is provided on the buffer layer 24 and covers the active layer 212 .
  • the gate layer 213 is disposed on a surface of the gate insulating layer 251 away from the active layer 212 , and the orthographic projection of the active layer 212 on the substrate layer 23 covers the gate layer.
  • the first dielectric layer 252 is disposed on the gate insulating layer 251 and covers the gate layer 213 .
  • the second dielectric layer 253 is disposed on a surface of the first dielectric layer 252 away from the gate layer 213 .
  • the source and drain layer 214 is disposed on the second dielectric layer 253 and is electrically connected to the active layer 212 through the first dielectric layer 252 and the gate insulating layer 251 in sequence.
  • the flat layer 26 is disposed on the second dielectric layer 253 and covers the source and drain layers 214 .
  • the thin film transistor 21 applies a current and voltage to the gate layer 213 to generate an electric field.
  • the electric field will cause the surface of the active layer 212 to generate induced charges and change the thickness of the conductive channel, thereby controlling the source and drain.
  • the purpose of the current in layer 214 is to drive each sub-pixel in the display panel 1 .
  • the gate insulating layer 251 , the first dielectric layer 252 and the second dielectric layer 253 are used to insulate and protect the conductive structure in the thin film transistor 21 to prevent short circuits between traces.
  • the planarization layer 26 is used to planarize the surface of the thin film transistor 21 .
  • the second dielectric layer 253 is made of inorganic materials, and the flat layer 26 is made of organic materials.
  • the inorganic materials include silicon oxide, silicon oxynitride and silicon nitride.
  • the buffer layer 24, the gate insulating layer 251, and the second dielectric layer 253 are all made of silicon oxide, and the second dielectric layer 253 is made of silicon nitride.
  • the refractive index of the material is closely related to the proportion of nitrogen atoms to oxygen atoms.
  • the refractive index of silicon oxide is the lowest, about 1.49; the refractive index of silicon oxynitride is in the middle, about 1.6-1.7; the refractive index of silicon nitride is The refractive index is the highest, about 1.87. Therefore, the material of the third insulating layer 221 is preferably silicon oxide, the material of the second insulating layer 223 is preferably silicon oxynitride, and the material of the first insulating layer 225 is preferably silicon nitride.
  • the array substrate 20 also includes a common electrode layer 28, a passivation layer 27 and a pixel electrode layer 29.
  • the common electrode layer 28 is disposed on a surface of the flat layer 26 away from the source and drain layer 214 , and is made of transparent conductive material.
  • the passivation layer 27 is provided on the flat layer 26 and covers the common electrode. It is made of silicon nitride and is used to passivate and protect the common electrode layer 28 .
  • the pixel electrode layer 29 is disposed on a surface of the passivation layer 27 away from the common electrode layer 28 and electrically connects to the source and drain layer 214 through the passivation layer 27 and the flat layer 26 . connection, while maintaining electrical insulation between the pixel electrode layer 29 and the common electrode layer 28 .
  • An embodiment of the present invention also provides a method for manufacturing a display panel 1, which is used to prepare the display panel 1 as described above.
  • the preparation process of the display panel 1 preparation method is shown in Figure 5, which includes steps S10-S30.
  • Step S10) Prepare an array substrate 20:
  • a rigid substrate is provided as the substrate layer 23, and a plurality of non-opening areas 20B and opening areas 20A connecting the non-opening areas 20B are defined on the substrate layer 23.
  • a layer of metal material is deposited on a surface of the substrate layer 23 and patterned to form a light-shielding layer 211 located in the non-opening area 20B.
  • a layer of silicon oxide covering the opening area 20A and the non-opening area 20B is deposited on a surface of the substrate layer 23 to form a first insulating layer 225 .
  • a first groove 222 is formed on the first insulating layer 225 in the opening area 20A through processes such as exposure, development, and etching.
  • the first groove 222 has a platform shape, and the angle between the side wall and the bottom surface of the first groove 222 is 95°-135°, and the depth D1 of the first groove 222 is 0.2-2 Micron.
  • Silicon oxynitride is deposited on a surface of the third insulating layer 221 away from the substrate layer 23 , and the silicon oxynitride fills the first groove 222 and forms the second insulating layer 223 .
  • a layer of photoresist 51 is coated on a surface of the second insulating layer 223 away from the third insulating layer 221 , and a layer of photoresist 51 is applied to the surface of the second insulating layer 223 through the photoresist 51 .
  • Surface leveling As shown in FIG.
  • dry etching is performed on the entire surface of the photoresist 51 and the second insulating layer 223 , and the etching rates of the photoresist 51 and the second insulating layer 223 are kept consistent, thereby removing the first
  • the second insulating layer 223 outside the groove 222 only remains the second insulating layer 223 located in the first groove 222 .
  • a second groove 224 is formed in the second insulating layer 223 through exposure, development, etching and other processes.
  • the second groove 224 is in the shape of a spherical cap, and the depth D2 of the second groove 224 is 0.2-2 microns. Since it is difficult to control the etching precision, a portion of the second insulating layer 223 may be left, so that the depth difference between the first groove 222 and the second groove 224 is less than or equal to 0.5 micron.
  • the depth D1 of the first groove 222 is equal to the depth D2 of the second groove 224 , that is, the depth difference between the first groove 222 and the second groove 224 is 0.
  • Silicon nitride is deposited on a surface of the second insulating layer 223 away from the third insulating layer 221.
  • the silicon nitride fills the second groove 224 and forms a main body portion 2251 and covers the main body.
  • the main portion 2251 and the covering portion 2252 of the third insulating layer 221 are combined to form the first insulating layer 225 .
  • a layer of photoresist 52 is coated on a surface of the first insulating layer 225 away from the second insulating layer 223 , and the surface of the covering portion 2252 is flowed through the photoresist 52 . flat. As shown in FIG.
  • dry etching is performed on the entire surface of the photoresist 52 and the covering portion 2252 , and the etching rates of the photoresist 52 and the covering portion 2252 are kept consistent, and finally the covering portion is reached.
  • the surface of 2252 is flattened.
  • first insulating layer 225 buffer layer 24, gate insulating layer 251, first dielectric layer 252, second dielectric layer 253, flat layer 26 and other insulating film layers are prepared through a TFT process, and are provided on the above insulating films.
  • a layer of transparent conductive material is deposited on a surface of the flat layer 26 away from the thin film transistor 21 , and the transparent conductive material is patterned to form a common electrode layer 28 .
  • a layer of silicon nitride covering the common electrode layer 28 is deposited on the flat layer 26 to form the passivation layer 27 .
  • a layer of transparent conductive material is deposited on a surface of the passivation layer 27 away from the common electrode layer 28 , and the transparent conductive material is patterned to form a pixel electrode layer 29 .
  • Step S20) Form the liquid crystal layer 30 and the color filter substrate 40: form a liquid crystal cell on the side of the array substrate 20 away from the substrate layer 23, and drop liquid crystal into the liquid crystal cell to form the liquid crystal layer 30 ; A color filter substrate 40 is formed on the side of the liquid crystal layer 30 away from the array substrate 20.
  • Step S30) Form the backlight module 10: prepare the backlight module 10 through a backlight process, and assemble the backlight module 10 on the side of the array substrate 20 away from the liquid crystal layer 30 to form the backlight module 10 as shown in Figure 1 Display panel 1 shown.
  • a nested structure of double lenses is formed in the opening area of the array substrate, and through the nesting structure of the double lenses, total reflection and refraction of light are simultaneously achieved, and the light incident obliquely into the non-opening area is The light is reflected back into the opening area and gathers the divergent backlight light in the opening area, thereby reducing the loss rate of light in the array substrate, improving the overall light transmittance of the array substrate, and thereby improving the display panel display brightness.
  • the display panel 1 generally includes a backlight module 10, an array substrate 20, a liquid crystal layer 30 and a color filter substrate 40 that are stacked in sequence.
  • the backlight module 10 is used to provide a display light source for the display panel 1 .
  • the array substrate 20 is used to control the deflection direction of the liquid crystal molecules in the liquid crystal layer 30, thereby controlling whether the backlight light is transmitted or not, thereby forming an image.
  • the color filter substrate 40 is used to filter the light of a single color emitted from the liquid crystal layer 30 into colored light of multiple colors, thereby achieving color display.
  • the array substrate 20 is disposed on the light exit surface of the backlight module 10 and is provided with a plurality of thin film transistors 21 .
  • the thin film transistors 21 are arrayed in the array substrate 20 . Since the thin film transistor 21 cannot transmit light, a plurality of non-opening areas 20B corresponding to the thin film transistors 21 and opening areas 20A connected to the non-opening areas 20B are formed on the array substrate 20 . Since the thin film transistor 21 is not provided in the opening area 20A, light can pass through.
  • the array substrate 20 includes a light shielding layer 211, an active layer 212, a gate layer 213 and a source and drain layer 214, wherein the active layer 212, the gate layer 213 and the source and drain layer 214 are is the main structure of the thin film transistor 21 .
  • the array substrate 20 also includes an insulating structure 22, which includes a substrate layer 23, a second insulating layer 223, a first insulating layer 225, a buffer layer 24, a gate insulating layer 251, a first dielectric layer 252, Two dielectric layers 253 and planarization layer 26 .
  • the substrate layer 23 covers the opening area 20A and the non-opening area 20B.
  • a surface away from the backlight module 10 is provided with a plurality of first grooves 222 , and the first grooves 222 are Located in the opening area 20A, that is, the orthographic projections of the first groove 222 and the thin film transistor 21 on the substrate layer 23 do not overlap.
  • the depth D1 of the first groove 222 is 0.2-2 microns, and the thickness of the substrate layer 23 is greater than the depth D1 of the first groove 222 .
  • the first groove 222 is in the shape of a cone, which may be in the shape of a truncated cone or a four-sided prism.
  • the substrate layer 23 is a glass substrate, which can also serve as a rigid substrate to provide rigid support for the array substrate 20 and improve the structural stability of the array substrate 20 .
  • the light-shielding layer 211 is provided on a surface of the substrate layer 23 away from the backlight module 10 and is located in the non-opening area 20B.
  • the light-shielding layer 211 is made of conductive metal material, and is used to block the incident light entering from the substrate layer 23 side for the active layer 212 to prevent the light from affecting the operation of the active layer 212 .
  • the second insulating layer 223 is filled in the first groove 222 and forms a platform shape that fits the first groove 222, so that the side surfaces of the second insulating layer 223 are in contact with the first groove.
  • the side walls of the groove 222 are in contact with each other, that is, the included angle between the side surface of the second insulating layer 223 and its bottom surface is also 95°-135°.
  • the refractive index of the second insulating layer 223 is greater than the refractive index of the substrate layer 23 .
  • the base layer 23 and the second insulating layer 223 are combined to form a prism structure.
  • the light entering the second insulating layer 223 obliquely radiates from the opening area 20A to the non-opening area 20B of the array substrate 20 , it will pass through the side of the second insulating layer 223 and produce a full
  • the reflection effect causes the light that is incident obliquely on the side of the second insulating layer 223 to be completely reflected, thereby preventing the light from incident obliquely into the non-opening area 20B, and is re-reflected from the obliquely incident light into the opening area 20A, and thus
  • the light transmittance of the array substrate 20 is improved and the loss of light is reduced.
  • the second insulating layer 223 has a second groove 224 on a surface away from the backlight module 10 .
  • the thickness of the second insulating layer 223 is equal to the depth D1 of the first groove 222 , that is, a surface of the second insulating layer 223 away from the backlight module 10 and a surface of the substrate layer 23 away from the backlight.
  • a surface of the module 10 is located in the same plane, so the notch of the second groove 224 and the notch of the first groove 222 are also in the same plane, and the notch of the second groove 224 is also in the same plane.
  • the width is less than or equal to the slot width of the first groove 222 .
  • the second groove 224 is spherical, and the central axis of the second groove 224 coincides with the central axis of the first groove 222 .
  • the depth D2 of the second groove 224 is 0.2-2 microns. Since it is difficult to control the etching precision, the depth difference between the first groove 222 and the second groove 224 can be made less than or equal to 0.5 microns.
  • the depth D1 of the first groove 222 is equal to the depth D2 of the second groove 224 , that is, the depth difference between the first groove 222 and the second groove 224 is 0.
  • the first insulating layer 225 is disposed on a surface of the substrate layer 23 and the second insulating layer 223 away from the backlight module 10 , and includes a main body part 2251 and a covering part 2252 .
  • the main body portion 2251 is filled in the second groove 224 and forms a spherical cap shape that fits the second groove 224, causing the surface of the main body portion 2251 to be in contact with the second groove 224.
  • the curved walls fit together.
  • the covering portion 2252 is provided on a side of the main body portion 2251 away from the backlight module 10 , and covers a surface of the substrate layer 23 away from the backlight module 10 . Further, the refractive index of the first insulating layer 225 is greater than the refractive index of the second insulating layer 223 .
  • the second insulation layer 223 and the main body portion 2251 of the first insulation layer 225 are combined to form a converging lens structure.
  • the light incident from the second insulating layer 223 to the first insulating layer 225 must pass through the arc-shaped surface of the main body 2251 and the second insulating layer 223 , and The refraction effect is generated, causing the light incident on the main body part 2251 to be refracted, reducing the incident angle of the incident light, thereby gathering the divergent backlight light, thereby achieving a light gathering effect and improving the brightness of the display panel 1 .
  • the thickness of the main body part 2251 is equal to the depth D2 of the second groove 224 , that is, a surface of the main body part 2251 away from the backlight module 10 and a surface of the substrate layer 23 away from the backlight module 10 The surfaces lie on the same plane.
  • the preferred width of the second groove 224 is equal to the width of the first groove 222 , that is, the maximum width of the main body 2251 is equal to the maximum width of the second insulating layer 223 , so as to maximize the The width of the main body portion 2251 in the second groove 224 is increased, thereby increasing the refractive area of the first insulating layer 225 .
  • the central axis of the second groove 224 coincides with the central axis of the first groove 222, causing the orthographic projections of the first groove 222 and the second groove 224 to coincide, thereby also making the
  • the orthographic projections of the second insulating layer 223 and the main body portion 2251 overlap, so that the second insulating layer 223 and the main body are embedded in the prism structure formed by the substrate layer 23 and the second insulating layer 223
  • the converging lens structure formed by the portion 2251 forms a double lens nested structure to enhance the light condensing effect in the opening area 20A.
  • the buffer layer 24 is disposed on a surface of the covering portion 2252 away from the substrate layer 23 .
  • the buffer layer 24 and the covering portion 2252 can form a buffer structure to slow down the impact on the display panel 1 devices during production and transportation, and protect the thin film transistor 21 structure in the array substrate 20 .
  • the active layer 212 is disposed on a surface of the buffer layer 24 away from the light-shielding layer 211 , and the orthographic projection of the light-shielding layer 211 on the substrate layer 23 covers the active layer 212 on the substrate layer 23 .
  • the gate insulation layer 251 is provided on the buffer layer 24 and covers the active layer 212 .
  • the gate layer 213 is disposed on a surface of the gate insulating layer 251 away from the active layer 212 , and the orthographic projection of the active layer 212 on the substrate layer 23 covers the gate layer.
  • the first dielectric layer 252 is disposed on the gate insulating layer 251 and covers the gate layer 213 .
  • the second dielectric layer 253 is disposed on a surface of the first dielectric layer 252 away from the gate layer 213 .
  • the source and drain layer 214 is disposed on the second dielectric layer 253 and is electrically connected to the active layer 212 through the first dielectric layer 252 and the gate insulating layer 251 in sequence.
  • the flat layer 26 is disposed on the second dielectric layer 253 and covers the source and drain layers 214 .
  • the thin film transistor 21 applies a current and voltage to the gate layer 213 to generate an electric field.
  • the electric field will cause the surface of the active layer 212 to generate induced charges and change the thickness of the conductive channel, thereby controlling the source and drain.
  • the purpose of the current in layer 214 is to drive each sub-pixel in the display panel 1 .
  • the gate insulating layer 251 , the first dielectric layer 252 and the second dielectric layer 253 are used to insulate and protect the conductive structure in the thin film transistor 21 to prevent short circuits between traces.
  • the planarization layer 26 is used to planarize the surface of the thin film transistor 21 .
  • the second insulating layer 223, the first insulating layer 225, the buffer layer 24, the gate insulating layer 251, the first dielectric layer 252 and the second dielectric layer 253 It is made of inorganic materials, and the flat layer 26 is made of organic materials.
  • the inorganic materials include silicon oxide, silicon oxynitride and silicon nitride.
  • the buffer layer 24, the gate insulating layer 251, and the second dielectric layer 253 are all made of silicon oxide, and the second dielectric layer 253 is made of silicon nitride.
  • the refractive index of the material is closely related to the proportion of nitrogen atoms to oxygen atoms.
  • the refractive index of silicon oxide is the lowest, about 1.49; the refractive index of silicon oxynitride is in the middle, about 1.6-1.7; the refractive index of silicon nitride is The refractive index is the highest, about 1.87.
  • the refraction of the substrate layer 23 is 1.51. Therefore, the material of the second insulating layer 223 is preferably silicon oxynitride, and the material of the first insulating layer 225 is preferably silicon nitride.
  • the array substrate 20 also includes a common electrode layer 28, a passivation layer 27 and a pixel electrode layer 29.
  • the common electrode layer 28 is disposed on a surface of the flat layer 26 away from the source and drain layer 214 , and is made of transparent conductive material.
  • the passivation layer 27 is provided on the flat layer 26 and covers the common electrode. It is made of silicon nitride and is used to passivate and protect the common electrode layer 28 .
  • the pixel electrode layer 29 is disposed on a surface of the passivation layer 27 away from the common electrode layer 28 and electrically connects to the source and drain layer 214 through the passivation layer 27 and the flat layer 26 . connection, while maintaining electrical insulation between the pixel electrode layer 29 and the common electrode layer 28 .
  • a nested structure of double lenses is formed in the opening area of the array substrate, and through the nesting structure of the double lenses, total reflection and refraction of light are simultaneously achieved, and the light incident obliquely into the non-opening area is The light is reflected back into the opening area and gathers the divergent backlight light in the opening area, thereby reducing the loss rate of light in the array substrate, improving the overall light transmittance of the array substrate, and thereby improving the display panel display brightness.
  • the first groove is provided on the glass substrate, thereby combining the functions of the third insulating layer and the substrate layer in Embodiment 1, so that the substrate layer has the function of hard support. It can also produce a total reflection effect with the second insulating layer. Compared with Embodiment 1, it can also reduce one inorganic film layer, thereby reducing the overall thickness of the array substrate and the display panel.
  • the display panel 1 generally includes a backlight module 10, an array substrate 20, a liquid crystal layer 30 and a color filter substrate 40 that are stacked in sequence.
  • the backlight module 10 is used to provide a display light source for the display panel 1 .
  • the array substrate 20 is used to control the deflection direction of the liquid crystal molecules in the liquid crystal layer 30, thereby controlling whether the backlight light is transmitted or not, thereby forming an image.
  • the color filter substrate 40 is used to filter the light of a single color emitted from the liquid crystal layer 30 into colored light of multiple colors, thereby achieving color display.
  • the array substrate 20 is disposed on the light exit surface of the backlight module 10 and is provided with a plurality of thin film transistors 21 .
  • the thin film transistors 21 are arranged in an array in the array substrate 20 . Since the thin film transistor 21 cannot transmit light, a plurality of non-opening areas 20B corresponding to the thin film transistors 21 and opening areas 20A connected to the non-opening areas 20B are formed on the array substrate 20 . Since the thin film transistor 21 is not provided in the opening area 20A, light can pass through.
  • the array substrate 20 includes a light shielding layer 211, an active layer 212, a gate layer 213 and a source and drain layer 214, wherein the active layer 212, the gate layer 213 and the source and drain layer 214 are The main conductive structure of the thin film transistor 21 .
  • the array substrate 20 also includes an insulating structure 22, which includes a substrate layer 23, a first buffer layer 241, a second buffer layer 242, a gate insulating layer 251, a first dielectric layer 252, a second dielectric layer 253, the third insulating layer 221, the second insulating layer 223 and the first insulating layer 225.
  • the substrate layer 23 is a hard film layer, such as glass, quartz, etc., which is used to provide hard support for the array substrate 20 and improve the structural stability of the array substrate 20 .
  • the light-shielding layer 211 is provided on a surface of the substrate layer 23 away from the backlight module 10 and is located in the non-opening area 20B.
  • the light-shielding layer 211 is made of conductive metal material, and is used to block the incident light entering from the substrate layer 23 side for the active layer 212 to prevent the light from affecting the operation of the active layer 212 .
  • the first buffer layer 241 is disposed on a surface of the third insulating layer 221 away from the backlight module 10 .
  • the second buffer layer 242 is disposed on a surface of the first buffer layer 241 away from the substrate layer 23 .
  • the first buffer layer 241 and the second buffer layer 242 can form a buffer structure to slow down the impact on the display panel 1 devices during production and transportation, and protect the thin film transistor 21 structure in the array substrate 20 .
  • the active layer 212 is disposed on a surface of the second buffer layer 242 away from the light-shielding layer 211, and the orthographic projection of the light-shielding layer 211 on the substrate layer 23 covers the active layer 212. Orthographic projection on the substrate layer 23 .
  • the gate insulation layer 251 is provided on the second buffer layer 242 and covers the active layer 212 .
  • the gate layer 213 is disposed on a surface of the gate insulating layer 251 away from the active layer 212 , and the orthographic projection of the active layer 212 on the substrate layer 23 covers the gate layer.
  • the first dielectric layer 252 is disposed on the gate insulating layer 251 and covers the gate layer 213 .
  • the second dielectric layer 253 is disposed on a surface of the first dielectric layer 252 away from the gate layer 213 .
  • the source and drain layer 214 is disposed on the second dielectric layer 253 and is electrically connected to the active layer 212 through the first dielectric layer 252 and the gate insulating layer 251 in sequence.
  • the third insulating layer 221 is disposed on the second dielectric layer 253 and covers the source and drain layers 214 .
  • a plurality of first grooves 222 are provided on a surface of the third insulating layer 221 away from the backlight module 10 , and the first grooves 222 are all located in the opening area 20A, that is, the first grooves 222 are located in the opening area 20A.
  • the groove 222 does not coincide with the orthographic projection of the thin film transistor 21 on the substrate layer 23 .
  • the depth D1 of the first groove 222 is 0.2-2 microns, and the thickness of the third insulating layer 221 is greater than the depth D1 of the first groove 222 .
  • the first groove 222 is in the shape of a cone, which may be in the shape of a truncated cone or a four-sided prism. Furthermore, there is a first included angle between the side wall of the first groove 222 and its bottom surface, and the first included angle is 95°-135°.
  • the second insulating layer 223 is filled in the first groove 222 and forms a platform shape that fits the first groove 222, so that the side surfaces of the second insulating layer 223 are in contact with the first groove.
  • the side walls of the groove 222 are in contact with each other, that is, the included angle between the side surface of the second insulating layer 223 and its bottom surface is also 95°-135°.
  • the refractive index of the second insulating layer 223 is greater than the refractive index of the third insulating layer 221 .
  • the third insulating layer 221 and the second insulating layer 223 are combined to form a prism structure.
  • the light entering the second insulating layer 223 obliquely radiates from the opening area 20A to the non-opening area 20B of the array substrate 20 , it will pass through the side of the second insulating layer 223 and produce a full
  • the reflection effect causes the light that is incident obliquely on the side of the second insulating layer 223 to be completely reflected, thereby preventing the light from incident obliquely into the non-opening area 20B, and is re-reflected from the obliquely incident light into the opening area 20A, and thus
  • the light transmittance of the array substrate 20 is improved and the loss of light is reduced.
  • the second insulating layer 223 has a second groove 224 on a surface away from the backlight module 10 .
  • the thickness of the second insulating layer 223 is equal to the depth D1 of the first groove 222 , that is, the distance between a surface of the second insulating layer 223 away from the backlight module 10 and the distance between the third insulating layer 221 A surface of the backlight module 10 is located in the same plane, so the opening of the second groove 224 and the opening of the first groove 222 are also in the same plane, and the opening of the second groove 224 is also in the same plane.
  • the slot width is less than or equal to the slot width of the first groove 222 .
  • the second groove 224 is spherical, and the central axis of the second groove 224 coincides with the central axis of the first groove 222 .
  • the depth D2 of the second groove 224 is 0.2-2 microns. Since it is difficult to control the etching precision, the depth difference between the first groove 222 and the second groove 224 can be made less than or equal to 0.5 microns.
  • the depth D1 of the first groove 222 is equal to the depth D2 of the second groove 224 , that is, the depth difference between the first groove 222 and the second groove 224 is 0.
  • the first insulating layer 225 is filled in the second groove 224 and forms a spherical cap shape that fits the second groove 224, causing the surface of the first insulating layer 225 to contact the second groove 224.
  • the arcuate walls of the groove 224 fit together.
  • the refractive index of the first insulating layer 225 is greater than the refractive index of the second insulating layer 223 .
  • the second insulating layer 223 and the first insulating layer 225 are combined to form a converging lens structure.
  • the light incident from the second insulating layer 223 to the first insulating layer 225 must pass through the arc-shaped surface of the first insulating layer 225 and the second insulating layer 223 . , and generates a refraction effect, causing the light incident on the first insulating layer 225 to refract, reducing the incident angle of the incident light, thereby gathering the divergent backlight light, thereby achieving a light condensing effect, and improving the display panel 1 brightness.
  • the thickness of the first insulating layer 225 is equal to the depth D2 of the second groove 224 , that is, a surface of the first insulating layer 225 away from the backlight module 10 and a surface of the third insulating layer 221 away from the backlight module 10 are equal to the depth D2 of the second groove 224 .
  • One surface of the backlight module 10 is located on the same plane.
  • the preferred width of the second groove 224 is equal to the width of the first groove 222 , that is, the maximum width of the first insulating layer 225 is equal to the maximum width of the second insulating layer 223 , so that the maximum width The width of the first insulating layer 225 in the second groove 224 is increased to the maximum limit, thereby increasing the refractive area of the first insulating layer 225 .
  • the central axis of the second groove 224 coincides with the central axis of the first groove 222, causing the orthographic projections of the first groove 222 and the second groove 224 to coincide, thereby also making the The orthographic projections of the second insulating layer 223 and the first insulating layer 225 overlap, so that the second insulating layer 223 is embedded in the prism structure formed by the third insulating layer 221 and the second insulating layer 223
  • the converging lens structure formed with the first insulating layer 225 forms a double lens nested structure to enhance the light condensing effect in the opening area 20A.
  • the thin film transistor 21 applies a current and voltage to the gate layer 213 to generate an electric field.
  • the electric field will cause the surface of the active layer 212 to generate induced charges and change the thickness of the conductive channel, thereby controlling the source and drain.
  • the purpose of the current in layer 214 is to drive each sub-pixel in the display panel 1 .
  • the gate insulating layer 251 , the first dielectric layer 252 and the second dielectric layer 253 are used to insulate and protect the conductive structure in the thin film transistor 21 to prevent short circuits between traces.
  • the third insulating layer 221 can produce a total reflection effect with the second insulating layer 223 and can also planarize the surface of the array substrate 20 .
  • the layer 223 and the first insulating layer 225 are made of inorganic materials
  • the third insulating layer 221 is made of organic materials with a leveling effect.
  • the inorganic materials include silicon oxide, silicon oxynitride and silicon nitride.
  • the second buffer layer 242, the gate insulating layer 251, and the second dielectric layer 253 are all made of silicon oxide, and the first buffer layer 241 and the second dielectric layer 253 are made of silicon nitride. chemical.
  • the third insulating layer 221 is made of at least one of polyimide (PI) or polymethylmethacrylate (PMMA).
  • the refractive index of the material is closely related to the proportion of nitrogen atoms to oxygen atoms.
  • the refractive index of silicon oxide is the lowest, about 1.49; the refractive index of silicon oxynitride is in the middle, about 1.6-1.7; the refractive index of silicon nitride is The refractive index is the highest, about 1.87.
  • the refractive index of the third insulating layer 221 ie, organic material
  • the material of the second insulating layer 223 is preferably silicon oxynitride, and the material of the first insulating layer 225 is preferably silicon nitride. chemical.
  • the array substrate 20 also includes a common electrode layer 28, a passivation layer 27 and a pixel electrode layer 29.
  • the common electrode layer 28 is disposed on a surface of the third insulating layer 221 away from the source and drain layer 214 and covers the first insulating layer 225. It is made of transparent conductive material.
  • the passivation layer 27 is provided on the third insulating layer 221 and covers the common electrode. It is made of silicon nitride and is used to passivate and protect the common electrode layer 28 .
  • the pixel electrode layer 29 is disposed on a surface of the passivation layer 27 away from the common electrode layer 28 and passes through the passivation layer 27 and the third insulating layer 221 and the source and drain layers. 214 are electrically connected while maintaining electrical insulation between the pixel electrode layer 29 and the common electrode layer 28 .
  • a nested structure of double lenses is formed in the opening area of the array substrate, and through the nesting structure of the double lenses, total reflection and refraction of light are simultaneously achieved, and the light incident obliquely into the non-opening area is The light is reflected back into the opening area and gathers the divergent backlight light in the opening area, thereby reducing the loss rate of light in the array substrate, improving the overall light transmittance of the array substrate, and thereby improving the display panel display brightness.
  • the first groove is provided on the organic film layer with leveling effect, thereby combining the function of the third insulating layer with the flat layer in Embodiment 1, so that the third insulating layer
  • the layer has a flattening effect and can also produce a total reflection effect with the second insulating layer. Compared with Embodiment 1, it can also reduce one inorganic film layer, thereby reducing the overall cost of the array substrate and the display panel. thickness.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本发明提供了一种显示面板及其制备方法、显示装置。显示面板包括背光模组和阵列基板。阵列基板包括位于开口区中的绝缘结构。绝缘结构远离背光模组的一侧设有第一凹槽，第一凹槽内填充有第一绝缘层和第二绝缘层，第二绝缘层位于第一绝缘层靠近背光模组的一侧，且第二绝缘层的折射率小于第一绝缘层的折射率。

Description

显示面板及其制备方法、显示装置 技术领域
本发明涉及显示设备领域，特别是一种显示面板及其制备方法、显示装置。
 背景技术
近年来，在TFT-LCD（Thin Film Transistor Liquid Crystal Display，薄膜晶体管液晶显示器）中，正在推进用于低功耗、高亮度和提高光利用率的项目开发。其中，提高透光率能提升TFT-LCD的亮度、减少电力损耗，是世界各家面板厂都在攻克的难关。
TFT-LCD面板的透光率是指背光源透过TFT-LCD面板前后的光强之比。通常情况下TFT-LCD的透光率只有3-10%，也就是说超过90%的光是无法得到利用的。
对于TFT-LCD的Array（阵列）基板的开口区来说，对光效影响较大的是由绝缘材料、有机材料、透明导电材料等多种材料构成的多层膜结构。常规的Array基板中的多层膜均为平面结构，对光线无汇聚作用。另外，由背光模组出射的光比较发散，部分光线会从开口区进入非开口区，造成光线的损失及浪费，降低了光线的利用率。
 技术问题
本发明的目的是提供一种显示面板及其制备方法、显示装置，以解决现有技术中阵列基板对光线无汇聚作用以及显示面板的光线利用率较低的问题。
 技术解决方案
为实现上述目的，本发明提供一种显示面板，所述显示面板包括背光模组和阵列基板。所述背光模组具有一出光面。所述阵列基板设于所述背光模组的出光面上，其具有多个非开口区以及连接所述非开口区的开口区。
所述阵列基板包括绝缘结构，所述绝缘结构位于所述开口区中。所述绝缘结构远离所述背光模组的一侧设有第一凹槽，所述第一凹槽内填充有第一绝缘层和第二绝缘层，所述第二绝缘层位于所述第一绝缘层靠近所述背光模组的一侧，且所述第二绝缘层的折射率小于所述第一绝缘层的折射率。
进一步地，所述绝缘结构包括衬底层和第三绝缘层，所述第三绝缘层设于所述衬底层远离所述背光模组的一侧。所述第一凹槽设于所述衬底层或所述第三绝缘层远离所述背光模组的一表面上。所述第二绝缘层设于所述第一凹槽中，且所述衬底层和所述第三绝缘层的折射率均小于所述第二绝缘层的折射率。所述第二绝缘层远离所述背光模组的一表面上具有第二凹槽，所述第一绝缘层填充所述第二凹槽。
进一步地，所述第三绝缘层的材料中包含有机材料或无机材料中的至少一种。所述第一绝缘层和所述第二绝缘层的材料中包含无机材料。
进一步地，所述无机材料包括硅氧化物、硅氮氧化物和硅氮化物。在所述第一绝缘层、所述第二绝缘层和所述第三绝缘层中，离所述背光模组越近的膜层，其材料中氧原子的数量占比越大。离所述背光模组越远的膜层，其材料中氮原子的数量占比越大。
进一步地，所述第一凹槽为台体形，其侧壁与其底面之间具有一第一夹角，所述第一夹角的角度为95°-135°。
进一步地，当所述第二凹槽为锥体形或台体形时，所述第二凹槽的侧壁与所述第一凹槽的底面之间具有一第二夹角，所述第二夹角的角度大于所述第一夹角的角度且小于180°。
进一步地，所述第二凹槽为锥体形、台体形或球冠形中的至少一种，且所述第二凹槽的中心轴与所述第一凹槽的中心轴重合。
进一步地，所述第一凹槽的深度为0.2-2微米。所述第二凹槽的深度小于或等于所述第一凹槽的深度，且所述第一凹槽与所述第二凹槽之间的深度差小于或等于0.5微米。
进一步地，所述第一绝缘层包括主体部和覆盖部。所述主体部填充所述第二凹槽，且所述主体部的形状与所述第二凹槽的形状相契合。所述覆盖部设于所述主体部远离所述背光模组的一侧，并覆盖所述衬底层或所述第三绝缘层远离所述背光模组的一表面。
进一步地，所述阵列基板还包括薄膜晶体管，所述薄膜晶体管位于所述非开口区中，且所述薄膜晶体管在所述衬底层上的正投影与所述第一凹槽在所述衬底层上的正投影不重合。
本发明中还提供一种显示面板的制备方法，所述制备方法包括以下步骤：
制备背光模组；
制备阵列基板，其包括以下步骤：提供一绝缘结构，并在所述绝缘结构上定义出非开口区和开口区，其中所述绝缘结构包括第一绝缘层和第二绝缘层；在所述绝缘结构远离所述背光模组的一侧形成第一凹槽，所述第一凹槽位于所述开口区中；在所述第一凹槽中形成依次形成第二绝缘层和第一绝缘层。
其中，所述第二绝缘层的折射率小于所述第一绝缘层的折射率。
本发明中还提供一种显示装置，所述显示装置包括如上所述的显示面板。
 有益效果
本发明的优点是：本发明中的一种显示面板及其制备方法，在阵列基板的开口区内通过在相邻的三层膜层中形成嵌套的绝缘结构，并在嵌套的绝缘结构中形成双透镜结构，在实现光线的全反射的同时还能够折射光线，将斜射进所述非开口区中的光线反射回所述开口区中，并将所述开口区中发散的背光光线聚集，从而减低光线在阵列基板中的损耗率，提高所述显示面板的显示亮度。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例1中显示面板的层状结构示意图；
图2为本发明实施例1中阵列基板的层状结构示意图；
图3为本发明其他实施例中锥体形第二凹槽的层状示意图；
图4为本发明其他实施例中台体形第二凹槽的层状示意图；
图5为本发明实施例1中显示面板制备方法的流程示意图；
图6为本发明实施例1中形成第一凹槽后阵列基板的层状结构示意图；
图7为本发明实施例1中通过光阻将第二绝缘层表面流平后阵列基板的层状结构示意图；
图8为本发明实施例1中去除第一凹槽以外的第二绝缘层后阵列基板的层状结构示意图；
图9为本发明实施例1中形成第二凹槽后阵列基板的层状结构示意图；
图10为本发明实施例1中通过光阻将第一绝缘层表面流平后阵列基板的层状结构示意图；
图11为本发明实施例1中第一绝缘层表面平坦化后阵列基板的层状结构示意图；
图12为本发明实施例2中阵列基板的层状结构示意图；
图13为本发明实施例3中阵列基板的层状结构示意图。
图中部件表示如下：
显示面板1；背光模组10；
阵列基板20；液晶层30；
彩膜基板40；开口区20A；
非开口区20B；薄膜晶体管21；
遮光层211；有源层212；
栅极层213；源漏极层214；
绝缘结构22；第三绝缘层221；
第一凹槽222；第二绝缘层223；
第二凹槽224；第一绝缘层225；
主体部2251；覆盖部2252；
衬底层23；缓冲层24；
第一缓冲层241；第二缓冲层24；
栅极绝缘层251；第一介电层252；
第二介电层253；平坦层26；
钝化层27；公共电极层28；
像素电极层29；光阻51、52。
 本发明的实施方式
以下参考说明书附图介绍本发明的优选实施例，证明本发明可以实施，所述发明实施例可以向本领域中的技术人员完整介绍本发明，使其技术内容更加清楚和便于理解。本发明可以通过许多不同形式的发明实施例来得以体现，本发明的保护范围并非仅限于文中提到的实施例。
在附图中，结构相同的部件以相同数字标号表示，各处结构或功能相似的组件以相似数字标号表示。附图所示的每一部件的尺寸和厚度是任意示出的，本发明并没有限定每个组件的尺寸和厚度。为了使图示更清晰，附图中有些地方适当夸大了部件的厚度。
此外，以下各发明实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定发明实施例。本发明中所提到的方向用语，例如，“上”、“下”、“前”、“后”、“左”、“右”、“内”、“外”、“侧面”等，仅是参考附加图式的方向，因此，使用的方向用语是为了更好、更清楚地说明及理解本发明，而不是指示或暗指所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”、“第三”等仅用于描述目的，而不能理解为指示或暗示相对重要性。
当某些部件被描述为“在”另一部件“上”时，所述部件可以直接置于所述另一部件上；也可以存在一中间部件，所述部件置于所述中间部件上，且所述中间部件置于另一部件上。当一个部件被描述为“安装至”或“连接至”另一部件时，二者可以理解为直接“安装”或“连接”，或者一个部件通过一中间部件间接“安装至”、或“连接至”另一个部件。
实施例1
本发明实施例中提供一种显示装置，所述显示装置可以为液晶显示装置。所述显示装置包括一显示面板1，所述显示面板1用于为所述显示装置呈现所需要的显示画面。所述显示装置可以为任何带有显示功能的显示器件，例如手机、笔记本电脑、平板电脑等。
如图1所示，所述显示面板1中一般包括依次叠层设置的背光模组10、阵列基板20、液晶层30以及彩膜基板40。所述背光模组10用于为所述显示面板1提供显示光源。所述阵列基板20用于控制液晶层30中液晶分子的偏转方向，从而控制背光光线的透过与否，进而形成图像画面。所述彩膜基板40则用于将从所述液晶层30出射的单一颜色的光线过滤为多种颜色的彩色光线，从而实现彩色显示。
如图2所示，所述阵列基板20设于所述背光模组10的出光面上，其设有多个薄膜晶体管21，所述薄膜晶体管21阵列排布在所述阵列基板20中。由于所述薄膜晶体管21无法透光，因此在所述阵列基板20上形成了多个与所述薄膜晶体管21相对应的非开口区20B，以及与所述非开口区20B连接的开口区20A。其中，所述开口区20A中由于未设置所述薄膜晶体管21，因此光线可以穿过。
所述阵列基板20中包括遮光层211、有源层212、栅极层213以及源漏极层214，其中所述有源层212、所述栅极层213以及所述源漏极层214为所述薄膜晶体管21的主要导电结构。所述阵列基板20还包括绝缘结构22，所述绝缘结构22包括衬底层23、第三绝缘层221、第二绝缘层223、第一绝缘层225、缓冲层24、栅极绝缘层251、第一介电层252、第二介电层253以及平坦层26。
所述衬底层23为硬性膜层，例如玻璃、石英等，其用于为所述阵列基板20提供硬性支撑，提高所述阵列基板20的结构稳定性。所述遮光层211设于所述衬底层23远离所述背光模组10的一表面上，并位于所述非开口区20B中。所述遮光层211采用导电金属材料制备而成，其用于为所述有源层212遮挡从衬底层23侧进入的入射光，防止光线影响所述有源层212的工作。
所述第三绝缘层221设于所述衬底层23上，并覆盖所述遮光层211。所述第三绝缘层221远离所述背光模组10的一表面上设有多个第一凹槽222，且所述第一凹槽222均位于所述开口区20A中，即所述第一凹槽222与所述薄膜晶体管21在所述衬底层23上正投影不重合。其中，所述第一凹槽222的深度D1为0.2-2微米，且所述第三绝缘层221的厚度大于所述第一凹槽222的深度D1。所述第一凹槽222为台体形，其可以为圆台形或四边棱台形。进一步地，所述第一凹槽222的侧壁与其底面之间具有一第一夹角，所述第一夹角的角度为95°-135°。
所述第二绝缘层223填充在所述第一凹槽222中，并形成与所述第一凹槽222相契合的台体形，促使所述第二绝缘层223的侧面与所述第一凹槽222的侧壁相贴合，即所述第二绝缘层223的侧面与其底面之间的夹角角度也为95°-135°。进一步地，所述第二绝缘层223的折射率大于所述第三绝缘层221的折射率。
所述第三绝缘层221与所述第二绝缘层223组合形成一棱镜结构。如图2所示，进入所述第二绝缘层223的光线从所述阵列基板20的开口区20A向所述非开口区20B斜射时会经过所述第二绝缘层223的侧面，并产生全反射效应，使斜射在所述第二绝缘层223侧面上的光线发生全反射，从而防止光线斜射进所述非开口区20B中，并从斜射的光线重新反射进所述开口区20A中，进而提高所述阵列基板20的透光率，减少光线的损失。
所述第二绝缘层223远离所述背光模组10的一表面上具有第二凹槽224。所述第二绝缘层223的厚度等于所述第一凹槽222的深度D1，即所述第二绝缘层223远离所述背光模组10的一表面与所述第三绝缘层221的远离所述背光模组10的一表面位于同一平面中，因此所述第二凹槽224的槽口与所述第一凹槽222的槽口也在同一平面中，并且所述第二凹槽224的槽口宽度小于或等于所述第一凹槽222的槽口宽度。所述第二凹槽224为球冠形，其深度D2为0.2-2微米。
在本发明的其他实施例中，还提供具有如图3中所示的锥体形第二凹槽224或如图4中所示台体形第二凹槽224的阵列基板20及显示面板1，其层状结构以及制备方法均与球冠形的第二凹槽224相似，因此不在此做过多赘述。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其它实施例，都属于本申请保护的范围。
进一步地，当所述第二凹槽224为锥体形或台体形时，所述第二凹槽224的侧壁与所述第一凹槽222的底面之间具有一第二夹角，所述第二夹角的角度大于所述第一夹角的角度且小于180°。
所述第一绝缘层225设于所述衬底层23和所述第二绝缘层223远离所述背光模组10的一表面上，其包括一主体部2251和一覆盖部2252。所述主体部2251填充在所述第二凹槽224中，并形成与所述第二凹槽224相契合的球冠形，促使所述主体部2251的表面与所述第二凹槽224的弧形壁面相贴合。所述覆盖部2252设于所述主体部2251远离所述背光模组10的一侧，并覆盖所述衬底层23远离所述背光模组10的一表面。进一步地，所述第一绝缘层225的折射率大于所述第二绝缘层223的折射率。
所述第二绝缘层223与所述第一绝缘层225的主体部2251组合形成会聚透镜结构。如图2所示，从所述第二绝缘层223入射至所述第一绝缘层225的光线必会经过所述主体部2251与所述第二绝缘层223相贴合的弧形表面，并产生折射效应，促使入射至所述主体部2251中的光线发生折射，缩小入射光线的入射角度，从而将发散的背光光线聚集，进而达到聚光效果，提高所述显示面板1的亮度。
所述主体部2251的厚度等于所述第二凹槽224的深度D2，即所述主体部2251远离所述背光模组10的一表面与所述第三绝缘层221远离所述背光模组10的一表面位于同一平面上。并且，所述第二凹槽224槽口的优选宽度等于第一凹槽222的槽口宽度，即所述主体部2251的最大宽度等于所述第二绝缘层223的最大宽度，从而最大限度上增加所述第二凹槽224中所述主体部2251的宽度，进而增加所述第一绝缘层225的折射面积。
同时，所述第二凹槽224的中心轴与所述第一凹槽222的中心轴重合，促使所述第一凹槽222与所述第二凹槽224的正投影重合，从而也所述第二绝缘层223与所述主体部2251的正投影重合，进而使所述第三绝缘层221与所述第二绝缘层223所形成的棱镜结构中嵌套所述第二绝缘层223与所述主体部2251所形成的会聚透镜结构，形成双透镜嵌套结构，增强所述开口区20A中的聚光效果。
所述缓冲层24设于所述覆盖部2252远离所述衬底层23的一表面上。所述缓冲层24和所述覆盖部2252可以形成缓冲结构，减缓生产运输过程中对显示面板1器件的冲击力，保护所述阵列基板20中的薄膜晶体管21结构。
所述有源层212设于所述缓冲层24远离所述遮光层211的一表面上，并且所述遮光层211在所述衬底层23上的正投影覆盖所述有源层212在所述衬底层23上的正投影。所述栅极绝缘层251设于所述缓冲层24上，并覆盖所述有源层212。所述栅极层213设于所述栅极绝缘层251远离所述有源层212的一表面上，并且所述有源层212在所述衬底层23上的正投影覆盖所述栅极层213在所述衬底层23上的正投影。所述第一介电层252设于所述栅极绝缘层251上，并覆盖所述栅极层213。所述第二介电层253设于所述第一介电层252远离所述栅极层213的一表面上。所述源漏极层214设于所述第二介电层253上，并依次穿过所述第一介电层252和所述栅极绝缘层251与所述有源层212电连接。所述平坦层26设于所述第二介电层253上，并覆盖所述源漏极层214。
其中，所述薄膜晶体管21通过对栅极层213施加电流电压，从而产生电场，所述电场会促使所述有源层212的表面产生感应电荷，改变导电沟道厚度，从而达到控制源漏极层214电流的目的，实现对所述显示面板1中每一子像素的驱动。而所述栅极绝缘层251、所述第一介电层252和所述第二介电层253则用于绝缘保护所述薄膜晶体管21中的导电结构，防止走线之间发生短路。所述平坦层26用于将所述薄膜晶体管21的表面平坦化。
具体的，所述第三绝缘层221、所述第二绝缘层223、所述第一绝缘层225、所述缓冲层24、所述栅极绝缘层251、所述第一介电层252和所述第二介电层253采用无机材料制备而成，所述平坦层26采用有机材料制备而成。其中，所述无机材料包括硅氧化物、硅氮氧化物和硅氮化物。所述缓冲层24、所述栅极绝缘层251、和所述第二介电层253均采用硅氧化物，所述第二介电层253采用硅氮化物。
在硅氧化物、硅氮氧化物和硅氮化物中，材料折射率与氮原子与氧原子之间的数量占比息息相关，氮原子的数量占比越大则其折射率越高，氧原子的数量占比越大则其折射率越低。因此，在所述第三绝缘层221、所述第二绝缘层223和所述第一绝缘层225中，离所述背光模组10越近的膜层，其材料中氧原子的数量占比越大；离所述背光模组10越远的膜层，其材料中氮原子的数量占比越大。
进一步地，在硅氧化物、硅氮氧化物和硅氮化物中，硅氧化物的折射率最低，约为1.49；硅氮氧化物的折射率位于中间，约为1.6-1.7；硅氮化物的折射率最高，约为1.87。因此，所述第三绝缘层221的材料优选为硅氧化物，所述第二绝缘层223的材料优选为硅氮氧化物，所述第一绝缘层225的材料优选为硅氮化物。
所述阵列基板20还包括公共电极层28、钝化层27和像素电极层29。所述公共电极层28设于所述平坦层26远离所述源漏极层214的一表面上，其采用透明导电材料制备而成。所述钝化层27设于所述平坦层26上并覆盖所述公共电极，其才采用硅氮化物制备而成，并用于钝化保护所述公共电极层28。所述像素电极层29设于所述钝化层27远离所述公共电极层28的一表面上，并穿过所述钝化层27和所述平坦层26与所述源漏极层214电连接，同时所述像素电极层29与所述公共电极层28之间保持电性绝缘。
本发明实施例中还提供一种显示面板1的制备方法，用以制备如上所述的显示面板1。所述显示面板1制备方法的制备流程如图5所示，其包括步骤S10-S30。
步骤S10）制备一阵列基板20：
提供一硬性基板作为衬底层23，并在所述衬底层23上定义出多个非开口区20B以及连接所述非开口区20B的开口区20A。在所述衬底层23的一表面上沉积一层金属材料，并将该层金属材料图案化，形成位于所述非开口区20B中的遮光层211。在所述衬底层23的一表面上沉积一层覆盖所述开口区20A和所述非开口区20B的硅氧化物，形成第一绝缘层225。
如图6所示，通过曝光显影刻蚀等工艺在所述开口区20A内的所述第一绝缘层225上形成第一凹槽222。所述第一凹槽222台体形，且所述第一凹槽222的侧壁与底面之间的夹角角度为95°-135°，所述第一凹槽222的深度D1为0.2-2微米。
在所述第三绝缘层221远离所述衬底层23的一表面上沉积硅氮氧化物，所述硅氮氧化物填充所述第一凹槽222，并形成第二绝缘层223。如图7所示，在所述第二绝缘层223远离所述第三绝缘层221的一表面上涂布一层光阻51，并通过所述光阻51将所述第二绝缘层223的表面流平。如图8所示，对所述光阻51和所述第二绝缘层223进行整面干刻蚀，并保持光阻51与第二绝缘层223的刻蚀速率一致，从而去除所述第一凹槽222以外的第二绝缘层223，仅保留位于所述第一凹槽222内的第二绝缘层223。
如图9所示，通过曝光显影刻蚀等工艺在所述第二绝缘层223内形成第二凹槽224。所述第二凹槽224为球冠形，所述第二凹槽224的深度D2为0.2-2微米。由于刻蚀精度控制较难，可剩余部分第二绝缘层223，促使所述第一凹槽222与所述第二凹槽224之间的深度差小于或等于0.5微米。优选的，所述第一凹槽222的深度D1等于所述第二凹槽224的深度D2，即所述第一凹槽222与所述第二凹槽224之间的深度差为0。
在所述第二绝缘层223远离所述第三绝缘层221的一表面上沉积硅氮化物，所述硅氮化物填充所述第二凹槽224，并形成主体部2251和以及覆盖所述主体部2251和所述第三绝缘层221的覆盖部2252，所述主体部2251和所述覆盖部2252组合形成所述第一绝缘层225。如图10所示，在所述第一绝缘层225远离所述第二绝缘层223的一表面上涂布一层光阻52，并通过所述光阻52将所述覆盖部2252的表面流平。如图11所示，对所述光阻52和所述覆盖部2252进行整面干刻蚀，并保持所述光阻52与所述覆盖部2252的刻蚀速率一致，最终达到所述覆盖部2252的表面平坦化。
在所述第一绝缘层225上通过TFT工艺制备缓冲层24、栅极绝缘层251、第一介电层252、第二介电层253、平坦层26等绝缘膜层以及设于上述绝缘膜层中并位于所述非开口区20B内的薄膜晶体管21的导电结构。
在所述平坦层26远离所述薄膜晶体管21的一表面上沉积一层透明导电材料，并将该透明导电材料图案化，形成公共电极层28。在所述平坦层26上沉积一层覆盖所述公共电极层28的硅氮化物，形成所述钝化层27。在所述钝化层27远离所述公共电极层28的一表面上沉积一层透明导电材料，并将该透明导电材料图案化，形成像素电极层29。
步骤S20）形成液晶层30和彩膜基板40：在所述阵列基板20的远离所述衬底层23的一侧形成液晶盒，并在所述液晶盒中滴入液晶，形成所述液晶层30；在所述液晶层30远离所述阵列基板20的一侧形成彩膜基板40。
步骤S30）形成背光模组10：通过背光制程制备所述背光模组10，将所述背光模组10组装在所述阵列基板20远离所述液晶层30的一侧，形成如图1中所示的显示面板1。
在本发明实施例中，在阵列基板的开口区中形成了双透镜的嵌套结构，并通过双透镜的嵌套结构同时实现光线的全反射和折射，将斜射进所述非开口区中的光线反射回所述开口区中，并将所述开口区中发散的背光光线聚集，从而减低光线在阵列基板中的损耗率，提高所述阵列基板的整体透光率，进而提高所述显示面板的显示亮度。
实施例2
本发明实施例中提供一种显示面板1，如图1所示，所述显示面板1中一般包括依次叠层设置的背光模组10、阵列基板20、液晶层30以及彩膜基板40。所述背光模组10用于为所述显示面板1提供显示光源。所述阵列基板20用于控制液晶层30中液晶分子的偏转方向，从而控制背光光线的透过与否，进而形成图像画面。所述彩膜基板40则用于将从所述液晶层30出射的单一颜色的光线过滤为多种颜色的彩色光线，从而实现彩色显示。
如图12所示，所述阵列基板20设于所述背光模组10的出光面上，其设有多个薄膜晶体管21，所述薄膜晶体管21阵列排布在所述阵列基板20中。由于所述薄膜晶体管21无法透光，因此在所述阵列基板20上形成了多个与所述薄膜晶体管21相对应的非开口区20B，以及与所述非开口区20B连接的开口区20A。其中，所述开口区20A中由于未设置所述薄膜晶体管21，因此光线可以穿过。
所述阵列基板20中包括遮光层211、有源层212、栅极层213以及源漏极层214，其中所述有源层212、所述栅极层213以及所述源漏极层214即为所述薄膜晶体管21的主要结构。所述阵列基板20还包括绝缘结构22，所述绝缘结构包括衬底层23、第二绝缘层223、第一绝缘层225、缓冲层24、栅极绝缘层251、第一介电层252、第二介电层253以及平坦层26。
所述衬底层23覆盖所述开口区20A和所述非开口区20B，其远离所述背光模组10的一表面上设有多个第一凹槽222，且所述第一凹槽222均位于所述开口区20A中，即所述第一凹槽222与所述薄膜晶体管21在所述衬底层23上正投影不重合。其中，所述第一凹槽222的深度D1为0.2-2微米，且所述衬底层23的厚度大于所述第一凹槽222的深度D1。所述第一凹槽222为台体形，其可以为圆台形或四边棱台形。进一步地，所述第一凹槽222的侧壁与其底面之间具有一第一夹角，所述第一夹角的角度为95°-135°。所述衬底层23为玻璃基板，其还可以作为硬性基板为所述阵列基板20提供硬性支撑，提高所述阵列基板20的结构稳定性。
所述遮光层211设于所述衬底层23远离所述背光模组10的一表面上，并位于所述非开口区20B中。所述遮光层211采用导电金属材料制备而成，其用于为所述有源层212遮挡从衬底层23侧进入的入射光，防止光线影响所述有源层212的工作。
所述第二绝缘层223填充在所述第一凹槽222中，并形成与所述第一凹槽222相契合的台体形，促使所述第二绝缘层223的侧面与所述第一凹槽222的侧壁相贴合，即所述第二绝缘层223的侧面与其底面之间的夹角角度也为95°-135°。进一步地，所述第二绝缘层223的折射率大于所述衬底层23的折射率。
所述衬底层23与所述第二绝缘层223组合形成一棱镜结构。如图12所示，进入所述第二绝缘层223的光线从所述阵列基板20的开口区20A向所述非开口区20B斜射时会经过所述第二绝缘层223的侧面，并产生全反射效应，使斜射在所述第二绝缘层223侧面上的光线发生全反射，从而防止光线斜射进所述非开口区20B中，并从斜射的光线重新反射进所述开口区20A中，进而提高所述阵列基板20的透光率，减少光线的损失。
所述第二绝缘层223远离所述背光模组10的一表面上具有第二凹槽224。所述第二绝缘层223的厚度等于所述第一凹槽222的深度D1，即所述第二绝缘层223远离所述背光模组10的一表面与所述衬底层23的远离所述背光模组10的一表面位于同一平面中，因此所述第二凹槽224的槽口与所述第一凹槽222的槽口也在同一平面中，并且所述第二凹槽224的槽口宽度小于或等于所述第一凹槽222的槽口宽度。所述第二凹槽224为球冠形，并且所述第二凹槽224的中心轴与所述第一凹槽222的中心轴重合。所述第二凹槽224的深度D2为0.2-2微米。由于刻蚀精度控制较难，可使所述第一凹槽222与所述第二凹槽224之间的深度差小于或等于0.5微米。优选的，所述第一凹槽222的深度D1等于所述第二凹槽224的深度D2，即所述第一凹槽222与所述第二凹槽224之间的深度差为0。
所述第一绝缘层225设于所述衬底层23和所述第二绝缘层223远离所述背光模组10的一表面上，其包括一主体部2251和一覆盖部2252。所述主体部2251填充在所述第二凹槽224中，并形成与所述第二凹槽224相契合的球冠形，促使所述主体部2251的表面与所述第二凹槽224的弧形壁面相贴合。所述覆盖部2252设于所述主体部2251远离所述背光模组10的一侧，并覆盖所述衬底层23远离所述背光模组10的一表面。进一步地，所述第一绝缘层225的折射率大于所述第二绝缘层223的折射率。
所述第二绝缘层223与所述第一绝缘层225的主体部2251组合形成会聚透镜结构。如图12所示，从所述第二绝缘层223入射至所述第一绝缘层225的光线必会经过所述主体部2251与所述第二绝缘层223相贴合的弧形表面，并产生折射效应，促使入射至所述主体部2251中的光线发生折射，缩小入射光线的入射角度，从而将发散的背光光线聚集，进而达到聚光效果，提高所述显示面板1的亮度。
所述主体部2251的厚度等于所述第二凹槽224的深度D2，即所述主体部2251远离所述背光模组10的一表面与所述衬底层23远离所述背光模组10的一表面位于同一平面上。并且，所述第二凹槽224槽口的优选宽度等于第一凹槽222的槽口宽度，即所述主体部2251的最大宽度等于所述第二绝缘层223的最大宽度，从而最大限度上增加所述第二凹槽224中所述主体部2251的宽度，进而增加所述第一绝缘层225的折射面积。
同时，所述第二凹槽224的中心轴与所述第一凹槽222的中心轴重合，促使所述第一凹槽222与所述第二凹槽224的正投影重合，从而也所述第二绝缘层223与所述主体部2251的正投影重合，进而使所述衬底层23与所述第二绝缘层223所形成的棱镜结构中嵌套所述第二绝缘层223与所述主体部2251所形成的会聚透镜结构，形成双透镜嵌套结构，增强所述开口区20A中的聚光效果。
所述缓冲层24设于所述覆盖部2252远离所述衬底层23的一表面上。所述缓冲层24和所述覆盖部2252可以形成缓冲结构，减缓生产运输过程中对显示面板1器件的冲击力，保护所述阵列基板20中的薄膜晶体管21结构。
所述有源层212设于所述缓冲层24远离所述遮光层211的一表面上，并且所述遮光层211在所述衬底层23上的正投影覆盖所述有源层212在所述衬底层23上的正投影。所述栅极绝缘层251设于所述缓冲层24上，并覆盖所述有源层212。所述栅极层213设于所述栅极绝缘层251远离所述有源层212的一表面上，并且所述有源层212在所述衬底层23上的正投影覆盖所述栅极层213在所述衬底层23上的正投影。所述第一介电层252设于所述栅极绝缘层251上，并覆盖所述栅极层213。所述第二介电层253设于所述第一介电层252远离所述栅极层213的一表面上。所述源漏极层214设于所述第二介电层253上，并依次穿过所述第一介电层252和所述栅极绝缘层251与所述有源层212电连接。所述平坦层26设于所述第二介电层253上，并覆盖所述源漏极层214。
其中，所述薄膜晶体管21通过对栅极层213施加电流电压，从而产生电场，所述电场会促使所述有源层212的表面产生感应电荷，改变导电沟道厚度，从而达到控制源漏极层214电流的目的，实现对所述显示面板1中每一子像素的驱动。而所述栅极绝缘层251、所述第一介电层252和所述第二介电层253则用于绝缘保护所述薄膜晶体管21中的导电结构，防止走线之间发生短路。所述平坦层26用于将所述薄膜晶体管21的表面平坦化。
具体的，所述第二绝缘层223、所述第一绝缘层225、所述缓冲层24、所述栅极绝缘层251、所述第一介电层252和所述第二介电层253采用无机材料制备而成，所述平坦层26采用有机材料制备而成。其中，所述无机材料包括硅氧化物、硅氮氧化物和硅氮化物。所述缓冲层24、所述栅极绝缘层251、和所述第二介电层253均采用硅氧化物，所述第二介电层253采用硅氮化物。
在硅氧化物、硅氮氧化物和硅氮化物中，材料折射率与氮原子与氧原子之间的数量占比息息相关，氮原子的数量占比越大则其折射率越高，氧原子的数量占比越大则其折射率越低。因此，在所述第二绝缘层223和所述第一绝缘层225中，离所述背光模组10越近的膜层，其材料中氧原子的数量占比越大；离所述背光模组10越远的膜层，其材料中氮原子的数量占比越大。
进一步地，在硅氧化物、硅氮氧化物和硅氮化物中，硅氧化物的折射率最低，约为1.49；硅氮氧化物的折射率位于中间，约为1.6-1.7；硅氮化物的折射率最高，约为1.87。而所述衬底层23（即玻璃）的折射为1.51，因此，所述第二绝缘层223的材料优选为硅氮氧化物，所述第一绝缘层225的材料优选为硅氮化物。
所述阵列基板20还包括公共电极层28、钝化层27和像素电极层29。所述公共电极层28设于所述平坦层26远离所述源漏极层214的一表面上，其采用透明导电材料制备而成。所述钝化层27设于所述平坦层26上并覆盖所述公共电极，其才采用硅氮化物制备而成，并用于钝化保护所述公共电极层28。所述像素电极层29设于所述钝化层27远离所述公共电极层28的一表面上，并穿过所述钝化层27和所述平坦层26与所述源漏极层214电连接，同时所述像素电极层29与所述公共电极层28之间保持电性绝缘。
在本发明实施例中，在阵列基板的开口区中形成了双透镜的嵌套结构，并通过双透镜的嵌套结构同时实现光线的全反射和折射，将斜射进所述非开口区中的光线反射回所述开口区中，并将所述开口区中发散的背光光线聚集，从而减低光线在阵列基板中的损耗率，提高所述阵列基板的整体透光率，进而提高所述显示面板的显示亮度。
并且，在本发明实施例中，将第一凹槽设置在玻璃基板上，从而将实施例1中第三绝缘层与衬底层的功能相结合，使所述衬底层即具有硬性支撑的作用，还能与第二绝缘层之间产生全反射作用，相较于实施例1还能减少一层无机膜层，进而降低所述阵列基板和所述显示面板的整体厚度。
实施例3
本发明实施例中提供一种显示面板1，如图1所示，所述显示面板1中一般包括依次叠层设置的背光模组10、阵列基板20、液晶层30以及彩膜基板40。所述背光模组10用于为所述显示面板1提供显示光源。所述阵列基板20用于控制液晶层30中液晶分子的偏转方向，从而控制背光光线的透过与否，进而形成图像画面。所述彩膜基板40则用于将从所述液晶层30出射的单一颜色的光线过滤为多种颜色的彩色光线，从而实现彩色显示。
如图13所示，所述阵列基板20设于所述背光模组10的出光面上，其设有多个薄膜晶体管21，所述薄膜晶体管21阵列排布在所述阵列基板20中。由于所述薄膜晶体管21无法透光，因此在所述阵列基板20上形成了多个与所述薄膜晶体管21相对应的非开口区20B，以及与所述非开口区20B连接的开口区20A。其中，所述开口区20A中由于未设置所述薄膜晶体管21，因此光线可以穿过。
所述阵列基板20中包括遮光层211、有源层212、栅极层213以及源漏极层214，其中所述有源层212、所述栅极层213以及所述源漏极层214为所述薄膜晶体管21的主要导电结构。所述阵列基板20还包括绝缘结构22，所述绝缘结构22包括衬底层23、第一缓冲层241、第二缓冲层242、栅极绝缘层251、第一介电层252、第二介电层253、第三绝缘层221、第二绝缘层223以及第一绝缘层225。
所述衬底层23为硬性膜层，例如玻璃、石英等，其用于为所述阵列基板20提供硬性支撑，提高所述阵列基板20的结构稳定性。所述遮光层211设于所述衬底层23远离所述背光模组10的一表面上，并位于所述非开口区20B中。所述遮光层211采用导电金属材料制备而成，其用于为所述有源层212遮挡从衬底层23侧进入的入射光，防止光线影响所述有源层212的工作。
所述第一缓冲层241设于所述第三绝缘层221远离所述背光模组10的一表面上。所述第二缓冲层242设于所述第一缓冲层241远离所述衬底层23的一表面上。所述第一缓冲层241和所述第二述缓冲层242可以形成缓冲结构，减缓生产运输过程中对显示面板1器件的冲击力，保护所述阵列基板20中的薄膜晶体管21结构。
所述有源层212设于所述第二缓冲层242远离所述遮光层211的一表面上，并且所述遮光层211在所述衬底层23上的正投影覆盖所述有源层212在所述衬底层23上的正投影。所述栅极绝缘层251设于所述第二缓冲层242上，并覆盖所述有源层212。所述栅极层213设于所述栅极绝缘层251远离所述有源层212的一表面上，并且所述有源层212在所述衬底层23上的正投影覆盖所述栅极层213在所述衬底层23上的正投影。所述第一介电层252设于所述栅极绝缘层251上，并覆盖所述栅极层213。所述第二介电层253设于所述第一介电层252远离所述栅极层213的一表面上。所述源漏极层214设于所述第二介电层253上，并依次穿过所述第一介电层252和所述栅极绝缘层251与所述有源层212电连接。
所述第三绝缘层221设于所述第二介电层253上，并覆盖所述源漏极层214。所述第三绝缘层221远离所述背光模组10的一表面上设有多个第一凹槽222，且所述第一凹槽222均位于所述开口区20A中，即所述第一凹槽222与所述薄膜晶体管21在所述衬底层23上正投影不重合。其中，所述第一凹槽222的深度D1为0.2-2微米，且所述第三绝缘层221的厚度大于所述第一凹槽222的深度D1。所述第一凹槽222为台体形，其可以为圆台形或四边棱台形。进一步地，所述第一凹槽222的侧壁与其底面之间具有一第一夹角，所述第一夹角的角度为95°-135°。
所述第二绝缘层223填充在所述第一凹槽222中，并形成与所述第一凹槽222相契合的台体形，促使所述第二绝缘层223的侧面与所述第一凹槽222的侧壁相贴合，即所述第二绝缘层223的侧面与其底面之间的夹角角度也为95°-135°。进一步地，所述第二绝缘层223的折射率大于所述第三绝缘层221的折射率。
所述第三绝缘层221与所述第二绝缘层223组合形成一棱镜结构。如图13所示，进入所述第二绝缘层223的光线从所述阵列基板20的开口区20A向所述非开口区20B斜射时会经过所述第二绝缘层223的侧面，并产生全反射效应，使斜射在所述第二绝缘层223侧面上的光线发生全反射，从而防止光线斜射进所述非开口区20B中，并从斜射的光线重新反射进所述开口区20A中，进而提高所述阵列基板20的透光率，减少光线的损失。
所述第二绝缘层223远离所述背光模组10的一表面上具有第二凹槽224。所述第二绝缘层223的厚度等于所述第一凹槽222的深度D1，即所述第二绝缘层223远离所述背光模组10的一表面与所述第三绝缘层221的远离所述背光模组10的一表面位于同一平面中，因此所述第二凹槽224的槽口与所述第一凹槽222的槽口也在同一平面中，并且所述第二凹槽224的槽口宽度小于或等于所述第一凹槽222的槽口宽度。所述第二凹槽224为球冠形，且所述第二凹槽224的中心轴与所述第一凹槽222的中心轴重合。所述第二凹槽224的深度D2为0.2-2微米。由于刻蚀精度控制较难，可使所述第一凹槽222与所述第二凹槽224之间的深度差小于或等于0.5微米。优选的，所述第一凹槽222的深度D1等于所述第二凹槽224的深度D2，即所述第一凹槽222与所述第二凹槽224之间的深度差为0。
所述第一绝缘层225填充在所述第二凹槽224中，并形成与所述第二凹槽224相契合的球冠形，促使所述第一绝缘层225的表面与所述第二凹槽224的弧形壁面相贴合。进一步地，所述第一绝缘层225的折射率大于所述第二绝缘层223的折射率。
所述第二绝缘层223与所述第一绝缘层225组合形成会聚透镜结构。如图13所示，从所述第二绝缘层223入射至所述第一绝缘层225的光线必会经过所述第一绝缘层225与所述第二绝缘层223相贴合的弧形表面，并产生折射效应，促使入射至所述第一绝缘层225中的光线发生折射，缩小入射光线的入射角度，从而将发散的背光光线聚集，进而达到聚光效果，提高所述显示面板1的亮度。
所述第一绝缘层225的厚度等于所述第二凹槽224的深度D2，即所述第一绝缘层225远离所述背光模组10的一表面与所述第三绝缘层221远离所述背光模组10的一表面位于同一平面上。并且，所述第二凹槽224槽口的优选宽度等于第一凹槽222的槽口宽度，即所述第一绝缘层225的最大宽度等于所述第二绝缘层223的最大宽度，从而最大限度上增加所述第二凹槽224中所述第一绝缘层225的宽度，进而增加所述第一绝缘层225的折射面积。
同时，所述第二凹槽224的中心轴与所述第一凹槽222的中心轴重合，促使所述第一凹槽222与所述第二凹槽224的正投影重合，从而也所述第二绝缘层223与所述第一绝缘层225的正投影重合，进而使所述第三绝缘层221与所述第二绝缘层223所形成的棱镜结构中嵌套所述第二绝缘层223与所述第一绝缘层225所形成的会聚透镜结构，形成双透镜嵌套结构，增强所述开口区20A中的聚光效果。
其中，所述薄膜晶体管21通过对栅极层213施加电流电压，从而产生电场，所述电场会促使所述有源层212的表面产生感应电荷，改变导电沟道厚度，从而达到控制源漏极层214电流的目的，实现对所述显示面板1中每一子像素的驱动。而所述栅极绝缘层251、所述第一介电层252和所述第二介电层253则用于绝缘保护所述薄膜晶体管21中的导电结构，防止走线之间发生短路。所述第三绝缘层221在与所述第二绝缘层223产生全反射效应的同时还能将所述阵列基板20的表面平坦化。
具体的，所述第一缓冲层241、所述第二缓冲层242、所述栅极绝缘层251、所述第一介电层252、所述第二介电层253、所述第二绝缘层223以及所述第一绝缘层225采用无机材料制备而成，所述第三绝缘层221采用具有流平效果的有机材料制备而成。其中，所述无机材料包括硅氧化物、硅氮氧化物和硅氮化物。所述第二缓冲层242、所述栅极绝缘层251、和所述第二介电层253均采用硅氧化物，所述第一缓冲层241和所述第二介电层253采用硅氮化物。所述第三绝缘层221则采用聚酰亚胺（PI）或聚甲基丙烯酸甲酯（PMMA）中的至少一种。
在硅氧化物、硅氮氧化物和硅氮化物中，材料折射率与氮原子与氧原子之间的数量占比息息相关，氮原子的数量占比越大则其折射率越高，氧原子的数量占比越大则其折射率越低。因此，在所述第二绝缘层223和所述第一绝缘层225中，离所述背光模组10越近的膜层，其材料中氧原子的数量占比越大；离所述背光模组10越远的膜层，其材料中氮原子的数量占比越大。
进一步地，在硅氧化物、硅氮氧化物和硅氮化物中，硅氧化物的折射率最低，约为1.49；硅氮氧化物的折射率位于中间，约为1.6-1.7；硅氮化物的折射率最高，约为1.87。而所述第三绝缘层221（即有机材料）的折射率为1.54，因此，所述第二绝缘层223的材料优选为硅氮氧化物，所述第一绝缘层225的材料优选为硅氮化物。
所述阵列基板20还包括公共电极层28、钝化层27和像素电极层29。所述公共电极层28设于所述第三绝缘层221远离所述源漏极层214的一表面上，并覆盖所述第一绝缘层225，其采用透明导电材料制备而成。所述钝化层27设于所述第三绝缘层221上并覆盖所述公共电极，其才采用硅氮化物制备而成，并用于钝化保护所述公共电极层28。所述像素电极层29设于所述钝化层27远离所述公共电极层28的一表面上，并穿过所述钝化层27和所述第三绝缘层221与所述源漏极层214电连接，同时所述像素电极层29与所述公共电极层28之间保持电性绝缘。
在本发明实施例中，在阵列基板的开口区中形成了双透镜的嵌套结构，并通过双透镜的嵌套结构同时实现光线的全反射和折射，将斜射进所述非开口区中的光线反射回所述开口区中，并将所述开口区中发散的背光光线聚集，从而减低光线在阵列基板中的损耗率，提高所述阵列基板的整体透光率，进而提高所述显示面板的显示亮度。
并且，在本发明实施例中，将第一凹槽设置在具有流平作用的有机膜层上，从而将第三绝缘层与实施例1中平坦层的功能相结合，使所述第三绝缘层即具有平坦化的作用，还能与第二绝缘层之间产生全反射作用，相较于实施例1还能减少一层无机膜层，进而降低所述阵列基板和所述显示面板的整体厚度。
虽然在本文中参照了特定的实施方式来描述本发明，但是应该理解的是，这些实施例仅仅是本发明的原理和应用的示例。因此应该理解的是，可以对示例性的实施例进行许多修改，并且可以设计出其他的布置，只要不偏离所附权利要求所限定的本发明的精神和范围。应该理解的是，可以通过不同于原始权利要求所描述的方式来结合不同的从属权利要求和本文中所述的特征。还可以理解的是，结合单独实施例所描述的特征可以使用在其他所述实施例中。

Claims (20)

  1. 一种显示面板，其包括：
    背光模组，具有一出光面；
    阵列基板，设于所述背光模组的出光面上，其具有多个非开口区和多个开口区；
    所述阵列基板包括：
    绝缘结构，位于所述开口区中；
    第一凹槽，设于所述绝缘结构远离所述背光模组的一侧；
    所述第一凹槽内填充有第一绝缘层和第二绝缘层，所述第二绝缘层位于所述第一绝缘层靠近所述背光模组的一侧，且所述第二绝缘层的折射率小于所述第一绝缘层的折射率。
  2. 如权利要求1所述的显示面板，其中，所述绝缘结构包括:
    衬底层；
    第三绝缘层，设于所述衬底层远离所述背光模组的一侧；
    所述第一凹槽设于所述衬底层或所述第三绝缘层远离所述背光模组的一表面上；
    所述第二绝缘层设于所述第一凹槽中，且所述衬底层和所述第三绝缘层的折射率均小于所述第二绝缘层的折射率；
    所述第二绝缘层远离所述背光模组的一表面上具有第二凹槽，所述第一绝缘层填充所述第二凹槽。
  3. 如权利要求2所述的显示面板，其中，所述第三绝缘层的材料中包含有机材料或无机材料中的至少一种；
    所述第一绝缘层和所述第二绝缘层的材料中包含无机材料。
  4. 如权利要求3所述的显示面板，其中，
    所述无机材料包括硅氧化物、硅氮氧化物和硅氮化物；
    在所述第一绝缘层、所述第二绝缘层和所述第三绝缘层中，离所述背光模组越近的膜层，其材料中氧原子的数量占比越大；离所述背光模组越远的膜层，其材料中氮原子的数量占比越大。
  5. 如权利要求2所述的显示面板，其中，
    所述第一凹槽为台体形，其侧壁与其底面之间具有一第一夹角，所述第一夹角的角度为95°-135°。
  6. 如权利要求5所述的显示面板，其中，
    当所述第二凹槽为锥体形或台体形时，所述第二凹槽的侧壁与所述第一凹槽的底面之间具有一第二夹角，所述第二夹角的角度大于所述第一夹角的角度且小于180°。
  7. 如权利要求2所述的显示面板，其中，
    所述第二凹槽为锥体形、台体形或球冠形中的至少一种，且所述第二凹槽的中心轴与所述第一凹槽的中心轴重合。
  8. 如权利要求2所述的显示面板，其中，
    所述第一凹槽的深度为0.2-2微米；
    所述第二凹槽的深度小于或等于所述第一凹槽的深度，且所述第一凹槽与所述第二凹槽之间的深度差小于或等于0.5微米。
  9. 如权利要求2所述的显示面板，其中，所述第一绝缘层包括：
    主体部，填充所述第二凹槽，且所述主体部的形状与所述第二凹槽的形状相契合；
    覆盖部，设于所述主体部远离所述背光模组的一侧，并覆盖所述衬底层或所述第三绝缘层远离所述背光模组的一表面。
  10. 如权利要求2所述的显示面板，所述阵列基板还包括：
    薄膜晶体管，位于所述非开口区中，且所述薄膜晶体管在所述衬底层上的正投影与所述第一凹槽在所述衬底层上的正投影不重合。
  11. 一种显示面板的制备方法，其包括以下步骤：
    制备背光模组；
    制备阵列基板，其包括以下步骤：
    提供一绝缘结构，并在所述绝缘结构上定义出非开口区和开口区，其中所述绝缘结构包括第一绝缘层和第二绝缘层；
    在所述绝缘结构远离所述背光模组的一侧形成第一凹槽，所述第一凹槽位于所述开口区中；
    在所述第一凹槽中形成依次形成第二绝缘层和第一绝缘层；
    其中，所述第二绝缘层的折射率小于所述第一绝缘层的折射率。
  12. 一种显示装置，其包括一显示面板，所述显示面板包括：
    背光模组，具有一出光面；
    阵列基板，设于所述背光模组的出光面上，其具有多个非开口区和多个开口区；
    所述阵列基板包括：
    绝缘结构，位于所述开口区中；
    第一凹槽，设于所述绝缘结构远离所述背光模组的一侧；
    所述第一凹槽内填充有第一绝缘层和第二绝缘层，所述第二绝缘层位于所述第一绝缘层靠近所述背光模组的一侧，且所述第二绝缘层的折射率小于所述第一绝缘层的折射率。
  13. 如权利要求12所述的显示装置，其中，所述绝缘结构包括:
    衬底层；
    第三绝缘层，设于所述衬底层远离所述背光模组的一侧；
    所述第一凹槽设于所述衬底层或所述第三绝缘层远离所述背光模组的一表面上；
    所述第二绝缘层设于所述第一凹槽中，且所述衬底层和所述第三绝缘层的折射率均小于所述第二绝缘层的折射率；
    所述第二绝缘层远离所述背光模组的一表面上具有第二凹槽，所述第一绝缘层填充所述第二凹槽。
  14. 如权利要求13所述的显示装置，其中，所述第三绝缘层的材料中包含有机材料或无机材料中的至少一种；
    所述第一绝缘层和所述第二绝缘层的材料中包含无机材料。
  15. 如权利要求14所述的显示装置，其中，
    所述无机材料包括硅氧化物、硅氮氧化物和硅氮化物；
    在所述第一绝缘层、所述第二绝缘层和所述第三绝缘层中，离所述背光模组越近的膜层，其材料中氧原子的数量占比越大；离所述背光模组越远的膜层，其材料中氮原子的数量占比越大。
  16. 如权利要求13所述的显示装置，其中，
    所述第一凹槽为台体形，其侧壁与其底面之间具有一第一夹角，所述第一夹角的角度为95°-135°。
  17. 如权利要求16所述的显示装置，其中，
    当所述第二凹槽为锥体形或台体形时，所述第二凹槽的侧壁与所述第一凹槽的底面之间具有一第二夹角，所述第二夹角的角度大于所述第一夹角的角度且小于180°。
  18. 如权利要求13所述的显示装置，其中，
    所述第二凹槽为锥体形、台体形或球冠形中的至少一种，且所述第二凹槽的中心轴与所述第一凹槽的中心轴重合。
  19. 如权利要求13所述的显示装置，其中，
    所述第一凹槽的深度为0.2-2微米；
    所述第二凹槽的深度小于或等于所述第一凹槽的深度，且所述第一凹槽与所述第二凹槽之间的深度差小于或等于0.5微米。
  20. 如权利要求13所述的显示装置，其中，所述第一绝缘层包括：
    主体部，填充所述第二凹槽，且所述主体部的形状与所述第二凹槽的形状相契合；
    覆盖部，设于所述主体部远离所述背光模组的一侧，并覆盖所述衬底层或所述第三绝缘层远离所述背光模组的一表面。
PCT/CN2022/130677 2022-08-23 2022-11-08 显示面板及其制备方法、显示装置 WO2024040751A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/925,028 US20240069381A1 (en) 2022-08-23 2022-11-08 Display panel and manufacturing method thereof, and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202211012624.6 2022-08-23
CN202211012624.6A CN115407570B (zh) 2022-08-23 2022-08-23 显示面板及其制备方法

Publications (1)

Publication Number Publication Date
WO2024040751A1 true WO2024040751A1 (zh) 2024-02-29

Family

ID=84162479

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/130677 WO2024040751A1 (zh) 2022-08-23 2022-11-08 显示面板及其制备方法、显示装置

Country Status (2)

Country Link
CN (1) CN115407570B (zh)
WO (1) WO2024040751A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115407570B (zh) * 2022-08-23 2023-12-15 武汉华星光电技术有限公司 显示面板及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102692757A (zh) * 2011-03-25 2012-09-26 精工爱普生株式会社 液晶装置及投影机
US20180143490A1 (en) * 2016-11-04 2018-05-24 Seiko Epson Corporation Microlens array substrate, manufacturing method of the same, electrooptical device, manufacturing method of the same, and electronic apparatus
CN111834544A (zh) * 2020-06-30 2020-10-27 湖北长江新型显示产业创新中心有限公司 显示面板和显示装置
CN111834545A (zh) * 2020-06-30 2020-10-27 湖北长江新型显示产业创新中心有限公司 显示面板和显示装置
CN115407570A (zh) * 2022-08-23 2022-11-29 武汉华星光电技术有限公司 显示面板及其制备方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3938099B2 (ja) * 2002-06-12 2007-06-27 セイコーエプソン株式会社 マイクロレンズの製造方法、マイクロレンズ、マイクロレンズアレイ板、電気光学装置及び電子機器
KR101191760B1 (ko) * 2005-10-29 2012-10-16 엘지디스플레이 주식회사 협시야각모드 전환이 가능한 액정표시장치
KR20070056781A (ko) * 2005-11-30 2007-06-04 삼성전자주식회사 액정 표시 장치
JP2015179145A (ja) * 2014-03-19 2015-10-08 株式会社東芝 液晶光学素子及び画像装置
CN106842598B (zh) * 2017-03-17 2019-09-06 京东方科技集团股份有限公司 显示切换装置、显示器和电子设备
TWI630444B (zh) * 2017-08-14 2018-07-21 友達光電股份有限公司 顯示裝置及顯示方法
CN109671719A (zh) * 2018-12-04 2019-04-23 武汉华星光电半导体显示技术有限公司 阵列基板及其制作方法、显示装置
CN109656052B (zh) * 2019-01-18 2022-04-22 昆山龙腾光电股份有限公司 液晶显示面板及其制作方法和显示装置
CN110429205B (zh) * 2019-07-31 2021-06-01 武汉华星光电半导体显示技术有限公司 一种显示面板及显示装置
CN110610948B (zh) * 2019-08-30 2021-05-07 武汉华星光电半导体显示技术有限公司 阵列基板及显示装置
KR20230002866A (ko) * 2020-05-22 2023-01-05 케이와 인코포레이티드 광학 시트, 백라이트 유닛, 액정 표시 장치 및 정보 기기
CN111796448A (zh) * 2020-07-02 2020-10-20 Tcl华星光电技术有限公司 视角调整膜结构及其制作方法、显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102692757A (zh) * 2011-03-25 2012-09-26 精工爱普生株式会社 液晶装置及投影机
US20180143490A1 (en) * 2016-11-04 2018-05-24 Seiko Epson Corporation Microlens array substrate, manufacturing method of the same, electrooptical device, manufacturing method of the same, and electronic apparatus
CN111834544A (zh) * 2020-06-30 2020-10-27 湖北长江新型显示产业创新中心有限公司 显示面板和显示装置
CN111834545A (zh) * 2020-06-30 2020-10-27 湖北长江新型显示产业创新中心有限公司 显示面板和显示装置
CN115407570A (zh) * 2022-08-23 2022-11-29 武汉华星光电技术有限公司 显示面板及其制备方法

Also Published As

Publication number Publication date
CN115407570A (zh) 2022-11-29
CN115407570B (zh) 2023-12-15

Similar Documents

Publication Publication Date Title
CN110082977B (zh) 一种tft阵列基板及显示面板
US7580181B2 (en) Display
JP5010586B2 (ja) 液晶表示装置および液晶表示装置の製造方法
JP4943454B2 (ja) 液晶表示装置
WO2017071404A1 (zh) 一种光学结构及其制作方法以及显示基板和显示器件
US10241363B2 (en) Lens array substrate, method of manufacturing lens array substrate, electro-optical device, and electronic apparatus
US7742133B2 (en) Transflective liquid crystal display device having high aperture ratio and fabrication method thereof
JP2004334205A (ja) 上部基板、これを有する液晶表示装置及びこの製造方法
CN103258838A (zh) 显示设备及用于制造显示设备的方法
WO2024040751A1 (zh) 显示面板及其制备方法、显示装置
JP2005165047A (ja) 電気光学装置及び投射型表示装置
CN217903141U (zh) 显示面板及显示装置
US20150092277A1 (en) Microlens array substrate, electro-optic device, and electronic apparatus
JP3941322B2 (ja) 反射型液晶表示装置用電極基板及びそれを用いた反射型液晶表示装置
JPH10319391A (ja) 拡散反射板及びその製造方法と反射型ゲストホスト液晶表示装置
US20240069381A1 (en) Display panel and manufacturing method thereof, and display device
JP2005215624A (ja) マイクロレンズの製造方法及びマイクロレンズ、並びにこれを備えた電気光学装置及び電子機器
CN113671746B (zh) 一种显示基板和显示模组
JP2003185804A (ja) マイクロレンズ及びその製造方法並びに電気光学装置
WO2024000355A1 (zh) 显示面板与显示装置
TW591570B (en) Reflection type liquid crystal display device
JP2008052213A (ja) 液晶パネルおよび液晶パネルの製造方法
CN114924436A (zh) 阵列基板及液晶显示面板
JP2003139915A (ja) マイクロレンズ及びその製造方法並びに電気光学装置
JP2000111899A (ja) 反射型液晶表示装置及びその製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22956288

Country of ref document: EP

Kind code of ref document: A1