WO2023285460A3 - Verfahren zur herstellung eines elektronischen halbleiterbauelements - Google Patents

Verfahren zur herstellung eines elektronischen halbleiterbauelements Download PDF

Info

Publication number
WO2023285460A3
WO2023285460A3 PCT/EP2022/069462 EP2022069462W WO2023285460A3 WO 2023285460 A3 WO2023285460 A3 WO 2023285460A3 EP 2022069462 W EP2022069462 W EP 2022069462W WO 2023285460 A3 WO2023285460 A3 WO 2023285460A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
producing
donor substrate
layer
semiconductor component
Prior art date
Application number
PCT/EP2022/069462
Other languages
English (en)
French (fr)
Other versions
WO2023285460A2 (de
Inventor
Constantin Csato
Florian Krippendorf
Original Assignee
mi2-factory GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by mi2-factory GmbH filed Critical mi2-factory GmbH
Priority to EP22751035.1A priority Critical patent/EP4371147A2/de
Publication of WO2023285460A2 publication Critical patent/WO2023285460A2/de
Publication of WO2023285460A3 publication Critical patent/WO2023285460A3/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Optics & Photonics (AREA)
  • Electromagnetism (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

Das Verfahren zur Herstellung eines elektronischen Halbleiterbauelements umfasst das Dotieren einer ersten Schicht (21) aus SiC in einem Spendersubstrat (12) mittels Ionenimplantation, das Erzeugen einer Sollbruchstelle (26) im Spendersubstrat (12) und das Herstellen einer Verbindung zwischen Spendersubstrat (12) und Akzeptorsubstrat (28), wobei die erste Schicht (21) in einem Bereich zwischen dem Akzeptorsubstrat (28) und einem restlichen Teil (22) des Spendersubstrats (12) angeordnet ist. Schließlich wird das Spendersubstrat (12) im Bereich der Sollbruchstelle (26) zur Erzeugung des vorbehandelten Verbundsubstrats (18) gespalten, wobei das vorbehandelte Verbundsubstrat (18) das Akzeptorsubstrat (28) und eine damit verbundene dotierte Schicht (32), die zumindest einen Abschnitt der ersten Schicht (21) des Spendersubstrats (12) umfasst, aufweist. Während des Prozesses werden außerdem Implantationsdefekte mittels Laserbestrahlung (43) ausgeheilt.
PCT/EP2022/069462 2021-07-15 2022-07-12 Verfahren zur herstellung eines elektronischen halbleiterbauelements WO2023285460A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP22751035.1A EP4371147A2 (de) 2021-07-15 2022-07-12 Verfahren zur herstellung eines elektronischen halbleiterbauelements

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102021118315.4 2021-07-15
DE102021118315.4A DE102021118315A1 (de) 2021-07-15 2021-07-15 Verfahren zur Herstellung eines elektronischen Halbleiterbauelements

Publications (2)

Publication Number Publication Date
WO2023285460A2 WO2023285460A2 (de) 2023-01-19
WO2023285460A3 true WO2023285460A3 (de) 2023-03-30

Family

ID=82799866

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2022/069462 WO2023285460A2 (de) 2021-07-15 2022-07-12 Verfahren zur herstellung eines elektronischen halbleiterbauelements

Country Status (3)

Country Link
EP (1) EP4371147A2 (de)
DE (1) DE102021118315A1 (de)
WO (1) WO2023285460A2 (de)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014103518A1 (de) * 2013-03-14 2014-09-18 Infineon Technologies Ag Ein verfahren zum herstellen eines siliziumkarbidsubstrats für eine elektrische siliziumkarbidvorrichtung, ein siliziumkarbidsubstrat und eine elektrische siliziumkarbidvorrichtung
US20180277372A1 (en) * 2017-03-24 2018-09-27 Sumitomo Heavy Industries, Ltd. Laser annealing method and laser annealing device
US10903078B2 (en) * 2018-05-28 2021-01-26 Infineon Technologies Ag Methods for processing a silicon carbide wafer, and a silicon carbide semiconductor device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7084456B2 (en) 1999-05-25 2006-08-01 Advanced Analogic Technologies, Inc. Trench MOSFET with recessed clamping diode using graded doping
US7579654B2 (en) 2006-05-31 2009-08-25 Corning Incorporated Semiconductor on insulator structure made using radiation annealing
WO2015190579A1 (ja) 2014-06-12 2015-12-17 富士電機株式会社 半導体装置
DE102015208097B4 (de) 2015-04-30 2022-03-31 Infineon Technologies Ag Herstellen einer Halbleitervorrichtung durch Epitaxie
DE102016100565B4 (de) 2016-01-14 2022-08-11 Infineon Technologies Ag Verfahren zum herstellen einer halbleitervorrichtung
DE102019112985A1 (de) 2019-05-16 2020-11-19 mi2-factory GmbH Verfahren zur Herstellung von Halbleiterbauelementen

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014103518A1 (de) * 2013-03-14 2014-09-18 Infineon Technologies Ag Ein verfahren zum herstellen eines siliziumkarbidsubstrats für eine elektrische siliziumkarbidvorrichtung, ein siliziumkarbidsubstrat und eine elektrische siliziumkarbidvorrichtung
US20180277372A1 (en) * 2017-03-24 2018-09-27 Sumitomo Heavy Industries, Ltd. Laser annealing method and laser annealing device
US10903078B2 (en) * 2018-05-28 2021-01-26 Infineon Technologies Ag Methods for processing a silicon carbide wafer, and a silicon carbide semiconductor device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KRIPPENDORF ET AL: "Dotierung von SiC mittels Energiefilter fuer Ionenimplantation", 26 October 2015, MIKROSYSTEMTECHNIK 2015; 4 (CONFERENCE INFO: MIKROSYSTEMTECHNIK 2015 - MIKROSYSTEMTECHNIK KONGRESS 2015; 2015; KARLSRUHE, DEUTSCHLAND),, PAGE(S) 334 - 337, XP009194563 *

Also Published As

Publication number Publication date
WO2023285460A2 (de) 2023-01-19
DE102021118315A1 (de) 2023-01-19
EP4371147A2 (de) 2024-05-22

Similar Documents

Publication Publication Date Title
US6486008B1 (en) Manufacturing method of a thin film on a substrate
US6291326B1 (en) Pre-semiconductor process implant and post-process film separation
CN105899325B (zh) 借助于激光处理和温度诱导的应力的组合的晶片制造法
KR100751150B1 (ko) 이송층에 의해 덮혀진 한 쌍의 기판을 동시에 얻는 방법
US9330958B2 (en) Process for fabricating a heterostructure limiting the formation of defects
JP5005097B2 (ja) 複合構造上でエピタキシーによって成長する層の製造方法
EP1429381B1 (de) Verfahren zur Herstellung eines Verbundmaterials
EP1792338A1 (de) Dünnschicht-transferverfahren, wobei ein coimplantierungsschritt gemäss bedingungen zur vermeidung der blasenbildung und begrenzung der rauhigkeit durchgeführt wird
TW201448262A (zh) 用於形成光電子裝置之技術
EP1816672A1 (de) Halbleiterschichtstruktur und Verfahren zur Herstellung einer Halbleiterschichtstruktur
JP6019106B2 (ja) 材料中にクラックを形成するための方法
CN107206626B (zh) 不平坦的晶片和用于制造不平坦的晶片的方法
CN102214594A (zh) 用于制造半导体衬底的方法
JP2013124206A (ja) ウエハ切断方法および装置
KR20210139455A (ko) 블록을 도너 기판으로부터 리시버 기판으로 전달하기 위한 방법
WO2023285460A3 (de) Verfahren zur herstellung eines elektronischen halbleiterbauelements
KR20190117573A (ko) 이온 주입 단계 동안 도너 기판의 에지 구역 마스킹
TW201140662A (en) Method for the preparation of a multi-layered crystalline structure
US8263483B2 (en) Method including producing a monocrystalline layer
US20110207306A1 (en) Semiconductor structure made using improved ion implantation process
WO2022128817A3 (de) Verfahren zur herstellung eines vorbehandelten verbundsubstrats und vorbehandeltes verbundsubstrat
JP2015525964A (ja) 層を転写するためのプロセス
US7153760B2 (en) Using acoustic energy including two lasers to activate implanted species
JP2011176322A5 (de)
JP6250979B2 (ja) ＩｎＰ膜の硬化基板上への移転方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22751035

Country of ref document: EP

Kind code of ref document: A2

ENP Entry into the national phase

Ref document number: 2024500406

Country of ref document: JP

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 18578143

Country of ref document: US

WWE Wipo information: entry into national phase

Ref document number: 2022751035

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2022751035

Country of ref document: EP

Effective date: 20240215